The "R" constraint supplies the address of an variable in a register. Use
"r" instead and adjust asm to supply the content of addr in a register
instead.
Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations")
Signed-off-by: Matthias Schiffer
Cc: Paul Burton
Cc: Daniel Schwierzeck
---
Hi
Enable CONFIG_USB_ETHER_RTL8152 support for Odroid XU4 which
has support for RTL8153-CG gigabit Ethernet adapter,
connected over USB 3.0.
commit 9dc8ba19c50fc0b1623c654bcfe6caa903a4c36c added support
for Realtek 8152/8153 driver.
Signed-off-by: Anand Moon
---
Depends on:
https://patchwor
From: Ted Chen
From: Ted Chen
type is USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.
To: ma...@denx.de, swar...@nvidia.com, u-boot@lists.denx.de
Cc: linux.am...@gmail.com, Ted Chen
Add a condition of set_address and set_configuration to check
if the request is standardized.
Signed-off-by:
OMAP timer driver directly typecasts fdt_addr_t to a pointer. This is
not strictly correct, as it gives a build warning when fdt_addr_t is u64.
So, use map_physmem for a proper typecasts.
This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address
instead of a pointer for the uart base"
TI QSPI driver directly typecasts fdt_addr_t to a pointer. This is
not strictly correct, as it gives a build warning when fdt_addr_t is u64.
So, use map_physmem for a proper typecasts.
This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address
instead of a pointer for the uart base")
On Saturday 05 March 2016 04:43 PM, Lokesh Vutla wrote:
TI QSPI driver directly typecasts fdt_addr_t to a pointer. This is
not strictly correct, as it gives a build warning when fdt_addr_t is u64.
So, use map_physmem for a proper typecasts.
This is inspired by commit 167efe01bc5a9 ("dm: ns16550:
Commit (20fae0a - ARM: DRA7: DDR: Enable SR in Power Management Control)
enables Self refresh mode by default and during warm reset the EMIF
contents are preserved. After warm reset EMIF sees that it is idle and
puts DDR in self-refresh. When in SR, leveling operations cannot be done
as DDR can onl
This series fixes miscellaneous bugs for the emif driver.
Lokesh Vutla (4):
ARM: DRA7: emif: Fix updating of refresh ctrl shadow
ARM: DRA7: emif: Fix DDR init sequence during warm reset
ARM: DRA7: emif: Check for enable bits before updating leveling output
ARM: DRA7: emif: Enable interlea
On DRA7, refresh ctrl shadow should be updated with
the final value.
Signed-off-by: Lokesh Vutla
---
arch/arm/cpu/armv7/omap-common/emif-common.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c
b/arch/arm/cpu/armv7/omap-commo
There are certain EMIF timing failures seen on the some x15 boards. Updating
the EMIF settings to get rid of these timing failures.
Signed-off-by: Lokesh Vutla
---
board/ti/am57xx/board.c | 136 +++-
1 file changed, 65 insertions(+), 71 deletions(-)
d
Read and write leveling can be enabled independently. Check for these
enable bits before updating the read and write leveling output values.
This will allow to use the combination of software and hardware leveling.
Signed-off-by: Lokesh Vutla
---
arch/arm/cpu/armv7/omap-common/emif-common.c | 38
Given that DRA7/OMAP5 SoCs can support more than 2GB of memory,
enable interleaving for this higher memory to increase performance.
Signed-off-by: Lokesh Vutla
---
arch/arm/cpu/armv7/omap-common/emif-common.c | 2 ++
arch/arm/include/asm/emif.h | 3 +++
2 files changed, 5 insert
DRA74-evm RevH and later versions uses 4GB DDR and populates this info
in EEPROM. This series reads EEPROM and populates emif settings for 4GB ddr.
If eeprom is not available or evm revision is < H, then it fall backs to
default emif settings.
This series depends on the ti common eeprom driver ser
DRA7 EVM revH and later EVMs have EEPROM populated that can contain board
description information such as name, revision, DDR definition, etc. Adding
support for this EEPROM format.
Acked-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
---
board/ti/common/board_detect.c | 64
Enable EEPROM support for DRA74-evm.
Acked-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
---
arch/arm/cpu/armv7/omap5/Kconfig | 1 +
board/ti/dra7xx/Kconfig | 3 ++
board/ti/dra7xx/evm.c| 59 +---
include/configs/dra7xx_evm.h | 4
The newer versions of DRA7 boards has EEPROM populated with DDR
size specified in it. Moving DRA7 specific emif related settings
to board files so that emif settings can be identified based on EEPROM.
Acked-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
---
arch/arm/cpu/armv7/omap5/sdram.c | 14
Updating the memory banks properly so that DT is populated accordingly.
And updating this only after DDR is properly detected by eeprom, so that
git bisect is still maintained.
Acked-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
---
board/ti/dra7xx/evm.c | 14 ++
1 file changed, 14
The REVH and later versions of DRA7-evm uses MICRON MT41K512M16HA-125 memory
chips which is of size 4GB(2GB on EMIF1 and 2GB on EMIF2). Add support for the
same.
Acked-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
---
board/ti/dra7xx/evm.c | 83 +
Enable configs that are required for detecting memory > 2GB.
Signed-off-by: Lokesh Vutla
---
include/configs/dra7xx_evm.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index e79250b..45bda4f 100644
--- a/include/configs/dra7x
On 03/04/2016 01:53 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi,
Hi,
>> It seems like your PHY is not recongnised. Could there be some
>> reset line which is left asserted ?
>
> I'm afraid I don't know how to check that.
>
> But I have previous version of U-Boot (2013) where Ethernet
On 03/05/2016 09:43 AM, Anand Moon wrote:
> From: Ted Chen
>
> From: Ted Chen
>
> type is USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.
> To: ma...@denx.de, swar...@nvidia.com, u-boot@lists.denx.de
> Cc: linux.am...@gmail.com, Ted Chen
>
> Add a condition of set_address and set_configurat
on v2016.03-rc3, size of SPL image compiled by gcc 5.3.0 is too large for
Firefly-RK3288. (it's fine for Rock2)
$ gcc --version
gcc (Ubuntu/Linaro 5.3.0-3ubuntu1~14.04) 5.3.0 20151204
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. T
When running sandbox, the following phases occur, each with different
malloc implementations or behaviors:
1) Dynamic linker execution, using the dynamic linker's own malloc()
implementation. This is fully functional.
2) After U-Boot's malloc symbol has been hooked into the GOT, but before
any U-
Following the previous patch, malloc() is never called before gd is set,
so we can remove the special-case check for this condition.
This reverts commit 854d2b9753e4 "dlmalloc: ensure gd is set for early
alloc".
Cc: Rabin Vincent
Signed-off-by: Stephen Warren
---
common/dlmalloc.c | 2 +-
1 fi
On Wed, Mar 02, 2016 at 05:38:18AM -0600, Adam Ford wrote:
> A few boards still use ns16550_platdata structures, but assume the structure
> is going to be in a specific order. By explicitly naming each entry,
> this should also help 'future-proof' in the event the structure changes.
>
> Tested on
On Sat, Mar 05, 2016 at 10:30:53AM -0700, Stephen Warren wrote:
> Following the previous patch, malloc() is never called before gd is set,
> so we can remove the special-case check for this condition.
>
> This reverts commit 854d2b9753e4 "dlmalloc: ensure gd is set for early
> alloc".
>
> Cc: Ra
On Sat, Mar 05, 2016 at 02:23:00AM +0100, Marek Vasut wrote:
> Hi,
>
> two minor fixes for 2016.03 . Thanks!
>
> The following changes since commit 50dc8677d769be6e2b34f49b6c43ad1e977bdc51:
>
> Merge git://git.denx.de/u-boot-usb (2016-02-26 18:08:43 -0500)
>
> are available in the git reposi
On Thu, Mar 03, 2016 at 10:14:16PM -0600, Derald D. Woods wrote:
> - Make comment 'one-liners' truly one line
> - Drop some CFI verbage and definitions
> * NOR Support needs to be added with current conventions
>
> Signed-off-by: Derald D. Woods
Reviewed-by: Tom Rini
... and you could move
On Thu, Mar 03, 2016 at 10:14:15PM -0600, Derald D. Woods wrote:
> Signed-off-by: Derald D. Woods
> ---
> configs/am3517_evm_defconfig | 2 +
> include/configs/am3517_evm.h | 102
> +++
> 2 files changed, 66 insertions(+), 38 deletions(-)
>
> diff --gi
On Sat, Mar 05, 2016 at 10:30:52AM -0700, Stephen Warren wrote:
> When running sandbox, the following phases occur, each with different
> malloc implementations or behaviors:
>
> 1) Dynamic linker execution, using the dynamic linker's own malloc()
> implementation. This is fully functional.
>
>
On Thu, Mar 03, 2016 at 10:14:14PM -0600, Derald D. Woods wrote:
> Select 8-bit BCH ecc-scheme with s/w based error correction
> - OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
>
> Signed-off-by: Derald D. Woods
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
___
On Sat, Mar 05, 2016 at 12:44:51PM -0500, Tom Rini wrote:
> On Thu, Mar 03, 2016 at 10:14:16PM -0600, Derald D. Woods wrote:
>
> > - Make comment 'one-liners' truly one line
> > - Drop some CFI verbage and definitions
> > * NOR Support needs to be added with current conventions
> >
> > Signed-o
Hi Marek,
On 5 March 2016 at 18:00, Marek Vasut wrote:
> On 03/05/2016 09:43 AM, Anand Moon wrote:
>> From: Ted Chen
>>
>> From: Ted Chen
>>
>> type is USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.
>> To: ma...@denx.de, swar...@nvidia.com, u-boot@lists.denx.de
>> Cc: linux.am...@gmail.com,
On 03/05/2016 10:44 AM, Tom Rini wrote:
On Sat, Mar 05, 2016 at 10:30:52AM -0700, Stephen Warren wrote:
When running sandbox, the following phases occur, each with different
malloc implementations or behaviors:
1) Dynamic linker execution, using the dynamic linker's own malloc()
implementation
On Sat, Mar 05, 2016 at 11:31:46AM -0700, Stephen Warren wrote:
> On 03/05/2016 10:44 AM, Tom Rini wrote:
> >On Sat, Mar 05, 2016 at 10:30:52AM -0700, Stephen Warren wrote:
> >
> >>When running sandbox, the following phases occur, each with different
> >>malloc implementations or behaviors:
> >>
>
- The macro __BIGGEST_ALIGNMENT__ is gcc-specific. If it is not defined
we'll just assume 16. This is correct for at least the common cases
and LLVM does not provide an equivalent macro.
- When linking U-Boot we're passing -T to the linker, and while gcc will
just pass this along with LLVM
Select 8-bit BCH ecc-scheme with s/w based error correction
- OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
Signed-off-by: Derald D. Woods
---
include/configs/am3517_evm.h | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/include/configs/am3517_evm.h b/include/con
- Add required UBI/UBIFS config definitions
- Add reasonable MTD partition layout
- Remove JFFS2 config definitions
- Drop some CFI verbage and definitions
- Make comment 'one-liners' truly one line
- Improve readability and content arrangement
Signed-off-by: Derald D. Woods
---
configs/am3517_e
This patch series updates NAND support for the LogicPD AM3517 EVM/EXP
development boards and their corresponding System On Modules.
OMAP3: am3517_evm: Use BCH8 ECC for NAND
include/configs/am3517_evm.h | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
OMAP3: am3517_e
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Tom,
I finally was able to do some coding and so:
On 25.02.2016 00:42, Tom Rini wrote:
> On Sun, Feb 07, 2016 at 09:57:20PM +0100, Mateusz Kulikowski wrote:
[...]
>> - Rebased to recent master
>
> Please note that I see a lot of warnings when b
On 02/05/2016 09:19 PM, Stephen Warren wrote:
On 02/05/2016 02:43 PM, Eric Anholt wrote:
For Raspberry Pi, we had the input clock rate to the pl011 fixed in
the rpi.c file, but it may be changed by firmware due to user changes
to config.txt. Since the firmware always sets up the uart (default
1
On 03/05/2016 06:53 PM, Anand Moon wrote:
> Hi Marek,
Hi!
> On 5 March 2016 at 18:00, Marek Vasut wrote:
>> On 03/05/2016 09:43 AM, Anand Moon wrote:
>>> From: Ted Chen
>>>
>>> From: Ted Chen
>>>
>>> type is USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION.
>>> To: ma...@denx.de, swar...@nvidi
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