On 08/14/2015 09:12 PM, Bin Meng wrote:
> On Sat, Aug 15, 2015 at 10:57 AM, Stephen Warren
> wrote:
>> On 08/14/2015 05:18 PM, Simon Glass wrote:
>>> Hi,
>>>
>>> On 14 August 2015 at 16:51, Stephen Warren wrote:
On 08/14/2015 04:40 PM, Bin Meng wrote:
>
> On Sat, Aug 15, 2015 at 12:
On 08/13/2015 06:23 AM, Tom Rini wrote:
> On Mon, Aug 03, 2015 at 12:36:58PM +0300, Nikita Kiryanov wrote:
>
>> Add option to set shell prompt string from menuconfig and migrate
>> boards globally.
>>
>> The migration is done as follows:
>> - Boards that explicitly and unconditionally set CONFIG
On 08/14/2015 01:20 PM, Simon Glass wrote:
> Hi Stephen,
>
> On 10 August 2015 at 21:47, Stephen Warren wrote:
>> On 08/07/2015 07:42 AM, Simon Glass wrote:
>>> Enable device tree control so that we can use driver model fully and avoid
>>> using platform data.
>>
>> I'm still not convinced about
Hi,
I noticed that this morning when I do git fetch it always fails with
"Connection reset by peer" message.
$ git fetch x86
fatal: read error: Connection reset by peer
Also patchwork is not updating any new patches. I guess the denx.ge
server is running into some problems again.
Regards,
Bin
_
On 08/14/2015 04:40 PM, Bin Meng wrote:
On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
Hi Stephen,
On 14 August 2015 at 10:58, Stephen Warren wrote:
On 08/14/2015 10:50 AM, Simon Glass wrote:
Hi Bin,
On 14 August 2015 at 03:18, Bin Meng wrote:
Hi,
Currently there are 5 dm serial
Fifo width could be different on different socs, e.g. stv0991 & altera soc
have different fifo width.
Signed-off-by: Vikas Manocha
---
Changes in v3: none
Changes in v2: Rebased to master
arch/arm/dts/socfpga.dtsi |1 +
arch/arm/dts/stv0991.dts |1 +
drivers/spi/cadence_qspi
Indirect read/write start addresses are flash start addresses for indirect read
or write transfers. These should be absolute flash addresses instead of
offsets.
Signed-off-by: Vikas Manocha
---
Changes in v3: none
Changes in v2: Rebased to master
drivers/spi/cadence_qspi_apb.c |6 --
1
On 08/12/2015 08:56 PM, Simon Glass wrote:
> Hi Stephen,
>
> On 11 August 2015 at 08:55, Stephen Warren wrote:
>> The existing FAT filesystem implementation in U-Boot has some bugs that
>> are tricky to fix cleanly without significant rework of the code. For
>> example, see:
>>
>> http://lists.de
Hi Simon,
On Tue, Aug 11, 2015 at 9:39 PM, Simon Glass wrote:
> Update this driver to support driver model.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> drivers/net/e1000.c | 137
>
> drivers/net/e1000.h | 4 ++
> 2 fil
On Sat, Aug 15, 2015 at 10:56 AM, Stephen Warren wrote:
> On 08/14/2015 05:57 PM, Bin Meng wrote:
>> Hi,
>>
>> On Sat, Aug 15, 2015 at 7:18 AM, Simon Glass wrote:
>>> Hi,
>>>
>>> On 14 August 2015 at 16:51, Stephen Warren wrote:
On 08/14/2015 04:40 PM, Bin Meng wrote:
>
> On Sat, Au
On Fri, Aug 14, 2015 at 9:56 PM, Simon Glass wrote:
> Hi,
>
> On 13 August 2015 at 09:14, Sergey Temerkhanov
> wrote:
>> This commit adds functions issuing calls to firmware. This allows
>> to use services such as PSCI provided by firmware, e.g. ATF
>
> What is PSCI? ATF? SMC? What firmware? Ple
On 08/14/2015 05:57 PM, Bin Meng wrote:
> Hi,
>
> On Sat, Aug 15, 2015 at 7:18 AM, Simon Glass wrote:
>> Hi,
>>
>> On 14 August 2015 at 16:51, Stephen Warren wrote:
>>> On 08/14/2015 04:40 PM, Bin Meng wrote:
On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
>
> Hi Stephen,
Hi,
On Sat, Aug 15, 2015 at 7:18 AM, Simon Glass wrote:
> Hi,
>
> On 14 August 2015 at 16:51, Stephen Warren wrote:
>> On 08/14/2015 04:40 PM, Bin Meng wrote:
>>>
>>> On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
Hi Stephen,
On 14 August 2015 at 10:58, Stephen Warren
This patchset:
- fixes trigger base & transfer start address register programming. This fix
superseeds the previous patch "spi: cadence_qspi: Fix the indirect ahb trigger
address setting".
- adds support to get fifo width from device tree
Changes in v3:
- removed two patches which were bypassing t
On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
> Hi Stephen,
>
> On 14 August 2015 at 10:58, Stephen Warren wrote:
>> On 08/14/2015 10:50 AM, Simon Glass wrote:
>>>
>>> Hi Bin,
>>>
>>> On 14 August 2015 at 03:18, Bin Meng wrote:
Hi,
Currently there are 5 dm serial drive
On 08/14/2015 05:18 PM, Simon Glass wrote:
> Hi,
>
> On 14 August 2015 at 16:51, Stephen Warren wrote:
>> On 08/14/2015 04:40 PM, Bin Meng wrote:
>>>
>>> On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
Hi Stephen,
On 14 August 2015 at 10:58, Stephen Warren wrote:
>
The doc has a misleading 'make menuconfig' when building the EFI
application and payload. Clarify this and also update information
on test with QEMU.
Signed-off-by: Bin Meng
---
Changes in v2:
- incorporate comments from Igor, clarify boolean options
doc/README.efi | 32 +-
On Fri, Aug 14, 2015 at 02:59:30PM -0700, York Sun wrote:
> On 08/13/2015 06:23 AM, Tom Rini wrote:
> > On Mon, Aug 03, 2015 at 12:36:58PM +0300, Nikita Kiryanov wrote:
> >
> >> Add option to set shell prompt string from menuconfig and migrate
> >> boards globally.
> >>
> >> The migration is don
On 12 August 2015 at 08:15, Simon Glass wrote:
> On 10 August 2015 at 10:09, Masahiro Yamada
> wrote:
>> This can be simply written with list_for_each_entry(), maybe
>> this macro was not necessary in the first place.
>>
>> Signed-off-by: Masahiro Yamada
>> ---
>>
>> include/dm/uclass.h | 9 ++-
On Fri, Aug 14, 2015 at 11:46 PM, Marek Vasut wrote:
> On Friday, August 14, 2015 at 05:14:09 PM, Sergey Temerkhanov wrote:
>> This patch fixes a potential NULL pointer dereference arising on
>> non-present/non-initialized xHCI controllers and adds some error
>> handling to xHCI code
>>
>> Signed-
On Friday, August 14, 2015 at 05:14:09 PM, Sergey Temerkhanov wrote:
> This patch fixes a potential NULL pointer dereference arising on
> non-present/non-initialized xHCI controllers and adds some error
> handling to xHCI code
>
> Signed-off-by: Sergey Temerkhanov
> Signed-off-by: Radha Mohan Chi
On some platforms pci devices behind bridge need to be probed (eg:
a pci uart on recent x86 chipset) before relocation. But we won't
bind all devices found during the enumeration. Only devices whose
driver with DM_FLAG_PRE_RELOC set will be bound. Any other generic
devices except bridges won't be b
To further limit the memory space, we only allow serial device
to be bound before relocation.
Signed-off-by: Bin Meng
---
drivers/pci/pci-uclass.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 4160274..b7dca0f
After fsp_init() returns, the stack has already been switched to a
place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
Enlarge the size of malloc() pool before relocation since we have
plenty of memory now.
Signed-off-by: Bin Meng
---
arch/x86/Kconfig | 7 +++
ar
Hi,
On 14 August 2015 at 16:51, Stephen Warren wrote:
> On 08/14/2015 04:40 PM, Bin Meng wrote:
>>
>> On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
>>>
>>> Hi Stephen,
>>>
>>> On 14 August 2015 at 10:58, Stephen Warren wrote:
On 08/14/2015 10:50 AM, Simon Glass wrote:
>
>>>
This adds a new driver to support National Semiconductor 16550
compatible UART device with PCI interface. The initial support
only adds device IDs for Intel Topcliff chipset UART devices.
Signed-off-by: Bin Meng
---
drivers/serial/Kconfig | 9 ++
drivers/serial/Makefile | 1 +
dr
CONFIG_SPL_NAND_SUPPORT gets used via IS_ENABLED so it must be defined
to 1, rather then just being defined.
While at remove 2 other unused NAND related defines from sunxi-common.h.
Signed-off-by: Hans de Goede
---
include/configs/sunxi-common.h | 7 +--
1 file changed, 1 insertion(+), 6 de
Move x86_fsp_init() call after initf_malloc() so that we can fix up
the gd->malloc_limit later.
Signed-off-by: Bin Meng
---
common/board_f.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index c959774..5155013 100644
--- a/common/b
Now we have a dedicated PCI UART driver, remove previous special
handling for PCI UART in the ns16550 driver.
Signed-off-by: Bin Meng
---
drivers/serial/ns16550.c | 31 ---
1 file changed, 31 deletions(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns1655
Use new PCI_SERIAL driver to support Topcliff integrated pci uart
devices on Intel Crown Bay board.
Signed-off-by: Bin Meng
---
arch/x86/dts/crownbay.dts | 8
configs/crownbay_defconfig | 1 +
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/x86/dts/crownbay.dts b/
With driver model pci conversion, the call to FspNotify was dropped.
Now add this call back as this is required by the FSP spec.
Signed-off-by: Bin Meng
---
arch/x86/cpu/queensbay/tnc.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arc
There is no need to reset the nand chip for every ecc-block read.
Signed-off-by: Hans de Goede
---
drivers/mtd/nand/sunxi_nand_spl.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c
b/drivers/mtd/nand/sunxi_nand_spl.c
i
Turn off the nand and dma clocks when we're done with the nand, this
puts the nand and dma controllers back into a clean state for when the
kernel boots.
Without this the kernel will not boot properly when it is build with
dma-controller support.
Signed-off-by: Hans de Goede
---
drivers/mtd/nan
nand_spl_load_image() always gets called with either CONFIG_SYS_TEXT_BASE
or spl_image.load_addr as destination, both of which are properly aligened,
and have plenty of space for "overshooting" up to
CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE bytes, as we read in
CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE bytes
Use SYS_NAND_SELF_INIT and only setup the pinmux and clocks when we are
actually using the nand.
Signed-off-by: Hans de Goede
---
board/sunxi/board.c | 12 +++-
drivers/mtd/nand/Kconfig | 1 +
drivers/mtd/nand/sunxi_nand_spl.c | 2 ++
3 files changed, 10 insertio
In syndrome mode we set the NFC_SEQ bit in the command register, so the
spare-area register is not used. Also the value currently being written is
actual wrong, the ecc sits at "column + CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE"
not just CONFIG_NAND_SUNXI_SPL_ECC_PAGE_SIZE.
So the current code only ser
We are using dma, so we should flush the cache before starting the dma,
and invalidate it once the dma is done.
Things are working without this by mostly luck, but lets not rely on that.
Signed-off-by: Hans de Goede
---
drivers/mtd/nand/sunxi_nand_spl.c | 8
1 file changed, 8 insertion
The BROM does not care / use bad page markings, instead it deals with
any bad pages in the first erase-block by simply trying to load "boot0"
from the first next erase-block.
This commit implements the same strategy for the sunxi spl nand code,
allowing it to boot from the backup boot partition wh
Properly config page-size in the nand ctl register, it seems that things
work fine without doing this, but still lets play it safe and properly
set the page-size.
Signed-off-by: Hans de Goede
---
drivers/mtd/nand/sunxi_nand_spl.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/m
Parametrize the lowlevel nand_read_page function, instead of directly
using the CONFIG_foo settings for page-size, etc. there and add a few
wrappers / helper functions for calling it.
This is a preparation patch for adding auto-detecting of the nand
parameters like the BROM does.
Signed-off-by: H
Auto detect the nand configuration parameters, like the BROM does.
This allows us to get rid of various Kconfig settings, and is
necessary to support generic boards like the mk802 which have seen
many production runs with different nands.
The full blown u-boot/kernel nand driver uses the nand id
Other then having a few less chip-select lines the nand controller
on sun4i, sun5i and sun7i is identical.
Signed-off-by: Hans de Goede
---
board/sunxi/board.c | 12 +---
drivers/mtd/nand/Kconfig | 4 ++--
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/board/sunxi/
We currently only use the spl nand code to get u-boot itself, which
_always_ is located on a syndrome partition. Once we figure out how
we are going to store the u-boot env on nand, we may need non syndrome
support, but even then there will likely be better ways to determine
whether to use syndrome
Sync the code for figuring out the ecc_mode and ecc_offset with the kernel
code. Keeping this in sync seems like a good idea in general, and it
fixes / adds support for ecc strengths of 56, 60 and 64 bits.
Signed-off-by: Hans de Goede
---
drivers/mtd/nand/sunxi_nand_spl.c | 58 --
From: Bin Meng
Intel FSP has the capability to walk through the microcode blocks
which are passed as the TempRamInit() parameter from U-Boot and
finds the most appropriate microcode which is suitable for the cpu
on which it is running. Now we've seen several steppings for Intel
BayTrail series pr
Since U-Boot and its device tree can grow we should check that it does not
overlap the regions above it. Track the ROM offset that U-Boot reaches and
check that other regions (written after U-Boot) do not interfere.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/ifdtool.c | 33 ++
This is incorrect since we require the -m parameter to the microcode tool.
Update the two examples to show this.
Signed-off-by: Simon Glass
---
Changes in v2: None
doc/README.x86 | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/doc/README.x86 b/doc/README.x86
index e7dc0
This file made it into mainline by mistake. Drop it.
Signed-off-by: Simon Glass
---
include/configs/odroid_xu3.h.rej | 10 --
1 file changed, 10 deletions(-)
delete mode 100644 include/configs/odroid_xu3.h.rej
diff --git a/include/configs/odroid_xu3.h.rej b/include/configs/odroid_xu3.
The Intel Firmware Support Package (FSP) requires that microcode be provided
very early before the device tree can be scanned. We already support adding
a pointer to the microcode data in a place where early init code can access.
However this just points into the device tree and can only point to
On Sat, Aug 15, 2015 at 02:26:20PM -0600, Simon Glass wrote:
> This file made it into mainline by mistake. Drop it.
>
> Signed-off-by: Simon Glass
Already fixed locally, thanks tho.
--
Tom
signature.asc
Description: Digital signature
___
U-Boot ma
The Intel Firmware Support Package (FSP) requires that microcode be provided
very early before the device tree can be scanned. We already support adding
a pointer to the microcode data in a place where early init code can access.
However this just points into the device tree and can only point to
The code to set up the microcode pointer in the ROM shares almost nothing
with the write_uboot() function.
Move it into its own function so it will be easier to extend.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/ifdtool.c | 105 +--
On Sunday, August 16, 2015 at 12:16:21 AM, Michael Heimpold wrote:
> In the rare case that an overflow occurs, propagate it.
Hi!
> Signed-off-by: Michael Heimpold
> Cc: Stefano Babic
> Cc: Marek Vasut
> CC: Fabio Estevam
> ---
> arch/arm/cpu/arm926ejs/mxs/mxs.c | 12 ++--
> 1 file
In the rare case that an overflow occurs, propagate it.
Signed-off-by: Michael Heimpold
Cc: Stefano Babic
Cc: Marek Vasut
CC: Fabio Estevam
---
arch/arm/cpu/arm926ejs/mxs/mxs.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c
When ifdtool collates the microcode into one place it effectively creates
a copy of the 'data' properties in the device tree microcode nodes. This
is wasteful since we now have two copies of the microcode in the ROM.
To avoid this, remove the microcode data from the device tree and shrink it
down.
On Wed, 2015-08-12 at 13:43 -0500, Andrew Ruder wrote:
> Cc: Marek Vasut
> Cc: Heiko Schocher
> Signed-off-by: Andrew Ruder
> ---
>
> This driver was written before the driver model stuff was really
> around (or at
> least based on a U-Boot version that only had very preliminary
> support) so
>
On Sun, 2015-08-16 at 02:57 +0200, Marek Vasut wrote:
> > Apart from the missing commit message.
> >
> > Signed-off-by: Marcel Ziswiler
>
> I think you're misunderstanding the meaning of a SoB line here, the
> SoB
> line is a certificate of origin. You didn't write the driver and/or
> you
> did
On Sunday, August 16, 2015 at 02:34:20 AM, Marcel Ziswiler wrote:
> On Wed, 2015-08-12 at 13:43 -0500, Andrew Ruder wrote:
> > Cc: Marek Vasut
> > Cc: Heiko Schocher
> > Signed-off-by: Andrew Ruder
> > ---
> >
> > This driver was written before the driver model stuff was really
> > around (or a
On Wed, 2015-08-12 at 12:24 -0500, Andrew Ruder wrote:
Just one nitty-gritty detail:
> diff --git a/include/configs/colibri_pxa270.h
> b/include/configs/colibri_pxa270.h
> index e3f0ab0..e7db8cf 100644
> --- a/include/configs/colibri_pxa270.h
> +++ b/include/configs/colibri_pxa270.h
> @@ -67,6 +6
On Sun, 2015-08-16 at 02:51 +0200, Marcel Ziswiler wrote:
> On Wed, 2015-08-12 at 12:24 -0500, Andrew Ruder wrote:
>
> Just one nitty-gritty detail:
>
> > diff --git a/include/configs/colibri_pxa270.h
> > b/include/configs/colibri_pxa270.h
> > index e3f0ab0..e7db8cf 100644
> > --- a/include/confi
On Sunday, August 16, 2015 at 03:13:15 AM, Marcel Ziswiler wrote:
> On Sun, 2015-08-16 at 02:57 +0200, Marek Vasut wrote:
> > > Apart from the missing commit message.
> > >
> > > Signed-off-by: Marcel Ziswiler
> >
> > I think you're misunderstanding the meaning of a SoB line here, the
> > SoB
>
Cleaning up order of include files by sorting them alphabetically
keeping in mind to leave common.h on top.
Signed-off-by: Marcel Ziswiler
---
arch/arm/cpu/pxa/pxa2xx.c | 4 ++--
arch/arm/cpu/pxa/timer.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/pxa/px
Cleaning up order of include files by sorting them alphabetically
keeping in mind to leave common.h on top.
Signed-off-by: Marcel Ziswiler
---
drivers/mmc/pxa_mmc_gen.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_ge
Cleaning up order of include files by sorting them alphabetically
keeping in mind to leave common.h on top.
Signed-off-by: Marcel Ziswiler
---
drivers/video/pxa_lcd.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c
i
Cleaning up order of include files by sorting them alphabetically
keeping in mind to leave common.h on top.
Signed-off-by: Marcel Ziswiler
---
drivers/usb/gadget/pxa27x_udc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/g
Cleaning up order of include files by sorting them alphabetically
keeping in mind to leave common.h on top.
Signed-off-by: Marcel Ziswiler
---
drivers/mmc/tegra_mmc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
inde
Add optional LCD support. Note that depending on the toolchain used
one might have to drop some other features to stay within the 0x4
size limit.
Signed-off-by: Marcel Ziswiler
---
include/configs/colibri_pxa270.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/co
Cleaning up order of include files by sorting them alphabetically
keeping in mind to leave common.h on top.
Signed-off-by: Marcel Ziswiler
---
drivers/serial/serial_pxa.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_
This is useful once Andrew's PXA I2C driver gets merged.
Signed-off-by: Marcel Ziswiler
---
include/configs/colibri_pxa270.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index a8cdde5..a250541 100644
--- a/incl
Add some more NOR flash details like size, bus width and lock/unlock
time outs.
Signed-off-by: Marcel Ziswiler
---
include/configs/colibri_pxa270.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index e3f0ab0..08ebd76
On Sunday, August 16, 2015 at 04:16:32 AM, Marcel Ziswiler wrote:
> Fix boot hang caused by incompatible libgcc which has been observed
> when using later Linaro toolchains like
> gcc-linaro-arm-linux-gnueabihf-2012.09-20120921_linux or
> gcc-linaro-4.9-2014.11-x86_64_arm-linux-gnueabihf.
That's n
Fix boot hang caused by incompatible libgcc which has been observed
when using later Linaro toolchains like
gcc-linaro-arm-linux-gnueabihf-2012.09-20120921_linux or
gcc-linaro-4.9-2014.11-x86_64_arm-linux-gnueabihf.
Signed-off-by: Marcel Ziswiler
---
configs/colibri_pxa270_defconfig | 1 +
1 fi
Looks like the define CONFIG_SYS_LCD_PXA_NO_L_BIAS is not used anywhere
else throughout the U-Boot sources any more. Drop it.
Signed-off-by: Marcel Ziswiler
---
include/configs/palmtreo680.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/palmtreo680.h b/include/configs/palmt
Optimized spi-flash bar writing code and also removed
unnecessary bank_sel in read_ops.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
drivers/mtd/spi/sf_ops.c | 43 +--
1 file changed, 13 insertions(+), 30
Add spi_flash_read_bar function for reading bar and discovering
bar commands at probe time.
Signed-off-by: Jagan Teki
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
drivers/mtd/spi/sf_probe.c | 54 ++
1 file changed, 35 insertions(+), 19 deletio
Current flash wait_ready logic is not modular to add new
register status check, hence few of the logic is used from
Linux spi-nor framework.
Below are the sf speed runs with 'sf update' on whole flash, 16MiB.
=> sf update 0x100 0x0 0x100
device 0 whole chip
16777216 bytes written, 0 bytes ski
Use the flash->flags for generic usage, not only for dm-spi-flash,
this will be used for future flag additions.
Signed-off-by: Jagan Teki
Cc: Bin Meng
---
drivers/mtd/spi/sf_internal.h | 4
drivers/mtd/spi/sf_probe.c| 6 ++
include/spi_flash.h | 4 ++--
3 files changed, 8
Hi Michal/Siva,
On 16 August 2015 at 14:13, Jagan Teki wrote:
> BAR and spi_flash_cmd_wait_ready are updated to make more
> module to add new status checks.
>
> Jagan Teki (6):
> spi: zynq_spi: Remove unneeded headers
> sf: Return proper bank_sel, if flash->bank_curr == bank_sel
> sf: Make
Hi Zhiqiang,
On 16 August 2015 at 14:16, Jagan Teki wrote:
> Hi Michal/Siva,
>
> On 16 August 2015 at 14:13, Jagan Teki wrote:
>> BAR and spi_flash_cmd_wait_ready are updated to make more
>> module to add new status checks.
>>
>> Jagan Teki (6):
>> spi: zynq_spi: Remove unneeded headers
>> s
Instead of creating a rockchip SPL sd card image with 32Kb of zeros
which can be written to the start of an SD card, create the images with
only the useful data that should be written to an offset of 32Kb on the
SD card.
The first 32 kilobytes aren't needed for bootup and only serve as
convenient
Drop the no longer accurate part of the USB_MUSB_SUNXI Kconfig help text,
since the musb-host code now supports the device-model, ehci and musb in
host mode can both be enabled at the same time without issues.
Signed-off-by: Hans de Goede
---
drivers/usb/musb-new/Kconfig | 4 +---
1 file changed
During mmc initialize probe all devices with the MMC Uclass if build
with CONFIG_DM_MMC
Signed-off-by: Sjoerd Simons
---
drivers/mmc/mmc.c | 32
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index da47037..a
This patchset allows u-boot on RK3288 device to load and boot kernels
from MMC using the standard distro boot commands. Patchset is on top of
the rockchip-working branch of u-boot dm
There are some small oddities with the support:
- Linux crashes when try to use the FDT if it's re-allocated to me
Add CONFIG_MMC0_CD_PIN to various boards, this stoos the SPL from still
trying to access the sdcard when there is none (e.g. when booting from
nand).
Signed-off-by: Hans de Goede
---
configs/A10-OLinuXino-Lime_defconfig | 1 +
configs/A13-OLinuXinoM_defconfig | 1 +
configs/A13-OLinuXino_def
With the unified / cleaned up default display output selection changes,
which were done as part of adding composite video out support, our
example LCD_MODE line in the A13-OLinuxIno defconfigs causes the display
code to setup a LCD console by default, rather then a VGA console.
Given that the LCD
With LED support enabled the SPL easily goes over the size limit (e.g.
with both Debians gcc 4.9 and 5.2 cross-compilers). Turn off LED support
in the SPL to reduce the size just enough for those compilers.
Signed-off-by: Sjoerd Simons
---
include/configs/firefly-rk3288.h | 1 -
1 file changed,
Booting the kernel fails on RK3288 (and probably other rockchip SoCs)
when the i-cache is disabled/flushed before d-cache.
I have not investigated whether this is due to u-boot hanging or whether
it's very early in the linux boot, but following the approach of the
varoius rockchip u-boot forks (fi
MMC support works now, so it can be dropped from the todo
Signed-off-by: Sjoerd Simons
---
doc/README.rockchip | 1 -
1 file changed, 1 deletion(-)
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 347fc05..feb11ff 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -161,
Now that MMC works in u-boot add config distro command support to start
Linux in a standard fashion. One oddity here is that linux fails to load
the fdt is relocated to above 512MB, so set fdt_high to make sure it's
loaded below that.
Signed-off-by: Sjoerd Simons
---
include/configs/rk3288_comm
On Saturday, August 15, 2015 at 12:28:10 AM, Sergei Temerkhanov wrote:
> On Fri, Aug 14, 2015 at 11:46 PM, Marek Vasut wrote:
> > On Friday, August 14, 2015 at 05:14:09 PM, Sergey Temerkhanov wrote:
> >> This patch fixes a potential NULL pointer dereference arising on
> >> non-present/non-initiali
On Sunday, August 16, 2015 at 10:03:51 AM, Marcel Ziswiler wrote:
> On 16 August 2015 05:31:58 CEST, Marek Vasut wrote:
> >On Sunday, August 16, 2015 at 04:16:32 AM, Marcel Ziswiler wrote:
> >
> >I would suggest that we drop this patch, but I would also suggest that
> >we do
> >the same thing kern
On Sunday, August 16, 2015 at 04:16:26 AM, Marcel Ziswiler wrote:
> Cleaning up order of include files by sorting them alphabetically
> keeping in mind to leave common.h on top.
>
> Signed-off-by: Marcel Ziswiler
I cannot find 03/11 , why ?
I applied all but 03/11 and 07/11 to u-boot-pxa/master
On 16 August 2015 18:53:40 CEST, Marek Vasut wrote:
>I cannot find 03/11 , why ?
Ah, I believe that one is actually meant for Tegra rather than PXA and will
hopefully be picked up by Tom.
>I applied all but 03/11 and 07/11 to u-boot-pxa/master though :)
Thanks, Marek. I hope we can sort out
On Sunday, August 16, 2015 at 10:43:49 AM, Jagan Teki wrote:
> Current flash wait_ready logic is not modular to add new
> register status check, hence few of the logic is used from
> Linux spi-nor framework.
>
> Below are the sf speed runs with 'sf update' on whole flash, 16MiB.
>
> => sf update
On Sunday, August 16, 2015 at 07:16:09 PM, Marcel Ziswiler wrote:
> On 16 August 2015 18:53:40 CEST, Marek Vasut wrote:
> >I cannot find 03/11 , why ?
>
> Ah, I believe that one is actually meant for Tegra rather than PXA and will
> hopefully be picked up by Tom.
Errr, right. What weird sort of
Le jeudi 13 août 2015 à 08:13 -0400, Tom Rini a écrit :
> On Fri, Aug 07, 2015 at 11:44:46AM +0200, Paul Kocialkowski wrote:
> > Le mardi 04 août 2015 à 14:27 -0400, Tom Rini a écrit :
> > > On Tue, Aug 04, 2015 at 08:22:39PM +0200, Paul Kocialkowski
> > > wrote:
> > > > Le mardi 04 août 2015 à 14
Hi Stephen,
On 14 August 2015 at 20:57, Stephen Warren wrote:
> On 08/14/2015 05:18 PM, Simon Glass wrote:
>> Hi,
>>
>> On 14 August 2015 at 16:51, Stephen Warren wrote:
>>> On 08/14/2015 04:40 PM, Bin Meng wrote:
On Sat, Aug 15, 2015 at 12:59 AM, Simon Glass wrote:
>
> Hi Ste
Hi Marcel,
On 15 August 2015 at 20:16, Marcel Ziswiler wrote:
> Cleaning up order of include files by sorting them alphabetically
> keeping in mind to leave common.h on top.
>
> Signed-off-by: Marcel Ziswiler
> ---
>
> drivers/mmc/tegra_mmc.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 del
Hi Saket,
On 15 August 2015 at 23:10, Saket Sinha wrote:
> Implement write_acpi_table() to create a minimal working ACPI table.
> This includes writing FACS, XSDT, RSDP, FADT, MCFG, MADT, DSDT & SSDT
> ACPI table entries.
>
> Use a Kconfig option GENERATE_ACPI_TABLE to tell U-Boot whether we need
Hi Saket,
On 15 August 2015 at 23:10, Saket Sinha wrote:
> The DSDT table contains a bytecode that is executed by a driver in the kernel.
>
> Signed-off-by: Saket Sinha
> ---
>
> arch/x86/cpu/qemu/Makefile | 2 +-
> arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 78 +++
> arch/x86/
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