Hello.
Im trying to compile U-Boot for a RK3168 cpu with "make rk30xx", but when
flashing the resulting binary (RK3066Loader_miniall.bin) I receive a
"check chip fail" error and cannot flash the new bootloader.
Im guessing that the rk30xx config is not compatible with this cpu?
This is a tablet
Hello Vladimir,
On Tue, 14 Jul 2015 23:23:57 +0300, Vladimir Zapolskiy
wrote:
> The change adds support of LPC32xx SLC NAND controller.
>
> LPC32xx SoC has two different mutually exclusive NAND controllers to
> communicate with single and multiple layer chips.
>
> This simple driver allows to s
On 14/07/2015 21:05, Baruch Siach wrote:
> Hi Stefano,
>
> On Thu, Jul 09, 2015 at 06:04:17PM +0200, Stefano Babic wrote:
>> On 09/07/2015 17:19, Baruch Siach wrote:
>>> When dcd_len is 0 the Write Data command that the set_dcd_rst_v2() routine
>>> generates is empty. This causes HAB to complain t
Dear Tom,
In message <20150714175627.GJ23886@bill-the-cat> you wrote:
>
> I've pushed v2015.07 out to the repository and tarballs should exist
> soon.
Tarballs are both on the ACD [1] and the FTP server [2].
[1]
https://www.amazon.com/clouddrive/share/zgc1Jd4CgnLfkP0DypkZAvXAM8Hz3IOiHbM9edV1PB
This patch addresses a problem mentioned recently on this mailing list:
[1].
In that posting a LS1021 based system was locking up at about 5 minutes
after boot, but the problem was mysteriously related to the toolchain
used for building u-boot. Debugging the problem reveals a stuck
interrupt 29 o
Hi Stefan,
On 14/07/2015 12:29, Stefan Agner wrote:
>>
>> Applied to u-boot-imx, thanks !
>
> Sorry, just stumbled over this message now.
>
> We discussed exactly this issue already more than a year ago, see:
> http://lists.denx.de/pipermail/u-boot/2014-April/177580.html
I admit that I have fo
Hello all,
we're planning some reorganization / updates for our servers:
1. We will move all git repositories to a new, faster machine.
In this process, the web interface will change (moving from
gitweb to cgit). In this process, for a (hopefully) short time,
access to the git repositor
Hello Stefan,
On Tue, 14 Jul 2015 12:29:52 +0200, Stefan Agner
wrote:
> Hi Stefano,
>
> On 2015-07-10 10:14, Stefano Babic wrote:
> > On 19/06/2015 14:18, Albert ARIBAUD (3ADEV) wrote:
> >> imximage header size is 4-byte, not 8-byte aligned.
> >> This produces .imx images that a Vybrid cannot bo
Hello Stefano,
On Wed, 15 Jul 2015 09:19:55 +0200, Stefano Babic
wrote:
> > I think my patch back then solves the issue nicer. The struct dcd_v2_t
> > is not the reason the whole header is not aligned by 8-byte, it is a
> > problem of the boot_data_t header which is 12 bytes long. So inserting
>
The core support for the pinctrl drivers for all the UniPhier SoCs.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/Kconfig | 2 +
drivers/pinctrl/Makefile | 2 +
drivers/pinctrl/uniphier/Kconfig | 7 ++
drivers/pinctrl/u
Add pinmux support for UniPhier PH1-sLD8 SoC.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/uniphier/Kconfig| 4 ++
drivers/pinctrl/uniphier/Makefile | 1 +
drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c | 65 +
3 files changed, 70 insertion
Add pinmux support for UniPhier PH1-Pro4 SoC.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/uniphier/Kconfig| 4 ++
drivers/pinctrl/uniphier/Makefile | 1 +
drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c | 69 +
3 files changed, 74 insertion
I'd like to propose antoher pinctrl design, which is closer to Linux's one.
1/7 adds the uclass support.
2/7 - 5/7 show how low-level drivers can be implemeted on my SoCs as example.
You can implement them in your own way, but they are often done with
architecture-specific operation + SoC-speci
Add pinmux support for UniPhier PH1-LD4 SoC.
Signed-off-by: Masahiro Yamada
---
drivers/pinctrl/uniphier/Kconfig | 4 ++
drivers/pinctrl/uniphier/Makefile | 2 +
drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c | 69 ++
3 files changed, 75 insertions(+
Now, a simple pinctrl patch is being proposed by Simon.
http://patchwork.ozlabs.org/patch/487801/
In the design above, as you see, the uclass is just like a wrapper layer
to invoke .request and .get_periph_id of low-level drivers.
In other words, it is Do-It-Yourself thing, so it is up to you how
The pinctrl driver is tightly integrated with the each SoC,
so it is reasonable to select it from Kconfig.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
ind
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ph1-ld4.dtsi | 30 ++
arch/arm/dts/uniphier-ph1-pro4.dtsi | 34
arch/arm/dts/uniphier-ph1-sld8.dtsi | 30 ++
arch/arm/dts/uniphier-pinctrl.dtsi | 80 +
4 files
This patch series mainly add MP support to QEMU as well as some
other necessary fixes for x86.
Verified by booting Linux kernel on QEMU i440FX and Q35, and make
sure I/O APIC interrupt is being used by the kernel with the help
of MP table provided by U-Boot.
This series is the prerequisite for th
We need walk through all functions within a PCI device and assign
their IRQs accordingly.
Signed-off-by: Bin Meng
---
arch/x86/cpu/pci.c | 27 +--
arch/x86/include/asm/pci.h | 3 +--
arch/x86/lib/pirq_routing.c | 3 +--
3 files changed, 19 insertions(+), 14 d
Turn on cache on the pci option rom area to improve the performance.
Signed-off-by: Bin Meng
---
arch/x86/cpu/cpu.c | 27 ---
arch/x86/include/asm/mtrr.h | 2 ++
2 files changed, 22 insertions(+), 7 deletions(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/c
Add a RTC node in the device tree to enable DM RTC support.
Signed-off-by: Bin Meng
---
arch/x86/dts/chromebook_link.dts| 1 +
arch/x86/dts/chromebox_panther.dts | 1 +
arch/x86/dts/galileo.dts| 1 +
arch/x86/dts/minnowmax.dts | 1 +
arch/x86/dts/qemu-x86_i440fx.dts
Currently during writing MP table I/O interrupt assignment entry, we
assume the PIRQ is directly mapped to I/O APIC INTPIN#16-23, which
however is not always the case on some platforms.
Signed-off-by: Bin Meng
---
arch/x86/include/asm/mpspec.h | 17 +
arch/x86/lib/mpspec.c
IRQ 0 is reserved and should not be assigned to pci device.
Signed-off-by: Bin Meng
---
arch/x86/cpu/pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index fdfd5f7..f8da080 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -172,6 +172
On some platforms the I/O APIC interrupt pin#0-15 may be connected
to platform pci devices' interrupt pin. In such cases the legacy ISA
IRQ is not available so we should not write ISA interrupt entry if
it is already occupied.
Signed-off-by: Bin Meng
---
arch/x86/lib/mpspec.c | 26 +
The PIIX3 chipset does not integrate an I/O APIC, instead it supports
connecting to an external I/O APIC which needs to be enabled manually.
Signed-off-by: Bin Meng
---
arch/x86/cpu/qemu/pci.c | 7 ++-
arch/x86/include/asm/arch-qemu/qemu.h | 6 +-
2 files changed, 11 inser
The existing MP initialization process works on QEMU multicore,
except that we need increase delay time for BSP to wait APs to
show up online. Use a Kconfig option to control the delay time
factor to the normal one.
Signed-off-by: Bin Meng
---
arch/x86/cpu/mp_init.c | 4
arch/x8
Turn on PCIe ECAM address range decoding on Q35.
Signed-off-by: Bin Meng
---
arch/x86/cpu/qemu/pci.c | 4
arch/x86/include/asm/arch-qemu/qemu.h | 4
2 files changed, 8 insertions(+)
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c
index acbd922..2e94456 1
Enable writing MP table for QEMU boads (i440fx and q35).
Signed-off-by: Bin Meng
---
arch/x86/cpu/qemu/pci.c| 34 +++---
configs/qemu-x86_defconfig | 1 +
2 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu
Memory footprint analysis:
This uclass support increased 2.5KB on my board (ARM).
Additional 1-2KB would be necessary to implement your
low-level driver.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Wolfgang,
On 07/15/15 10:24, Wolfgang Denk wrote:
> Hello all,
>
> we're planning some reorganization / updates for our servers:
>
> 1. We will move all git repositories to a new, faster machine.
>In this process, the web interface will change (moving from
>gitweb to cgit). In this p
Hi Simon,
It seems that we don't update the source image name to u-boot-dtb.bin in
case of enabling CONFIG_OF_SEPARATE when generate u-boot-with-spl.bin file.
ifdef CONFIG_TPL
SPL_PAYLOAD := tpl/u-boot-with-tpl.bin
else
SPL_PAYLOAD := u-boot.bin
endif
OBJCOPYFLAGS_u-boot-with-spl.bin = -I bina
Hello Albert,
On 15.07.2015 10:05, Albert ARIBAUD wrote:
> Hello Vladimir,
>
> On Tue, 14 Jul 2015 23:23:57 +0300, Vladimir Zapolskiy
> wrote:
>> The change adds support of LPC32xx SLC NAND controller.
>>
>> LPC32xx SoC has two different mutually exclusive NAND controllers
>> to communicate wi
Hi Wolfgang,
On Wed, Jul 15, 2015 at 3:24 PM, Wolfgang Denk wrote:
> Hello all,
>
> we're planning some reorganization / updates for our servers:
>
> 1. We will move all git repositories to a new, faster machine.
>In this process, the web interface will change (moving from
>gitweb to cgit
Hello Masahiro,
On Wed, 15 Jul 2015 17:16:16 +0900, Masahiro Yamada
wrote:
> Now, a simple pinctrl patch is being proposed by Simon.
> http://patchwork.ozlabs.org/patch/487801/
>
> In the design above, as you see, the uclass is just like a wrapper layer
> to invoke .request and .get_periph_id o
On Wed, Jul 8, 2015 at 4:53 AM, Simon Glass wrote:
> This binding differs from that of Linux. Update it and change existing
> users.
>
> Signed-off-by: Simon Glass
I'm confused by this. Isn't devicet...@vger.kernel.org the place to discuss
device tree bindings? This is sent only to the U-Boot l
2015-07-15 17:53 GMT+09:00 Albert ARIBAUD :
> Hello Masahiro,
>
> On Wed, 15 Jul 2015 17:16:16 +0900, Masahiro Yamada
> wrote:
>
>> Now, a simple pinctrl patch is being proposed by Simon.
>> http://patchwork.ozlabs.org/patch/487801/
>>
>> In the design above, as you see, the uclass is just like a
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.
Signed-off-by: Anton Schubert
Cc: Stefan Roese
Cc: Luka Perkov
---
arch/arm/mach-mvebu/include/mach/soc
Wolfgang wrote...
{snip}
> 2. For some time now, we provide not only the classic FTP server for
>download of the U-Boot release tarballs, but also a public
>directory in the Amazon Cloud Drive [1]. The ACD is supposed to
>provide much better connectivity (especially for non-european
I forgot to mention this:
This series needs libfdt fixes as prerequisites:
http://patchwork.ozlabs.org/patch/495166/
http://patchwork.ozlabs.org/patch/495168/
This patch depends on some libfdt helpers that are fatally buggy.
Masahiro
___
U-Boot maili
The mv78260 needs atleast 10ms after setting the ddr3 training patterns
or else the cpu will hang.
This patch increases said delay to 20ms just to be safe.
Signed-off-by: Anton Schubert
Cc: Stefan Roese
Cc: Luka Perkov
---
drivers/ddr/mvebu/ddr3_hw_training.c | 2 +-
1 file changed, 1 insert
Hi,
Isn't this the same patch as a couple of days ago [2], which I replied
to [3]?
On Wed, Jul 15, 2015 at 08:13:05AM +0100, Alison Wang wrote:
> This patch addresses a problem mentioned recently on this mailing list:
> [1].
>
> In that posting a LS1021 based system was locking up at about 5 min
Hello Vladimir,
On Wed, 15 Jul 2015 11:49:01 +0300, Vladimir Zapolskiy
wrote:
> Hello Albert,
>
> On 15.07.2015 10:05, Albert ARIBAUD wrote:
> > Hello Vladimir,
> >
> > On Tue, 14 Jul 2015 23:23:57 +0300, Vladimir Zapolskiy
> > wrote:
> >> The change adds support of LPC32xx SLC NAND controller
Hi, Mark
> -Original Message-
> From: Mark Rutland [mailto:mark.rutl...@arm.com]
> Sent: Wednesday, July 15, 2015 5:14 PM
> To: Wang Huan-B18965
> Cc: Sun York-R58495; u-boot@lists.denx.de; Wang Huan-B18965;
> marc.zyng...@arm.com
> Subject: Re: [U-Boot] [PATCH] arm: ls1021a: Ensure LS1021
Hello Wolfgang,
Wolfgang Denk wrote on 2015-07-15:
> 2. For some time now, we provide not only the classic FTP server for
>download of the U-Boot release tarballs, but also a public
>directory in the Amazon Cloud Drive [1]. The ACD is supposed to
>provide much better connectivity (es
To make it easier to use patman on other projects add a distutils style
installer. Now patman can be installed with
cd u-boot/tools/patman && python setup.py install
There are also the usual distutils options for creating source/binary
distributions of patman.
Signed-off-by: Chris Packham
---
On Wed, Jul 15, 2015 at 11:38 AM, Arnd Bergmann wrote:
> The CHRP ISA binding defines that a 8250 compatible UART must have this
> property:
>
> "clock-frequency" S
>
> Standard property, encoded as with encode-int, that shall be the baud-rate
> generator's clock input frequency (in hertz).
From: Shaohui Xie
T4160 and T4080 support same serdes options, which serdes 2 & 3 support 8
Lanes, same as T4240, but serdes 1 & 4 support only 4 Lanes, Lanes A, B,
C, D are not available, updated the serdes table accordingly with
some minor fix.
Signed-off-by: Shaohui Xie
---
arch/powerpc/cpu
On Wednesday 15 July 2015 11:00:59 Linus Walleij wrote:
> On Wed, Jul 8, 2015 at 4:53 AM, Simon Glass wrote:
>
> > This binding differs from that of Linux. Update it and change existing
> > users.
> >
> > Signed-off-by: Simon Glass
>
> I'm confused by this. Isn't devicet...@vger.kernel.org the
On Wednesday 15 July 2015 12:08:05 Linus Walleij wrote:
> On Wed, Jul 15, 2015 at 11:38 AM, Arnd Bergmann wrote:
>
> > The CHRP ISA binding defines that a 8250 compatible UART must have this
> > property:
> >
> > "clock-frequency" S
> >
> > Standard property, encoded as with encode-int, that
Hi Albert,
On 2015-07-15 09:54, Albert ARIBAUD wrote:
> Hello Stefano,
>
> On Wed, 15 Jul 2015 09:19:55 +0200, Stefano Babic
> wrote:
>
>> > I think my patch back then solves the issue nicer. The struct dcd_v2_t
>> > is not the reason the whole header is not aligned by 8-byte, it is a
>> > prob
Hi Anton,
On 15.07.2015 11:01, Anton Schubert wrote:
> This patch initializes the SATA address windows on Armada XP and
> allows it to work with the existing mvsata_ide driver.
> It also adds the necessary configuration for the db-mv784mp-gp board.
But it doesn't enable the IDE interface and comm
On Tue, Jul 14, 2015 at 01:48:45PM -0600, Simon Glass wrote:
> +Scott, Masahiro
>
> Hi Thierry,
>
> On 25 March 2015 at 17:23, Simon Glass wrote:
> > Hi Thierry,
> >
> > On 8 September 2014 at 09:02, Simon Glass wrote:
> >> Applied to u-boot-fdt/next, thanks!
> >
> > Did you submit these patche
Hello Thierry,
On Wed, 15 Jul 2015 13:17:18 +0200, Thierry Reding
wrote:
> On Tue, Jul 14, 2015 at 01:48:45PM -0600, Simon Glass wrote:
> > +Scott, Masahiro
> >
> > Hi Thierry,
> >
> > On 25 March 2015 at 17:23, Simon Glass wrote:
> > > Hi Thierry,
> > >
> > > On 8 September 2014 at 09:02, Sim
Hello Stefan (and sorry for the duplicate),
On Wed, 15 Jul 2015 12:41:59 +0200, Stefan Agner
wrote:
> Hi Albert,
>
> On 2015-07-15 09:54, Albert ARIBAUD wrote:
> > Hello Stefano,
> >
> > On Wed, 15 Jul 2015 09:19:55 +0200, Stefano Babic
> > wrote:
> >
> >> > I think my patch back then solves
On Wed, Jul 15, 2015 at 01:35:26PM +0200, Albert ARIBAUD wrote:
> Hello Thierry,
>
> On Wed, 15 Jul 2015 13:17:18 +0200, Thierry Reding
> wrote:
> > On Tue, Jul 14, 2015 at 01:48:45PM -0600, Simon Glass wrote:
> > > +Scott, Masahiro
> > >
> > > Hi Thierry,
> > >
> > > On 25 March 2015 at 17:23,
There are only two SoC-specific headers for this architecture:
- arch/nds32/include/asm/arch-ag101/ag101.h
- arch/nds32/include/asm/arch-ag102/ag102.h
Those two have different file names, so there is no advantage to
include them via symbolic linked directory.
Signed-off-by: Masahiro Yamada
---
1/2: refactors a little because NDS32 actually need not the symbolic link
2/2: introduce a new config to avoid broken symbolic links.
Masahiro Yamada (2):
nds32: include instead of
kbuild: create symbolic link only for ARM, AVR32, SPARC, PowerPC, x86
arch/Kconfig | 7 +
The symbolic link to SoC/CPU specific header directory is created
during the build, while it is only necessary for ARM, AVR32, SPARC,
x86, and some CPUs of PowerPC. For the other architectures, it just
results in a broken symbolic link.
Introduce CONFIG_CREATE_ARCH_SYMLINK to not create unneeded
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.
Changes v2:
- add second bus offset
- only allow one device per bus
- enable CONFIG_CMD_IDE per default
Hi Anton,
On 15.07.2015 14:03, Anton Schubert wrote:
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.
Changes v2:
- add second bus offset
- only allow
Dear Bin,
In message
you wrote:
>
> Is the U-Boot mailing list hosted on the same machine as git? Will
> this move also fix the mailing list occasional hiccup issue?
Yes, at the moment this is on the same, old and slow machine.
We will move services one by one, the mailing lists are next after
On 2015-07-15 13:44, Albert ARIBAUD wrote:
> Hello Stefan (and sorry for the duplicate),
>
> On Wed, 15 Jul 2015 12:41:59 +0200, Stefan Agner
> wrote:
>> Hi Albert,
>>
>> On 2015-07-15 09:54, Albert ARIBAUD wrote:
>> > Hello Stefano,
>> >
>> > On Wed, 15 Jul 2015 09:19:55 +0200, Stefano Babic
>>
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.
Signed-off-by: Anton Schubert
Tested-by: Stefan Roese
Cc: Luka Perkov
---
Changes v3:
- fix config forma
Dear Thomas,
In message <593aef6c47f46446852b067021a273d6fbc78...@mucse037.lantiq.com> you
wrote:
>
> I tried to find a way to download a file with wget or a similar tool, which
> would be used by a distribution builder (like Yocto, Buildroot, OpenWrt, ...).
Why would any build environment us
Le jeudi 02 juillet 2015 à 00:20 +0200, Paul Kocialkowski a écrit :
> Palmas power support is required for OMAP5 devices such as the OMAP5 uEVM,
> that
> need to e.g. enable MMC power at SPL stage.
>
> This is especially important when booting from a peripheral (such as USB,
> UART),
> where the
Hi Anton,
On Wed, Jul 15, 2015 at 02:25:52PM +0200, Stefan Roese wrote:
> The first minor comment is, to better move the patch history (Changes in
> v2:...) below this line "---". The revision comments will then not be added
> to the git repository. This is common practice.
I would also like to a
Le mardi 07 juillet 2015 à 14:24 +0200, Paul Kocialkowski a écrit :
> FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND
> CONFIG_CMD_FASTBOOT, so it doesn't
> make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific
> options, especially
> given that other config opti
Hello Stefan,
On Wed, 15 Jul 2015 14:36:16 +0200, Stefan Agner
wrote:
> >> As far as I see we have these two patches which fix Vybrid booting:
> >>
> >> - one which changes the boot_data_t /size/ which keeps the offset
> >> of dcd_v2_t and the image aligned.
> >>
> >> - one which changes the d
Hi!
I'm with Freescale and we are currently working on bringing up a ARM64
SOC platform.
The PCIe module is similar with the one used by the iMX family, being
a Synopsys IP.
However there are many differences in terms of the SOC integration
(clocking, pin muxing, control registers) plus an additio
Hi Wolfgang,
On Wed, Jul 15, 2015 at 8:35 PM, Wolfgang Denk wrote:
> Dear Bin,
>
> In message
> you
> wrote:
>>
>> Is the U-Boot mailing list hosted on the same machine as git? Will
>> this move also fix the mailing list occasional hiccup issue?
>
> Yes, at the moment this is on the same, old
Hi Anton,
On 15.07.2015 11:12, Anton Schubert wrote:
The mv78260 needs atleast 10ms after setting the ddr3 training patterns
s/atleast/at least
or else the cpu will hang.
Is this documented somewhere? Or just a value from your experiments / tests?
This patch increases said delay to 20ms
Without calling timer_init(), the xdelay() functions return immediately.
We need to call timer_init() early, so that these functions work and
the PHY and DDR init code works correctly.
Signed-off-by: Stefan Roese
Cc: Anton Schubert
Cc: Luka Perkov
---
arch/arm/mach-mvebu/spl.c | 2 ++
arch/a
Le mardi 14 juillet 2015 à 13:32 +0200, Lukasz Majewski a écrit :
> Hi Paul,
>
> > Le mardi 14 juillet 2015 à 12:22 +0200, Lukasz Majewski a écrit :
> > > Hi Paul,
> > >
> > > > This avoids handling requests that have an error status or no
> > > > data. In particular, this avoids showing unnecess
Changes since v4:
* Take care of BOOT_DEVICE_USBETH and don't use the fallback when it's defined
and active. This way, we can have both BOOT_DEVICE_USBETH and BOOT_DEVICE_USB
defined to the same value and use USB eth or not based on
CONFIG_SPL_USBETH_SUPPORT.
* boot_params casting clarificati
This cleans up the SPL boot devices for omap platforms and introduces support
for missing boot devices.
Signed-off-by: Paul Kocialkowski
---
arch/arm/include/asm/arch-am33xx/spl.h | 94 +++---
arch/arm/include/asm/arch-omap3/spl.h | 18 ---
arch/arm/include/asm/a
Now that SPL boot devices are clearly defined, we can use BOOT_DEVICE_QSPI_4
instead of a hardcoded value.
Signed-off-by: Paul Kocialkowski
---
arch/arm/cpu/armv7/omap-common/boot-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/boot
phy_id is declared as u32 in create_phy_by_mask and in struct phy_device.
Signed-off-by: Jörg Krause
---
drivers/net/phy/phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index c8d08e8..865abab 100644
--- a/drivers/net/phy/phy
This introduces OMAP3 support for the common omap boot code, as well as a
major cleanup of the common omap boot code.
First, the omap_boot_parameters structure becomes platform-specific, since its
definition differs a bit across omap platforms. The offsets are removed as well
since it is U-Boot's
This introduces code to read the value of the SYS_BOOT pins on the OMAP4, as
well as the memory-preferred scheme for the interpretation of each value.
Signed-off-by: Paul Kocialkowski
---
arch/arm/cpu/armv7/omap4/Makefile| 1 +
arch/arm/cpu/armv7/omap4/boot.c | 60 +
This introduces code to read the value of the SYS_BOOT pins on the OMAP3, as
well as the memory-preferred scheme for the interpretation of each value.
Signed-off-by: Paul Kocialkowski
---
arch/arm/cpu/armv7/omap3/Makefile | 1 +
arch/arm/cpu/armv7/omap3/boot.c | 58 +++
This introduces code to read the value of the SYS_BOOT pins on the OMAP5, as
well as the memory-preferred scheme for the interpretation of each value.
Signed-off-by: Paul Kocialkowski
---
arch/arm/cpu/armv7/omap5/Makefile | 1 +
arch/arm/cpu/armv7/omap5/boot.c | 46 +++
The config file for the siemens-am33x-common was using OMAP_I2C_STANDARD, which
is defined in a header that is not included in the config header. In most cases,
it was being included by the code using CONFIG_SYS_OMAP24_I2C_SPEED, but it
might not always be the case.
In particular, when introducing
With commit e3a77218a256edbe201112a39beeed8adcabae3f the MII bus is only
reset if a reset handler is registered. If there is no reset handler there
is no need to wait for a device to come out of the reset.
Signed-off-by: Jörg Krause
---
drivers/net/phy/phy.c | 8 +---
1 file changed, 5 inser
OMAP devices might boot from peripheral devices, such as UART or USB.
When that happens, the U-Boot SPL tries to boot the next stage (complete U-Boot)
from that peripheral device, but in most cases, this is not a valid boot device.
This introduces a fallback option that reads the SYS_BOOT pins, th
Hi Tom,
Here's the first pull request for x86. It includes fixes and improvements
with PCI, multi-core init, Intel FSP init and adds graphics support for
crownbay.
The following changes since commit f4815763b410d8657f6f617067a1d53024b05220:
RFC: Deprecate MAKEALL (2015-07-14 13:50:16 -0400)
a
Hi Stefan,
Your timer patch fixes the booting problems for me so this delay isn't
necessary anymore.
Thanks,
Anton
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Luka,
On 15.07.2015 16:56, Luka Perkov wrote:
On Wed, Jul 15, 2015 at 04:47:55PM +0200, Anton Schubert wrote:
Hi Stefan,
Your timer patch fixes the booting problems for me so this delay isn't
necessary anymore.
I've pushed the two patches from you guys to marvell/master:
http://git.denx.
Hi Luka,
My Patch isn't necessary anymore and as Stefan said potentially breaking on
other chip versions.
Anton
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Tested-by: Anton Schubert
Tested on custom mv78260 board.
Anton
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Anton, hi Stefan,
On Wed, Jul 15, 2015 at 04:47:55PM +0200, Anton Schubert wrote:
> Hi Stefan,
>
> Your timer patch fixes the booting problems for me so this delay isn't
> necessary anymore.
I've pushed the two patches from you guys to marvell/master:
http://git.denx.de/?p=u-boot/u-boot-marv
Hi Luka
2015-07-15 17:04 GMT+02:00 Luka Perkov :
> I think everything is merged correctly as was intended. Please check.
>
Is correct.
Thanks, Anton
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Anton,
On Wed, Jul 15, 2015 at 05:00:21PM +0200, Anton Schubert wrote:
> My Patch isn't necessary anymore and as Stefan said potentially breaking on
> other chip versions.
I think everything is merged correctly as was intended. Please check.
Luka
__
Hi Tom,
On 14 July 2015 at 17:33, Tom Rini wrote:
>
> On Tue, Jul 14, 2015 at 04:39:01PM -0600, Stephen Warren wrote:
> > On 07/14/2015 04:09 PM, Tom Rini wrote:
> > >On Tue, Jul 14, 2015 at 02:11:25PM -0600, Stephen Warren wrote:
> > >>On 07/14/2015 11:56 AM, Tom Rini wrote:
> > >>>Hey all,
> >
On 07/14/2015 05:37 PM, Simon Glass wrote:
Hi Stephen,
On 14 July 2015 at 17:27, Stephen Warren wrote:
On 07/14/2015 05:07 PM, Simon Glass wrote:
Hi Stephen,
On 14 July 2015 at 16:39, Stephen Warren wrote:
On 07/14/2015 04:09 PM, Tom Rini wrote:
On Tue, Jul 14, 2015 at 02:11:25PM -06
On 07/14/2015 05:33 PM, Tom Rini wrote:
On Tue, Jul 14, 2015 at 04:39:01PM -0600, Stephen Warren wrote:
On 07/14/2015 04:09 PM, Tom Rini wrote:
On Tue, Jul 14, 2015 at 02:11:25PM -0600, Stephen Warren wrote:
On 07/14/2015 11:56 AM, Tom Rini wrote:
Hey all,
I've pushed v2015.07 out to the rep
Hi Stephen,
On 15 July 2015 at 09:50, Stephen Warren wrote:
> On 07/14/2015 05:33 PM, Tom Rini wrote:
>>
>> On Tue, Jul 14, 2015 at 04:39:01PM -0600, Stephen Warren wrote:
>>>
>>> On 07/14/2015 04:09 PM, Tom Rini wrote:
On Tue, Jul 14, 2015 at 02:11:25PM -0600, Stephen Warren wrote:
>>>
On Wed, Jul 15, 2015 at 09:54:41AM -0600, Simon Glass wrote:
> Hi Stephen,
>
> On 15 July 2015 at 09:50, Stephen Warren wrote:
> > On 07/14/2015 05:33 PM, Tom Rini wrote:
> >>
> >> On Tue, Jul 14, 2015 at 04:39:01PM -0600, Stephen Warren wrote:
> >>>
> >>> On 07/14/2015 04:09 PM, Tom Rini wrote:
On 07/15/2015 09:54 AM, Simon Glass wrote:
Hi Stephen,
On 15 July 2015 at 09:50, Stephen Warren wrote:
On 07/14/2015 05:33 PM, Tom Rini wrote:
On Tue, Jul 14, 2015 at 04:39:01PM -0600, Stephen Warren wrote:
On 07/14/2015 04:09 PM, Tom Rini wrote:
On Tue, Jul 14, 2015 at 02:11:25PM -0600,
Hi Simon,
On Thu, Jul 9, 2015 at 9:15 AM, Simon Glass wrote:
> With driver model drivers can have things stored in several places. There is
> driver-private data, then the uclass can attach things to a device. If the
> device is on a bus then its bus may attach parent data to the device too.
>
>
Hi Stephen,
On 15 July 2015 at 10:28, Stephen Warren wrote:
> On 07/15/2015 09:54 AM, Simon Glass wrote:
>>
>> Hi Stephen,
>>
>> On 15 July 2015 at 09:50, Stephen Warren wrote:
>>>
>>> On 07/14/2015 05:33 PM, Tom Rini wrote:
On Tue, Jul 14, 2015 at 04:39:01PM -0600, Stephen Warren
1 - 100 of 157 matches
Mail list logo
