The mv78260 needs atleast 10ms after setting the ddr3 training patterns or else the cpu will hang.
This patch increases said delay to 20ms just to be safe. Signed-off-by: Anton Schubert <anton.schub...@gmx.de> Cc: Stefan Roese <s...@denx.de> Cc: Luka Perkov <luka.per...@sartura.hr> --- drivers/ddr/mvebu/ddr3_hw_training.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/mvebu/ddr3_hw_training.c b/drivers/ddr/mvebu/ddr3_hw_training.c index a8c5e6a..c9c9272 100644 --- a/drivers/ddr/mvebu/ddr3_hw_training.c +++ b/drivers/ddr/mvebu/ddr3_hw_training.c @@ -674,7 +674,7 @@ int ddr3_load_patterns(MV_DRAM_INFO *dram_info, int resume) reg_write(REG_DRAM_TRAINING_ADDR, reg); - udelay(100); + mdelay(20); /* Check if Successful */ if (reg_read(REG_DRAM_TRAINING_ADDR) & -- 2.3.6 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot