Partially revert commit 0d01f66d235118 (CFI: cfi_flash write fix for AMD
legacy).
flash_full_status_check() used to skip status register parsing when
flash_status_check() returns OK. This is wrong since flash_status_check()
must return OK for other status bits to be valid.
Cc: Ed Swarthout
Signe
set bDeviceClass, bDeviceSubClass and bcdUSB to the values
defined in dfu spec 1.1 chapter 4.2.1 found here:
http://www.usb.org/developers/devclass_docs/DFU_1.1.pdf
Signed-off-by: Heiko Schocher
Cc: Lukasz Majewski
Cc: Marek Vasut
Cc: Roger Meier
---
before this patch, "dfu-util -l" showed:
One of the I2C EEPROM is used to store/save and edit mac
addresses of ports.
this patch add required CONFIG to support the same
Signed-off-by: Shaveta Leekha
---
include/configs/B4860QDS.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/B4860QDS.h b/inclu
Hi,
I was trying to boot vxworks using u-boot bootloader for learning purpose
on MPC8640DHPCN board. Previously I successfully ported QNX os along with
linux on same board using u-boot. while booting using bootvx command its
not booting and stucking after showing the following message:
tftp 01
Hi.
2014-09-04 15:05 GMT+09:00 Stefan Roese :
>>
>> Patman now picks this up which is great. But it does sometimes produce
>> a long list of maintainers. I wonder if we could have an option to
>> turn it off (perhaps -m)?
>
>
> Yes, that would be good. I just recently got a very long Cc list in
Hi Simon,
2014-09-04 8:49 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 3 September 2014 14:41, Masahiro Yamada wrote:
>> Commit 3ff291f371fa9858426774f3732924bacb61ed1c
>> (kconfig: convert Kconfig helper script into a shell script)
>> introduced another regression.
>>
>> Shell usually handles w
When a non-existing defconfig is specified,
display an easy-to-understand message
(fake the error message on Linux Kernel):
$ make foo_defconfig
***
*** Can't find default configuration "confis/foo_defconfig"!
***
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- Echo the error mess
On 07/15/2014 05:59 PM, Ivan Khoronzhuk wrote:
From: Hao Zhang
This patch adds clock definitions and commands to support Keystone2
K2E SOC.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/cpu/armv7/keystone/Makefile | 1 +
arch/arm/cpu/armv7/keystone/clock-k2
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
pin-pin compatible with i.MX6Q.
The patch also support the DDR 32-BIT mode option. Please define
CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT
mode
To support loading FDT file for kernel, add the fdt address,
file and loading script to arm2 board default environment.
Signed-off-by: Ye.Li
---
Changes since v1:
- None
include/configs/mx6qarm2.h | 41 ++---
1 files changed, 38 insertions(+), 3 deletions(-
Update the ddr scripts for LPDDR2 and add two build configs for LPDDR2
arm2 board. Since the LPDDR2 arm2 board has different DDR size, use
CONFIG_DDR_MB in defconfig to replace the PHYS_SDRAM_SIZE.
Signed-off-by: Ye.Li
---
Changes since v1:
- The (CONFIG_DDR_32BIT) is true only for mx6dlarm2
bo
1. Set the image load partition to the first FAT partition.
2. Set the kernel rootfs partition to the second partition.
Signed-off-by: Ye.Li
---
Changes since v1:
- None
include/configs/mx6qarm2.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/mx6qar
Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR
register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source,
do not reset this PFD to avoid system hang. Customers may set this
in DDR script or use BT_FREQ to select low freq boot.
Signed-off-by: Ye.Li
---
Changes since v1
Hello Mikyu,
Could you pick up this patch, please?
I think there is a consensus that the maintainership of Arndale board
should be updated.
Please see
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/187338
2014-08-04 10:13 GMT+09:00 Masahiro Yamada :
> Inderpal's email address is not wo
On Thu, Sep 04, 2014 at 07:28:04AM +0200, Wolfgang Denk wrote:
> Dear Steve Rae,
>
> In message <1409763954-5494-4-git-send-email-s...@broadcom.com> you wrote:
> > - port dprintf() to debug()
> > - update formatting
> >
> > Signed-off-by: Steve Rae
> > ---
> >
> > Changes in v3:
> > - use origi
On 09/04/2014 07:16 AM, Masahiro Yamada wrote:
When a non-existing defconfig is specified,
display an easy-to-understand message
(fake the error message on Linux Kernel):
$ make foo_defconfig
***
*** Can't find default configuration "confis/foo_defconfig"!
***
Acked-by: Stephen War
On Wednesday, September 03, 2014 at 06:39:23 PM, Detlev Zundel wrote:
> Hi Marek,
>
> [...]
>
> > I got my talk, "Secure and flexible boot with U-Boot bootloader",
> > accepted for the main track it seems. It's mostly about "use fitImage
> > and use UBI on NAND" kind of talk, which covers introdu
On 09/04/2014 05:08 PM, Murali Karicheri wrote:
On 07/15/2014 05:59 PM, Ivan Khoronzhuk wrote:
From: Hao Zhang
This patch adds clock definitions and commands to support Keystone2
K2E SOC.
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
---
arch/arm/cpu/armv7/keystone/Makefile
From: Murali Karicheri
This patch implements a workaround to fix DDR3 memory issue.
The code for workaround detects PGSR0 errors and then preps for
and executes a software-controlled hard reset.In board_early_init,
where logic has been added to identify whether or not the previous
reset was a POR
Hi Marcel,
2014-09-02 19:57 GMT+09:00 Marcel Ziswiler :
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index dd987cc..e5d31f9 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -701,6 +701,9 @@ config TARGET_WHISTLER
> config TARGET_COLIBRI_T20_IRIS
> bool "Support col
try run=> dry run
no nothing => do nothing/
"..." => '...'
The last one is for consistency with the other option helps.
Signed-off-by: Masahiro Yamada
---
tools/buildman/buildman.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/buildman/buildman.py b/tools/
On 4 September 2014 10:19, Masahiro Yamada wrote:
> try run=> dry run
> no nothing => do nothing/
> "..." => '...'
>
> The last one is for consistency with the other option helps.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
___
U
1/2 imports a build script update from Linux.
2/2 refactors examples/standalone/Makefile based on 1/2.
Masahiro Yamada (2):
scripts/Makefile.clean: clean also $(extra-m) and $(extra-)
kbuild: standalone: simplify clean-files
examples/standalone/Makefile | 2 +-
scripts/Makefile.clean
This commit is a backport from Linux Kernel,
commit 9d5db8949f1ecf4019785b04d8986835d3c0e99e,
written by me.
Signed-off-by: Masahiro Yamada
---
This patch was well-reviewed on Linux Kbuild ML and
is already in the Linux mainline.
It is surely safe.
scripts/Makefile.clean | 4 ++--
1 file chan
Files added $(extra-) are removed by "make clean".
Besides, wildcard "*.srec *.bin" is simpler.
Signed-off-by: Masahiro Yamada
---
examples/standalone/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile
index 2
Dear U-boot team
I'm currently working on an embedded system that uses U-boot as a second
step bootloader. I'm testing the booting time of the kernel with binary
formats. Before I was able to flash the first level bootloader, the u-boot
and the kernel (uImage) into the nand flash of the embedded sy
"0x00" is a valid serdes protocol for QorIQ parts, and can not be
used to test whether the serdes is enabled or disabled.
Signed-off-by: Ebony Zhu
---
arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serd
try run=> dry run
no nothing => do nothing
"..." => '...'
The last one is for consistency with the other option helps.
Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
---
Changes in v2:
- Fix a typo in my git-log
do nothing/ => do nothing
tools/buildman/buildman.py |
Dear Camilo Andres Roca Duarte,
In message
you wrote:
>
> - I would like to know if the bootm command is actually loading the
> complete kernel to RAM or if it is loading only the required pages from
> flash.
"bootm" has no knowledge about things like what a kernel is or what
required pages mig
For an occasional user of patman some failures are not obvious: for
instance when checkpatch reports warnings, the dry run still reports
that the email would be sent. If it is not dry run, the warnings are
shown on the screen, but it is not clear that the email was not sent.
Add some code to repor
Hi list,
we have a custom legacy board based on OpenRD platform and using
OpenRD config with slight changes (few GPIOs remapped, slower
SDRAM timing and redundant environment).
Now we had to change to Samsung E-Die NAND for a new assembly, and I
can not write to the NAND any more. Switching to up-
Hi Tom,
On 31 August 2014 23:07, Simon Glass wrote:
> Hi Tom,
>
> On 28 August 2014 05:48, Tom Rini wrote:
> > On Tue, Aug 26, 2014 at 08:54:03PM -0600, Simon Glass wrote:
> >> Hi Tom,
> >>
> >> On 25 August 2014 14:21, Tom Rini wrote:
> >> > On Mon, Aug 25, 2014 at 01:00:05PM -0600, Simon Gl
Hello Ye,
On Thu, Sep 4, 2014 at 11:17 AM, Ye.Li wrote:
> This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
> shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
> pin-pin compatible with i.MX6Q.
>
> The patch also support the DDR 32-BIT mode option. Please define
> C
Vadim,
On Thu, Sep 4, 2014 at 10:45 AM, Vadim Bendebury wrote:
> For an occasional user of patman some failures are not obvious: for
> instance when checkpatch reports warnings, the dry run still reports
> that the email would be sent. If it is not dry run, the warnings are
> shown on the screen,
Hi
On 3 September 2014 03:13, Tom Rini wrote:
> On Wed, Sep 03, 2014 at 02:53:17AM +0200, Benoît Thébaudeau wrote:
>> > IMHO, the 'b reset' and the 'nop nop nop' are two different issues, so
>> > Helmut should create a formal patch for the 'b reset' issue right now,
>> > which will fix mx31pdk (a
Hi Magnus,
On Thu, Sep 4, 2014 at 9:12 PM, Magnus Lilja wrote:
> On 3 September 2014 03:13, Tom Rini wrote:
>> On Wed, Sep 03, 2014 at 02:53:17AM +0200, Benoît Thébaudeau wrote:
>>> > IMHO, the 'b reset' and the 'nop nop nop' are two different issues, so
>>> > Helmut should create a formal patch
Hi
On 4 September 2014 21:50, Benoît Thébaudeau
wrote:
> Hi Magnus,
>
v2014.10 is getting closer with the release of -rc2. It would be much
better to get mx31pdk fixed for this release. Helmut, can you send a
patch for the 'b reset' issue? If not, do you agree that someone else
>>
Hi Simon,
2014-09-04 1:34 GMT+02:00 Simon Glass :
> Hi Daniel,
>
> On 31 July 2014 18:24, Daniel Schwierzeck
> wrote:
>>
>> This series imports get_maintainer.pl from kernel and reintroduce
>> the MAINTAINERS file in the according format. Currently one have to
>> manually grep all infos about bo
On Thu, Aug 28, 2014 at 12:01:04PM +0530, Lokesh Vutla wrote:
> From: R Sricharan
>
> On DRA72x, EMIF supports DDR3 upto 667MHz.
> Adding the required settings for DDR3 at 666MHz and enabling it.
>
> Signed-off-by: R Sricharan
> Signed-off-by: Lokesh Vutla
Applied to u-boot/master, thanks!
On Mon, Aug 11, 2014 at 11:59:42AM +0300, Khoronzhuk, Ivan wrote:
> The mask for BWADJ field of PASSPLLCTL0 register has to be 0xff, but
> by mistake, here is used shift instead of mask, so correct it.
>
> Signed-off-by: Ivan Khoronzhuk
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Tue, Aug 26, 2014 at 10:48:13AM +0200, Guillaume GARDET wrote:
> This patch adds boot script support to omap3 beagle board.
>
> Signed-off-by: Guillaume GARDET
> Cc: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
__
On Thu, Aug 28, 2014 at 04:07:45PM +0300, Khoronzhuk, Ivan wrote:
> There is no reason to redefine pure readl/writel functions.
> So remove this redundancy.
>
> Signed-off-by: Ivan Khoronzhuk
> Acked-by: Vitaly Andrianov
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: D
On Mon, Sep 01, 2014 at 01:05:32AM +0900, Masahiro Yamada wrote:
> The help message in board/ti/am335x/Kconfig says AM335x has
> 6 UARTs, so the valid number for CONFIG_CONS_INDEX is from 1 to 6.
>
> Signed-off-by: Masahiro Yamada
> Cc: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
sig
On Tue, Sep 02, 2014 at 12:20:02AM +0300, Khoronzhuk, Ivan wrote:
> In case when 4K page keystone RBL layout is used the compilation
> error is appeared. That's because the #ifdef has to be placed under
> struct name. This patch correct it.
>
> Signed-off-by: Ivan Khoronzhuk
Applied to u-boot/m
On Tue, Sep 02, 2014 at 04:23:58PM +0200, Rostislav Lisovy wrote:
> Since the CS of a device connected to the GPMC was
> stored in the global variable, it was not possible to
> use multiple devices. In this patch the CS is stored per
> device in its 'struct omap_nand_info'. This makes it
> possibl
On Wed, Sep 03, 2014 at 05:59:57PM +0200, Enric Balletbò i Serra wrote:
> From: Enric Balletbo i Serra
>
> To reduce code duplication update am335x_igep0033.h to use ti_am335x_common.h
> and convert to generic board.
>
> Signed-off-by: Enric Balletbo i Serra
Applied to u-boot/master, thanks!
On Tue, Sep 02, 2014 at 05:00:30PM +0200, Rostislav Lisovy wrote:
> OMAP GPMC driver used with some NAND Flash devices (e.g. Spansion
> S34ML08G1) causes that U-boot shows hundreds of 'nand: bit-flip
> corrected' error messages. Possible cause was discussed in the
> mailinglist thread:
> http://li
Hey,
The following changes since commit d6c1ffc7d23f4fe4ae8c91101861055b8e1501b6:
Prepare v2014.10-rc2 (2014-09-02 16:58:29 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes up to 681f785f7cc616a70aaa0c93a25300b0820f6968:
ARM:
Hi Daniel,
On 4 September 2014 14:45, Daniel Schwierzeck
wrote:
> Hi Simon,
>
> 2014-09-04 1:34 GMT+02:00 Simon Glass :
> > Hi Daniel,
> >
> > On 31 July 2014 18:24, Daniel Schwierzeck
> wrote:
> >>
> >> This series imports get_maintainer.pl from kernel and reintroduce
> >> the MAINTAINERS fil
This series adds support for a serial uclass, enabling serial drivers to be
converted to use driver model.
With v4, exynos boards all build and a second attempt has been made to add
Tegra support via the ns16550 driver, tested on beaver, Jetson-TK1 and
seaboard (i.e. 3 of the 4 SoCs in mainline).
The stdio_dev structure has a private pointer for its creator, but it is
not set up by the serial system. Set it to point to the serial device so
that it can be found by code called by stdio.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Fix typo in comm
Within /chosen we may have a node which points to another node, similar
to how /aliases works. Add a helper function to do this lookup.
Signed-off-by: Simon Glass
---
Changes in v5:
- Add new patch to add a function to look up a chosen node
Changes in v4: None
Changes in v3: None
Changes in v2:
Change the Exynos serial driver to work with driver model and switch over
all Exynos5 boards to use it.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Avoid reordering functions
Changes in v2: None
drivers/serial/serial_s5p.c | 255
Allow the caller to find out the device that was bound in response to this
call.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Add new change to enhance lists_bind_fdt()
Changes in v2: None
drivers/core/lists.c | 10 +++---
drivers/core/root.c |
The same sequence is used in several places, so move it into a function.
Note that UART_LCR_BKSE is an alias for UART_LCR_DLAB.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Add new patch to collect common baud rate code in ns16550
Changes in v2: None
If the sandbox device tree is provided to U-Boot (with the -d flag) then it
will use the device tree version in preference to the built-in device. The
only difference is the colour.
Signed-off-by: Simon Glass
---
Changes in v5:
- Use /chosen/stdout-path instead of /aliases/console to specify the
We will need the console before relocation, so mark it that way.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Change pre-reloc fdt property to 'u-boot,dm-pre-reloc'
Changes in v2: None
arch/arm/dts/exynos5.dtsi | 1 +
1 file changed, 1 insertion(+)
Add driver model support so that ns16550 can support operation both with
and without driver model.
The driver needs a clock frequency so cannot stand alone unfortunately. The
clock frequency must be provided by a separate driver.
Signed-off-by: Simon Glass
---
Changes in v5:
- Add struct udevic
Some Tegra device tree files do not include information about the serial
ports. Add this and also add information about the input clock speed.
The console alias needs to be set up to indicate which port is used for
the console.
Also add a binding file since this is missing.
Series-changes; 5
- A
Move the function that calculates the baud rate divisor into ns16550.c so
it can be used by that file.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Add new patch to move baud rate calculation to ns16550.c
Changes in v2: None
drivers/serial/ns16550.c
Serial devices support simple byte input/output and a few operations to find
out whether data is available. Add a basic uclass for serial devices to be
used by drivers that are converted to driver model.
Signed-off-by: Simon Glass
---
Changes in v5:
- Use /chosen/stdout-path instead of /aliases/
The current sandbox serial driver is a pretty trivial example and does not
have the featues that might be needed for other board serial drivers. To
help provide a better example, add a text colour property to the device
tree for sandbox. This uses platform data, a device tree node, driver
private d
Use driver model for serial ports.
Since Tegra now uses driver model for serial, adjust the definition of
V_NS16550_CLK so that it is clear that this is only used for SPL.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4:
- Add a separate Tegra serial driver to deal with the clo
Adjust the sandbox serial driver to use the new driver model uclass. The
driver works much as before, but within the new framework.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Rename struct device to struct udevice
drivers/serial/
On 4 September 2014 12:57, Doug Anderson wrote:
> Vadim,
>
> On Thu, Sep 4, 2014 at 10:45 AM, Vadim Bendebury
> wrote:
> > For an occasional user of patman some failures are not obvious: for
> > instance when checkpatch reports warnings, the dry run still reports
> > that the email would be sent
Hi,
On 3 September 2014 09:12, Ulf Bartel wrote:
> Hello.
>
> We are currently testing U-Boot on a PPC. Beside booting the system we
> like to use it do some system updates (e.g. Kernel, FDT and Initrd). I've
> compiled U-Boot with support for AES and RSA-Signatures. We are storing the
> RSA pub
Hi,
On 21 July 2014 21:08, Duxiaoqiang wrote:
>
> Hi
>
> I try to make use of uboot's secure verify feature, but failed. My procedure
> is below:
>
> 1) Enable control device tree
>
> Ø Add CONFIG_OF_CONTROL / CONFIG_OF_SEPARATE to file vexpress_aemv8a.h
>
> 2) Enable FIT and verify
Hi,
On 11 March 2014 05:39, Thilo Cestonaro wrote:
> Hey!
>
> When I build my Uboot with the CONFIG_OF_SEPARATE set to gain access to the
> compiled dtb, Uboot can't find my concatenated dtb during the boot.
> After injecting the pulbic keys for the verified boot, I cat the u-boot.dtb
> behind th
On Thursday, September 04, 2014 at 12:21:40 PM, Heiko Schocher wrote:
Hi Heiko,
I'll just rant a bit, but please wait until Lukasz does a proper runthrough.
> set bDeviceClass, bDeviceSubClass and bcdUSB to the values
> defined in dfu spec 1.1 chapter 4.2.1 found here:
>
> http://www.usb.org/de
On Mon, 1 Sep 2014 12:58:54 +0200
Michal Simek wrote:
> From: Peter Crosthwaite
>
> Add a defconfig and Kconfigury for the Digilent ZYBO board.
>
> Signed-off-by: Peter Crosthwaite
> Signed-off-by: Michal Simek
> Acked-by: Jagannadha Sutradharudu Teki
> ---
Looks good to me.
Reviewed-by
Hi Simon,
On Wed, 3 Sep 2014 18:01:44 -0600
Simon Glass wrote:
> Hi Masahiro,
>
> On 31 August 2014 20:06, Masahiro Yamada wrote:
> > We have not had a good method to debug the early boot stage such as
> > lowlevel_init function. I guess developers generally use dedicated
> > debuggers for t
Hi Chin,
Are you planning to send v10
with the fixes suggested by Scott?
Best Regards
Masahiro Yamada
On Tue, 2 Sep 2014 21:15:52 -0500
Scott Wood wrote:
> On Sat, 2014-08-30 at 07:45 -0400, Tom Rini wrote:
> > On Thu, Aug 28, 2014 at 11:13:40AM +0900, Masahiro Yamada wrote:
> > > Hi Scott,
Hello Marek,
Am 05.09.2014 00:42, schrieb Marek Vasut:
On Thursday, September 04, 2014 at 12:21:40 PM, Heiko Schocher wrote:
Hi Heiko,
I'll just rant a bit, but please wait until Lukasz does a proper runthrough.
set bDeviceClass, bDeviceSubClass and bcdUSB to the values
defined in dfu spec 1
Dear Simon & Ulf,
In message
you wrote:
>
> > 2) Is there a possibility to check the signature/CRC before copying the
> > image to ram with imxtract?
>
> I'm not sure of the specifics here - sometimes the image must be
> decompressed, etc. so in principle this is tricky to implement (but not
>
with this patch, it is possible to get the offset and size information
from the mtdpartiton setting in "mtdparts", similiar to the
"nand" commandos.
=> sf
sf - SPI flash sub-system
Usage:
sf probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus
and ch
This patchserie add the popssibility to define mtd partitions on
spi nor flash, and use this settings with the sf commands.
steps:
- add MTD layer driver for spi, original patch from:
http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc90493dd7089eaa51b9e639765cced
and addap
From: Daniel Schwierzeck
add MTD layer driver for spi, original patch from:
http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc90493dd7089eaa51b9e639765cced
changes from Heiko Schocher against this patch:
- remove compile error if not defining CONFIG_SPI_FLASH_MTD:
LD
move common functions from cmd_nand.c (for calculating offset
and size from cmdline paramter) to common place, so they could
used from other commands which use mtd partitions.
For onenand the arg_off_size() is left in common/cmd_onenand.c.
It should use now the common arg_off() function, but as I
The SPL-mode driver for Denali(Cadence) NAND Flash Memory Controller IP.
This driver requires two CONFIG macros:
- CONFIG_SPL_NAND_DENALI
Define to enable this driver.
- CONFIG_SYS_NAND_BAD_BLOCK_POS
Specify bad block mark position in the oob space. Typically 0.
Signed-off-by: Masahir
The driver for on-chip UART used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use "const unsigned int mode_x_div = 16"
instead of "#define MODE_X_DIV 16"
- Use DIV_ROUND_CLOSEST() macro to compute the divi
Add entries for Panasonic UniPhier family:
PH1-LD4, PH1-Pro4, PH1-sLD8
Signed-off-by: Masahiro Yamada
---
Changes in v4: None
Changes in v3:
- Rebase on the current u-boot/master
Changes in v2:
- Rebase on the current u-boot/master
arch/arm/Kconfig| 5 +
arch/arm/
Signed-off-by: Masahiro Yamada
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Newly added
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index af194ca..cb5b3f0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -149,6 +149,14 @@ F: a
Signed-off-by: Masahiro Yamada
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Rebase
doc/git-mailrc | 1 +
1 file changed, 1 insertion(+)
diff --git a/doc/git-mailrc b/doc/git-mailrc
index 0fba100..35f2eb2 100644
--- a/doc/git-mailrc
+++ b/doc/git-mailrc
@@ -63,6 +63,7 @@ alias
On 01/09/14 20:50, Przemyslaw Marczak wrote:
> This patch set introduces changes to common Samsung code
> as a preparation of new board support:
> - boot device check - code cleanup
> - automatic init order of mmc drivers
> - automatic setting of dfu entities which depends on boot device
> - pre re
This series contain the support for Freescale LS102xA SoC and LS1021AQDS/TWR
board.
The QorIQ LS1 family is built on Layerscape architecture, the industry's first
software-aware, core-agnostic networking architecture to offer unprecedented
efficiency and scale.
Freescale LS102xA is a set of SoCs
This patch is to add etsec support for LS102xA. First, Little-endian
descriptor mode should be enabled. So RxBDs and TxBDs are interpreted
with little-endian byte ordering. Second, TSEC_SIZE and TSEC_MDIO_OFFSET
are different from PowerPC, redefine them for LS1021xA.
Signed-off-by: Alison Wang
--
From: Claudiu Manoil
fsl_enet.h defines the mapping of the usual MII management
registers, which are included in the MDIO register block
common to Freescale ethernet controllers. So it shouldn't
depend on the CPU architecture but it should be actually
part of the arch independent fsl_mdio.h.
To
Use mb() instead of sync assembly instruction to be
compatible for both ARM and PowerPC.
Signed-off-by: Alison Wang
---
Change log:
v6: Fix checkpatch error.
v5: No change.
v4: No change.
v3: Use mb() to be compatible for both ARM and PowerPC.
Split from the 0004-arm-ls102xa-Add-etsec-su
From: Wang Huan
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
From: Wang Huan
For LS102xA, the processor is in little-endian mode, while esdhc IP is
in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE
are added. So accessing ESDHC registers can be determined by ESDHC IP's
endian mode.
Signed-off-by: Alison Wang
---
Change log:
v6: New
From: York Sun
JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to us
From: Wang Huan
The existing i.MX's I2C driver mxc_i2c.c is compatible
with the controller of LS102xA. As I2C's registers
are 8-bit on LS102xA, I2C_QUIRK_REG is enabled to
use 8-bit driver.
This patch is to add I2C 1,2,3 support for LS102xA.
Signed-off-by: Alison Wang
---
Change log:
v6: Fix
From: York Sun
Reading DDR register should use ddr_in32() for proper endianess.
This patch fixes incorrect waiting time for ARM platforms.
Signed-off-by: York Sun
---
Change log:
v6: No change.
v5: No change.
v4: No change.
v3: No change.
v2: No change.
drivers/ddr/fsl/arm_ddr_gen3.c | 2
From: York Sun
If less than 8 ECC pins are used for DDR data bus width smaller than 64
bits, the 8-bit ECC code will be transmitted/received across several beats,
and it will be used to check 64-bits of data once 8-bits of ECC are
accumulated.
Signed-off-by: York Sun
---
Change log:
v6: No cha
From: Claudiu Manoil
Remove the DMCTRL Tx snooping bits (TDSEN and TBDSEN) as a
workaround for LS1. It has been observed that currently
the Tx stops functioning after a fair amount of Tx traffic
with these settings on. These bits are sticky and once set
they cannot be reset from Linux, for inst
From: Jingchang Lu
On vybrid, lpuart's registers are 8-bit. On LS102xA, lpuart's registers
are 32-bit. This patch adds the support for 32-bit registers on
LS102xA.
Signed-off-by: Jingchang Lu
Signed-off-by: Yuan Yao
---
Change log:
v6: Fix the influence to other board.
v5: No change.
v4: Ad
From: Wang Huan
For LS1, esdhc is big-endian IP. Accessing the registers
should be in big-endian mode. So we use esdhc_read32()
to read Host controller capabilities register for LS1.
For LS1, when using CMD12, cmdtype need to be set to
ABORT, otherwise, next read command will hang.
Signed-off-b
From: Wang Huan
LS102xA is an ARMv7 implementation. This patch is to add
basic support for LS1021AQDS board.
One DDR controller
DUART1 is used as the console
For the detail board information, please refer to README.
Signed-off-by: Alison Wang
Signed-off-by: Jason Jin
Signed-off-by: York Sun
From: Wang Huan
LS102xA is an ARMv7 implementation. This patch is to add
basic support for LS1021ATWR board.
One DDR controller
DUART1 is used as the console
For the detail board information, please refer to README.
Signed-off-by: Chen Lu
Signed-off-by: Yuan Yao
Signed-off-by: Alison Wang
From: Wang Huan
On LS1021ATWR, Silicon's Sii9022A HDMI Transmitter
is used. This patch adds the common setting for this
chip.
Signed-off-by: Alison Wang
---
Change log:
v6: No change.
v5: Change the patch order.
v4: Add commit messages.
v3: New file.
board/freescale/common/Makefile
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