From: Markus Niebel
SPI_MODE_3 requires clk high when inactive. The SCLK_CTL
field of the config reg was not configured. Provide defines
for missing fields in the ECSPI config reg and use them
for SPI_CPOL
Signed-off-by: Markus Niebel
---
arch/arm/include/asm/arch-mx5/imx-regs.h |9 ++-
From: Markus Niebel
The dual lite and solo variant have only 4 SPI controller.
respect this in the MXC_SPI_BASE_ADRESSES macro
Signed-off-by: Markus Niebel
---
arch/arm/include/asm/arch-mx6/imx-regs.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/a
As soon as all boards have their CONFIG_SYS_I2C_BASE defined in
configuration files instead of "asm/arch/hardware.h" it's safe to remove
the inclusion in question and make driver platform-independent.
Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Armando Visconti
Signe
This file was only required for compilation of designware_i2c driver.
Since explicit inclusion of "hardware.h" is now removed from the driver
we may safely remove this empty header as well.
Signed-off-by: Alexey Brodkin
Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Arm
Currently DW I2C driver required a target platform to have
"asm/arch/hardware.h" file. This file doesn't exist for most of platforms so it
would be good to remove this requirement.
Alexey Brodkin (3):
spear: move CONFIG_SYS_I2C_BASE from arch-spear/hardware to board
configs
designware
CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address.
Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address,
and CONFIG_SYS_QE_FW_ADDR for QE microcode address.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- no
Changes for v3:
- no
README
The u-qe of T1040 has addresses different from qe,
modify those addresses value for both u-qe and qe.
Add function qe_board_setup to mux the bus to tdm or uart
according to hwconfig.
Signed-off-by: Jiucheng Xu
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify CONFIG_SYS_QE_FMAN_FW_
Having CONFIG_SYS_I2C_BASE requires DW I2C driver to explicitly include
which other platforms may not have at all.
It's always good to have a driver platform-independent.
Signed-off-by: Alexey Brodkin
Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Armando Visconti
--
Hi Murali,
On Fri, 7 Feb 2014 18:23:07 -0500, Murali Karicheri
wrote:
> - Resending since I missed some in the CC
>
> This patch series add support for keystone2 SoC and K2HK EVM.
>
> Following patches were reviewed before in this list and v1 of the
> same is send with review comments incorpo
Hi Michal,
On Fri, 7 Feb 2014 09:36:47 -0500, Tom Rini wrote:
> On Fri, Feb 07, 2014 at 02:56:34PM +0100, Michal Simek wrote:
>
> > SPL is using ps7_init.c/h files which are generated
> > from design tools which have to be copied to
> > boards/xilinx/zynq folder before compilation.
> >
> > BSS
Hi Darwin,
On Thu, 6 Feb 2014 19:23:03 -0800, Darwin Rambo
wrote:
> The Kona architecture is present on a number of Broadcom mobile SoCs
> including the bcm281xx family of chips.
>
> Signed-off-by: Darwin Rambo
> Reviewed-by: Steve Rae
> Reviewed-by: Tim Kryger
> ---
> arch/arm/cpu/armv7/Ma
Hi Stephen,
On Wed, 5 Feb 2014 20:49:20 -0700, Stephen Warren
wrote:
> pxe.c provides both the "pxe" command which relies on a network, and the
> "sysboot" command which doesn't. Fix the file to compile when network
> support isn't enabled. This is useful e.g. on the Raspberry Pi which has
> no
> -Original Message-
> From: Minkyu Kang [mailto:mk7.k...@samsung.com]
> Sent: Friday, February 07, 2014 10:48 AM
> To: Piotr Wilczek
> Cc: u-boot@lists.denx.de; 'Kyungmin Park'; Lukasz Majewski; 'Jaehoon
> Chung'; 'Inha Song'; 'Chanho Park'
> Subject: Re: [PATCH 5/9] arm:exynos: add commo
On 02/10/2014 09:38 AM, Albert ARIBAUD wrote:
> Hi Michal,
>
> On Fri, 7 Feb 2014 09:36:47 -0500, Tom Rini wrote:
>
>> On Fri, Feb 07, 2014 at 02:56:34PM +0100, Michal Simek wrote:
>>
>>> SPL is using ps7_init.c/h files which are generated
>>> from design tools which have to be copied to
>>> boa
Dear Piotr,
On 10/02/14 17:52, Piotr Wilczek wrote:
>
>> -Original Message-
>> From: Minkyu Kang [mailto:mk7.k...@samsung.com]
>> Sent: Friday, February 07, 2014 10:48 AM
>> To: Piotr Wilczek
>> Cc: u-boot@lists.denx.de; 'Kyungmin Park'; Lukasz Majewski; 'Jaehoon
>> Chung'; 'Inha Song'; '
Hi Michal,
On Wed, 5 Feb 2014 07:56:07 +0100, Michal Simek
wrote:
> The reason is enabling tftpput command where
> tftp shorcut stops to work for tftpboot.
Do you think you could extend this patch to all config files where
the 'tftp' shortcut exists? This would prevent future issues on
targets
Hi,
Compiled Head and flashed u-boot.bin for arndale config. No display on
terminal in uboot.
Switched to linaro git (u-boot-linaro-stable.git) and u-boot log is showing up.
Something wrong?
--
-mj
___
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Hi Tom,
On Tue, 4 Feb 2014 12:05:33 -0500, Tom Rini wrote:
> When we tell the compiler to optimize for ARMv7 it assumes a default of
> unaligned accesses being supported at the hardware level and can make
> use of this to perform what it deems as an optimization in any case,
> including allowin
Hi Albert,
here are all patches which I have in my queue for Xilinx Zynq.
clk changes depends on clk command which has been added recently.
(common/cmd_clk.c) that's why this tree is based on 3 days old
Tom's tree.
Thanks,
Michal
The following changes since commit dbf3de2dd26cae37d16b00b348828
Hi Albert,
On 02/10/2014 10:11 AM, Albert ARIBAUD wrote:
> Hi Michal,
>
> On Wed, 5 Feb 2014 07:56:07 +0100, Michal Simek
> wrote:
>
>> The reason is enabling tftpput command where
>> tftp shorcut stops to work for tftpboot.
>
> Do you think you could extend this patch to all config files whe
Hi Michal,
On Mon, 10 Feb 2014 10:30:37 +0100, Michal Simek
wrote:
> Hi Albert,
>
> On 02/10/2014 10:11 AM, Albert ARIBAUD wrote:
> > Hi Michal,
> >
> > On Wed, 5 Feb 2014 07:56:07 +0100, Michal Simek
> > wrote:
> >
> >> The reason is enabling tftpput command where
> >> tftp shorcut stops t
Hi Michal,
On Mon, 10 Feb 2014 10:25:19 +0100, Michal Simek
wrote:
> Hi Albert,
>
> here are all patches which I have in my queue for Xilinx Zynq.
>
> clk changes depends on clk command which has been added recently.
> (common/cmd_clk.c) that's why this tree is based on 3 days old
> Tom's tree
Hi Albert,
On 02/10/2014 10:36 AM, Albert ARIBAUD wrote:
> Hi Michal,
>
> On Mon, 10 Feb 2014 10:30:37 +0100, Michal Simek
> wrote:
>
>> Hi Albert,
>>
>> On 02/10/2014 10:11 AM, Albert ARIBAUD wrote:
>>> Hi Michal,
>>>
>>> On Wed, 5 Feb 2014 07:56:07 +0100, Michal Simek
>>> wrote:
>>>
Th
Hi Albert,
On 02/10/2014 10:44 AM, Albert ARIBAUD wrote:
> Hi Michal,
>
> On Mon, 10 Feb 2014 10:25:19 +0100, Michal Simek
> wrote:
>
>> Hi Albert,
>>
>> here are all patches which I have in my queue for Xilinx Zynq.
>>
>> clk changes depends on clk command which has been added recently.
>> (co
Hi Michal,
On Mon, 10 Feb 2014 10:45:16 +0100, Michal Simek
wrote:
> Hi Albert,
>
> On 02/10/2014 10:36 AM, Albert ARIBAUD wrote:
> > Hi Michal,
> >
> > On Mon, 10 Feb 2014 10:30:37 +0100, Michal Simek
> > wrote:
> >
> >> Hi Albert,
> >>
> >> On 02/10/2014 10:11 AM, Albert ARIBAUD wrote:
> >
Hi Tom,
On Tue, 4 Feb 2014 10:07:32 -0500, Tom Rini wrote:
> On Tue, Feb 04, 2014 at 04:02:56PM +0100, Stefano Babic wrote:
> > Hi Hannes,
> >
> > On 04/02/2014 15:50, Hannes Petermaier wrote:
> [snip]
> > > Another thing is linewrapping of output strings, to obey to the rules i
> > > have to f
Hi,
Le 10/02/2014 10:22, Mj Embd a écrit :
> Hi,
>
> Compiled Head and flashed u-boot.bin for arndale config. No display on
> terminal in uboot.
> Switched to linaro git (u-boot-linaro-stable.git) and u-boot log is showing
> up.
>
> Something wrong?
>
You need to copy BL1 image, arndale-spl.bin
Hi Albert,
Le 10/02/2014 10:58, Albert ARIBAUD a écrit :
Hi Tom,
On Tue, 4 Feb 2014 10:07:32 -0500, Tom Rini wrote:
On Tue, Feb 04, 2014 at 04:02:56PM +0100, Stefano Babic wrote:
Hi Hannes,
On 04/02/2014 15:50, Hannes Petermaier wrote:
[snip]
Another thing is linewrapping of output string
Hi, experts:
Sandbox is a platform independent drivers test environment.
And, I could compile it with gcc-4.6 x86_64 version.
So, if a platform independent driver runs ok, then:
Does it also mean this driver is ok for running in an aarch64 state on
an armv8 platform?
Best wishes,
_
Dan,
On 02/07/2014 04:11 PM, Dan Murphy wrote:
> Roger
>
> On 02/07/2014 03:48 AM, Roger Quadros wrote:
>> Hi Dan,
>>
>> On 02/03/2014 02:59 PM, Dan Murphy wrote:
>>> Add spl_sata to read a fat partition from a bootable SATA
>>> drive.
>>>
>>> Signed-off-by: Dan Murphy
>>> ---
>> I got some chec
Hi David
On 10-Feb-14 1:41 PM, FengHua wrote:
>
>>> + /* Initialize All ReDistributors */
>>> +1: ldr x1, =GICR_BASE
>>> +2: mov w0, #~0x2
>>> + ldr w2, [x1, GICR_WAKER]
>>> + and w2, w2, w0 /* Clear ProcessorSleep */
>>> + str w2, [x1, GICR_WAKER]
>>> +
Hi Chris,
> > Hmm... Last time I checked,
> >
> > "abc"
> > "def"
> >
> > Is a valid C string, and does not require a backslash. Do I miss
> > something?
>
> Yes, you are of course correct: the result is the C string "abcdef" and
> the backslash in the original is superfluous.
> However
Hi,
to give you some background why we would want to do something
(strange) like this:
- we have a hardware design bug
- we have a few hundred i.MX31 TT-01 devices in the field
- the i.MX31 rom boot loader is only capable of using 1bit HW-ECC
(loading the first page (2k) from the NAND)
-
I have a custom board which uses u-boot-1.3.3. I want to add timestamp
information during booting. Do I have to use a patch for this?
abdullah___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi Abdullah,
On Mon, 10 Feb 2014 03:25:51 -0800 (PST), Abdullah YILDIZ
wrote:
> I have a custom board which uses u-boot-1.3.3. I want to add timestamp
> information during booting. Do I have to use a patch for this?
Note sure what exactly you mean by "timestamp information", but AFAIR,
each bu
On 2/10/14, Guillaume Gardet wrote:
> Hi,
>
>
> Le 10/02/2014 10:22, Mj Embd a écrit :
>> Hi,
>>
>> Compiled Head and flashed u-boot.bin for arndale config. No display on
>> terminal in uboot.
>> Switched to linaro git (u-boot-linaro-stable.git) and u-boot log is
>> showing up.
>>
>> Something wro
Dear Helmut Raiger,
On 02/10/2014 12:11 PM, Helmut Raiger wrote:
> Hi,
>
> to give you some background why we would want to do something
> (strange) like this:
>
> - we have a hardware design bug
> - we have a few hundred i.MX31 TT-01 devices in the field
> - the i.MX31 rom boot loader is on
Le 10/02/2014 13:17, Mj Embd a écrit :
> On 2/10/14, Guillaume Gardet wrote:
>> Hi,
>>
>>
>> Le 10/02/2014 10:22, Mj Embd a écrit :
>>> Hi,
>>>
>>> Compiled Head and flashed u-boot.bin for arndale config. No display on
>>> terminal in uboot.
>>> Switched to linaro git (u-boot-linaro-stable.git) a
Sorry for the missing detail. I want to measure how long a specific process
takes. For example,
[3814526.197336] message-1
[3814527.234145] message-2
abdullah
On Monday, February 10, 2014 2:08 PM, Albert ARIBAUD
wrote:
Hi Abdullah,
>
>On Mon, 10 Feb 2014 03:25:51 -0800 (PST), Abdullah
On 02/10/2014 01:14 PM, Andreas Bießmann wrote:
- we have a hardware design bug
- we have a few hundred i.MX31 TT-01 devices in the field
- the i.MX31 rom boot loader is only capable of using 1bit HW-ECC
(loading the first page (2k) from the NAND)
- the NAND chip specifies a requirement of 1bit E
On Mon, Feb 10, 2014 at 10:24:47AM +0100, Albert ARIBAUD wrote:
> Hi Tom,
>
> On Tue, 4 Feb 2014 12:05:33 -0500, Tom Rini wrote:
>
> > When we tell the compiler to optimize for ARMv7 it assumes a default of
> > unaligned accesses being supported at the hardware level and can make
> > use of thi
Hi Tom,
On Mon, 10 Feb 2014 08:21:39 -0500, Tom Rini wrote:
> On Mon, Feb 10, 2014 at 10:24:47AM +0100, Albert ARIBAUD wrote:
> > Hi Tom,
> >
> > On Tue, 4 Feb 2014 12:05:33 -0500, Tom Rini wrote:
> >
> > > When we tell the compiler to optimize for ARMv7 it assumes a default of
> > > unalign
Albert ARIBAUD writes:
> Hi Tom,
>
> On Mon, 10 Feb 2014 08:21:39 -0500, Tom Rini wrote:
>
>> On Mon, Feb 10, 2014 at 10:24:47AM +0100, Albert ARIBAUD wrote:
>> > Hi Tom,
>> >
>> > On Tue, 4 Feb 2014 12:05:33 -0500, Tom Rini wrote:
>> >
>> > > When we tell the compiler to optimize for ARMv7
On Mon, Feb 10, 2014 at 03:57:51PM +0100, Albert ARIBAUD wrote:
> Hi Tom,
>
> On Mon, 10 Feb 2014 08:21:39 -0500, Tom Rini wrote:
>
> > On Mon, Feb 10, 2014 at 10:24:47AM +0100, Albert ARIBAUD wrote:
> > > Hi Tom,
> > >
> > > On Tue, 4 Feb 2014 12:05:33 -0500, Tom Rini wrote:
> > >
> > > > W
Måns Rullgård writes:
> Albert ARIBAUD writes:
>
>> Hi Tom,
>>
>> On Mon, 10 Feb 2014 08:21:39 -0500, Tom Rini wrote:
>>
>>> On Mon, Feb 10, 2014 at 10:24:47AM +0100, Albert ARIBAUD wrote:
>>> > Hi Tom,
>>> >
>>> > On Tue, 4 Feb 2014 12:05:33 -0500, Tom Rini wrote:
>>> >
>>> > > When we tel
Hi Måns,
On Mon, 10 Feb 2014 15:14:49 +, Måns Rullgård
wrote:
> Albert ARIBAUD writes:
>
> > Hi Tom,
> >
> > On Mon, 10 Feb 2014 08:21:39 -0500, Tom Rini wrote:
> >
> >> On Mon, Feb 10, 2014 at 10:24:47AM +0100, Albert ARIBAUD wrote:
> >> > Hi Tom,
> >> >
> >> > On Tue, 4 Feb 2014 12:05
Albert ARIBAUD writes:
> Hi Måns,
>
> On Mon, 10 Feb 2014 15:14:49 +, Måns Rullgård
> wrote:
>
>> Albert ARIBAUD writes:
>>
>> > Hi Tom,
>> >
>> > On Mon, 10 Feb 2014 08:21:39 -0500, Tom Rini wrote:
>> >
>> >> On Mon, Feb 10, 2014 at 10:24:47AM +0100, Albert ARIBAUD wrote:
>> >> > Hi Tom,
On Mon, Feb 10, 2014 at 05:12:24PM +0100, Albert ARIBAUD wrote:
> Hi Måns,
>
> On Mon, 10 Feb 2014 15:14:49 +, Måns Rullgård
> wrote:
>
> > Albert ARIBAUD writes:
> >
> > > Hi Tom,
> > >
> > > On Mon, 10 Feb 2014 08:21:39 -0500, Tom Rini wrote:
> > >
> > >> On Mon, Feb 10, 2014 at 10:24:4
From: Dave Gerlach
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.
Signed-off-by: Dave Gerlach
[trini: Rework patch against mainlin
On 2/10/2014 3:32 AM, Albert ARIBAUD wrote:
Hi Murali,
On Fri, 7 Feb 2014 18:23:07 -0500, Murali Karicheri
wrote:
- Resending since I missed some in the CC
This patch series add support for keystone2 SoC and K2HK EVM.
Following patches were reviewed before in this list and v1 of the
same
Signed-off-by: Eric Nelson
---
board/boundary/nitrogen6x/nitrogen6dl.cfg | 2 +-
board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 2 +-
board/boundary/nitrogen6x/nitrogen6q.cfg| 2 +-
board/boundary/nitrogen6x/nitrogen6q2g.cfg | 2 +-
board/boundary/nitrogen6x/nitrogen6s.cfg| 2 +-
board/
Hi All
I have gone through code conditional compilation macros are used
as #ifdef, sometime #if defined().
What is preferred way to provide such conditional preprocessor macro
as per coding style?
Thanks,
Manish Badarkhe
___
U-Boot mailing list
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Hi Tom,
On Mon, 10 Feb 2014 11:24:03 -0500, Tom Rini wrote:
> On Mon, Feb 10, 2014 at 05:12:24PM +0100, Albert ARIBAUD wrote:
> > Hi Måns,
> >
> > On Mon, 10 Feb 2014 15:14:49 +, Måns Rullgård
> > wrote:
> >
> > > Albert ARIBAUD writes:
> > >
> > > > Hi Tom,
> > > >
> > > > On Mon, 10 F
I have used information from the following to get a timestamped log of
each message output by U-Boot. I imagine there is more discussion of
this on the U-Boot wiki, http://www.denx.de/wiki/U-Boot/WebHome.
http://u-boot.10912.n7.nabble.com/U-Boot-Users-decrease-boot-time-td91840.html
Good luck
Hi Murali,
On Mon, 10 Feb 2014 12:22:53 -0500, Murali Karicheri
wrote:
> On 2/10/2014 3:32 AM, Albert ARIBAUD wrote:
> > Hi Murali,
> >
> > On Fri, 7 Feb 2014 18:23:07 -0500, Murali Karicheri
> > wrote:
> >
> >> - Resending since I missed some in the CC
> >>
> >> This patch series add support
Dear Chris,
In message <52f8a706.7030...@free.fr> you wrote:
>
> > "abc"
> > "def"
> >
> > Is a valid C string, and does not require a backslash. Do I miss
> > something?
>
> Yes, you are of course correct: the result is the C string "abcdef" and =
>
> the backslash in the original is su
Dear Abdullah YILDIZ,
please stop top posting / full quoting.
In message <1392036487.5566.yahoomail...@web140305.mail.bf1.yahoo.com> you
wrote:
>
> Sorry for the missing detail. I want to measure how long a specific process
> takes. For example,
> [3814526.197336] message-1
> [3814527.234145] m
Dear Manish Badarkhe,
In message
you wrote:
>
> I have gone through code conditional compilation macros are used
> as #ifdef, sometime #if defined().
>
> What is preferred way to provide such conditional preprocessor macro
> as per coding style?
If this is just a logican decision, please alwa
Dear Albert,
In message <20140210182646.2de92810@lilith> you wrote:
...
> - first, if "the first part of the equation" means "the compiler
> setting" as opposed to the hardware setting, then the question
> fails to realize that we don't (and should not) consider the
> compiler and hardware s
Hi Tiger,
On 10 February 2014 03:20, wrote:
> Hi, experts:
>
> Sandbox is a platform independent drivers test environment.
>
> And, I could compile it with gcc-4.6 x86_64 version.
>
> So, if a platform independent driver runs ok, then:
>
> Does it also mean this driver is ok for running in an aa
Hi,
I've recently compiled U-Boot (fsl-sdk-v1.3.2) for P2041RDB and had a
problem with ARP requests flooding if the peer was not there.
It turned out that NetArpWaitTimerStart was not relocated to RAM, but
remained in flash, so it couldn't be updated.
Looking at the global offset table, it looks
On 2/10/2014 1:01 PM, Albert ARIBAUD wrote:
Hi Murali,
On Mon, 10 Feb 2014 12:22:53 -0500, Murali Karicheri
wrote:
On 2/10/2014 3:32 AM, Albert ARIBAUD wrote:
Hi Murali,
On Fri, 7 Feb 2014 18:23:07 -0500, Murali Karicheri
wrote:
- Resending since I missed some in the CC
This patch se
Hi Murali,
On Mon, 10 Feb 2014 14:42:14 -0500, Murali Karicheri
wrote:
> On 2/10/2014 1:01 PM, Albert ARIBAUD wrote:
> > Hi Murali,
> >
> > On Mon, 10 Feb 2014 12:22:53 -0500, Murali Karicheri
> > wrote:
> >
> >> On 2/10/2014 3:32 AM, Albert ARIBAUD wrote:
> >>> Hi Murali,
> >>>
> >>> On Fri, 7
From: Stephen Warren
Tegra's EHCI controllers only have a single PORTSC register. Configure
U-Boot to know this. This prevents e.g. ehci_shutdown() from touching
non-existent registers.
Signed-off-by: Stephen Warren
---
include/configs/tegra114-common.h | 1 +
include/configs/tegra124-common.h
On Mon, Feb 10, 2014 at 09:44:58AM +0100, Albert ARIBAUD wrote:
> Hi Darwin,
>
> On Thu, 6 Feb 2014 19:23:03 -0800, Darwin Rambo
> wrote:
>
> > The Kona architecture is present on a number of Broadcom mobile SoCs
> > including the bcm281xx family of chips.
> >
> > Signed-off-by: Darwin Rambo
On Fri, Feb 07, 2014 at 06:23:07PM -0500, Murali Karicheri wrote:
> - Resending since I missed some in the CC
>
> This patch series add support for keystone2 SoC and K2HK EVM.
>
> Following patches were reviewed before in this list and v1 of the
> same is send with review comments incorporated:
On Fri, Feb 07, 2014 at 06:23:08PM -0500, Murali Karicheri wrote:
> From: Vitaly Andrianov
>
> The keystone2 SOC requires to fix all 32 bit aliased addresses
> to their 36 physical format. This has to happen after all fdt
> nodes are added or modified.
>
> Signed-off-by: Vitaly Andrianov
Why
On Fri, Feb 07, 2014 at 06:23:13PM -0500, Murali Karicheri wrote:
> k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
> SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please
> refer the ti/k2hk_evm/README for details on the board, build and other
> information.
>
> This
On Mon, Feb 10, 2014 at 06:26:46PM +0100, Albert ARIBAUD wrote:
> Hi Tom,
>
> On Mon, 10 Feb 2014 11:24:03 -0500, Tom Rini wrote:
>
> > On Mon, Feb 10, 2014 at 05:12:24PM +0100, Albert ARIBAUD wrote:
> > > Hi Måns,
> > >
> > > On Mon, 10 Feb 2014 15:14:49 +, Måns Rullgård
> > > wrote:
> >
Original Message
Subject: [PATCH 1/3] armv8/cache: Consolidate setting for MAIR and TCR
Date: Mon, 10 Feb 2014 13:55:52 -0800
From: York Sun
To:
CC: , York Sun , David Feng
Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with
sub-architecture.
Signed-off-by:
Original Message
Subject: [PATCH 2/3] armv8/cache: Flush D-cache, invalidate I-cache for
relocation
Date: Mon, 10 Feb 2014 13:55:53 -0800
From: York Sun
To:
CC: , York Sun , David Feng
If D-cache is enabled, we need to flush it, and invalidate i-cache before
jumping to the
Original Message
Subject: [PATCH 3/3] armv8/cache: Change cache invalidate and flush function
Date: Mon, 10 Feb 2014 13:55:54 -0800
From: York Sun
To:
CC: , York Sun , David Feng
When SoC first boots up, we should invalidate the cache but not flush it.
We can use the same f
Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.
Signed-off-by: York Sun
---
README |5 +
drivers/ddr/fsl/ctrl_regs.c |1 +
drivers/ddr/fsl/main.c |1 +
drivers/ddr/fsl/options.c | 17 +
DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.
Signed-off-by: York Sun
---
README |5 +
drivers/ddr/f
Initially it was believed the DDR controller on Freescale ARM would have
big endian. But some platform will have little endian.
Signed-off-by: York Sun
---
README |6 +++
drivers/ddr/fsl/arm_ddr_gen3.c | 103
drivers/ddr/fsl/c
This driver needs a data structure in SRAM before SDRAM is available.
This is not alway the case using .data section. Moving this data
structure to global_data guarantees it is writable.
Signed-off-by: York Sun
CC: Troy Kisky
---
drivers/i2c/mxc_i2c.c | 18 --
incl
On Mon, Feb 10, 2014 at 02:02:52PM -0800, York Sun wrote:
> This driver needs a data structure in SRAM before SDRAM is available.
> This is not alway the case using .data section. Moving this data
> structure to global_data guarantees it is writable.
>
> Signed-off-by: York Sun
> CC: Troy Kisky
Dear Tom,
In message <20140210212630.GB7049@bill-the-cat> you wrote:
>
> Then gcc has a bug and you need to convince them to fix it. What gcc
> does, as Mans has explained, and this invalidates the "lets catch
> unaligned access problems" notion, is for ARMv6 and higher say "we
> assume by defau
Original Message
Subject: [PATCH] arm/lib: Add get_effective_memsize() to board.c
Date: Mon, 10 Feb 2014 14:04:19 -0800
From: York Sun
To:
CC: , York Sun
This function has been around for powerpc. It is used for systems with
memory more than CONFIG_MAX_MEM_MAPPED. In case o
Freescale LayerScape with Chassis Generation 3 is a set of SoCs with
ARMv8 cores and 3rd generation of Chassis. We use different MMU setup
to support memory map and cache attribute for these SoCs. MMU and cache
are enabled very early to bootst performance, especially for early
development on emulat
On 02/10/2014 02:10 PM, Tom Rini wrote:
> On Mon, Feb 10, 2014 at 02:02:52PM -0800, York Sun wrote:
>
>> This driver needs a data structure in SRAM before SDRAM is available.
>> This is not alway the case using .data section. Moving this data
>> structure to global_data guarantees it is writable.
On 02/10/2014 02:19 PM, Scott Wood wrote:
> On Mon, 2014-02-10 at 14:04 -0800, York Sun wrote:
>> This function has been around for powerpc. It is used for systems with
>> memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory,
>> this feature can limit U-boot to one block without
On Mon, Feb 10, 2014 at 11:17:23PM +0100, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20140210212630.GB7049@bill-the-cat> you wrote:
> >
> > Then gcc has a bug and you need to convince them to fix it. What gcc
> > does, as Mans has explained, and this invalidates the "lets catch
> > unalign
On Mon, 2014-02-10 at 14:33 -0800, York Sun wrote:
> On 02/10/2014 02:19 PM, Scott Wood wrote:
> > On Mon, 2014-02-10 at 14:04 -0800, York Sun wrote:
> >> This function has been around for powerpc. It is used for systems with
> >> memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous me
On Mon, Feb 10, 2014 at 02:28:01PM -0800, York Sun wrote:
> On 02/10/2014 02:10 PM, Tom Rini wrote:
> > On Mon, Feb 10, 2014 at 02:02:52PM -0800, York Sun wrote:
> >
> >> This driver needs a data structure in SRAM before SDRAM is available.
> >> This is not alway the case using .data section. Movi
On 02/10/2014 02:45 PM, Tom Rini wrote:
> On Mon, Feb 10, 2014 at 02:28:01PM -0800, York Sun wrote:
>> On 02/10/2014 02:10 PM, Tom Rini wrote:
>>> On Mon, Feb 10, 2014 at 02:02:52PM -0800, York Sun wrote:
>>>
This driver needs a data structure in SRAM before SDRAM is available.
This is no
On 02/10/2014 02:37 PM, Scott Wood wrote:
> On Mon, 2014-02-10 at 14:33 -0800, York Sun wrote:
>> On 02/10/2014 02:19 PM, Scott Wood wrote:
>>> On Mon, 2014-02-10 at 14:04 -0800, York Sun wrote:
This function has been around for powerpc. It is used for systems with
memory more than CONFIG
On Mon, 2014-02-10 at 14:55 -0800, York Sun wrote:
> On 02/10/2014 02:37 PM, Scott Wood wrote:
> > On Mon, 2014-02-10 at 14:33 -0800, York Sun wrote:
> >> On 02/10/2014 02:19 PM, Scott Wood wrote:
> >>> On Mon, 2014-02-10 at 14:04 -0800, York Sun wrote:
> This function has been around for powe
On 02/10/2014 03:00 PM, Scott Wood wrote:
> On Mon, 2014-02-10 at 14:55 -0800, York Sun wrote:
>> On 02/10/2014 02:37 PM, Scott Wood wrote:
>>> On Mon, 2014-02-10 at 14:33 -0800, York Sun wrote:
On 02/10/2014 02:19 PM, Scott Wood wrote:
> On Mon, 2014-02-10 at 14:04 -0800, York Sun wrote:
In QEMU we implement a PV machine type called "ppce500". That board is able
to run any e500+ FSL cores (e500v2, e500mc, e5500, e6500).
It is heavily inspired by the MPC8544DS SoC and board combination, but
implements only the bare minimum to make Linux happy enough to drive a
virtual machine.
Thi
For KVM we have a special PV machine type called "ppce500". This machine
is inspired by the MPC8544DS board, but implements a lot less features
than that one.
It also provides more PCI slots and is supposed to be enumerated by
device tree only.
This patch adds support for the generic ppce500 mach
This patch adds a helper function that can be used to interpret most
"ranges" properties in the device tree.
It reads the n'th range out of a "ranges" array and returns the node's
virtual address of the range, the physical address that range starts at
and the size of the range.
Signed-off-by: Ale
The DDR mapping function really is just a generic virtual -> physical
mapping function. Generalize it so it can support any virtual starting
offset and IO maps just the same.
Signed-off-by: Alexander Graf
---
arch/powerpc/cpu/mpc85xx/tlb.c | 48 ++--
arch/po
We already have a nice helper to give us a property cell value with default
fall back from a path. Split that into two helpers - one for the old path
based lookup and one to give us a value based on a node offset.
Signed-off-by: Alexander Graf
---
common/fdt_support.c | 38 +++
There is no need to set IVORs to anything but their default values,
so let's leave them where they are.
Suggested-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/cpu/mpc85xx/cpu_init.c |4 --
arch/powerpc/cpu/mpc85xx/fixed_ivor.S| 63
We want to be able to directly execute the ELF binary without going
through the u-boot.bin one.
To know where we have to start executing this ELF binary we have to
tell the linker where our entry point is.
Signed-off-by: Alexander Graf
---
arch/powerpc/cpu/mpc85xx/u-boot.lds |1 +
1 file c
On 02/10/2014 02:02 PM, York Sun wrote:
> This driver needs a data structure in SRAM before SDRAM is available.
> This is not alway the case using .data section. Moving this data
> structure to global_data guarantees it is writable.
>
> Signed-off-by: York Sun
> CC: Troy Kisky
> ---
> drivers/i
---
arch/arm/include/asm/arch-at91/at91_rstc.h |2 +-
include/configs/at91sam9260ek.h|1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h
b/arch/arm/include/asm/arch-at91/at91_rstc.h
index a942342..59be96b 100644
--- a/
On 02/10/2014 04:25 PM, Tom Rini wrote:
On Fri, Feb 07, 2014 at 06:23:13PM -0500, Murali Karicheri wrote:
k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please
refer the ti/k2hk_evm/README for details on the board, buil
On 02/10/2014 04:25 PM, Tom Rini wrote:
On Fri, Feb 07, 2014 at 06:23:08PM -0500, Murali Karicheri wrote:
From: Vitaly Andrianov
The keystone2 SOC requires to fix all 32 bit aliased addresses
to their 36 physical format. This has to happen after all fdt
nodes are added or modified.
Signed-of
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