BSC9132 SoC has two separate DDR controllers for PowerPC side and DSP side
DDR. They are mapped to PowerPC and DSP CCSR space respectively.
BSC9132QDS has two on-board MC34716EP DDR3 memory one connected to PowerPC
and other to DSP side controller.
Configure DSP DDR controller similar to PowerPC s
Dear Chin Liang See,
In message <1372718641-4066-1-git-send-email-cl...@altera.com> you wrote:
> Consolidating reset code into reset_manager.c.
> Also separating reset configuration for virtual target
> and real hardware Cyclone V development kit
...
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/socf
Dear Chin Liang See,
In message <1372719578-4247-1-git-send-email-cl...@altera.com> you wrote:
> Adding System Manager driver which will configure the
> pin mux for real hardware Cyclone V development kit
> (not Virtual Platform)
License clash:
> +/*
> + * Copyright Altera Corporation (C) 2013.
Dear Chin Liang See,
In message <1372719771-4329-1-git-send-email-cl...@altera.com> you wrote:
> Adding the generated pin mux
> configuration by Preloader Generator tool
In addition to the license issue, please chose a descriptive subject.
It is not really helpful when all patches of a series hav
Update the Makefiles so that all boards can use the same spl generation tool
Signed-off-by: Inderpal Singh
---
This is needed for the Arndale board support patch just sent
after sending this one.
Makefile|2 +-
include/configs/exynos5250-dt.h |2 +-
tools/Makefil
This patch adds mmc support to the arndale board.
Signed-off-by: Inderpal Singh
---
board/samsung/arndale/arndale.c | 14 ++
board/samsung/dts/exynos5250-arndale.dts | 18 ++
2 files changed, 32 insertions(+)
diff --git a/board/samsung/arndale/arndale.c
The Arndale board is based on samsung's exynos5250 SOC.
For spl generation, it depends on the patch at [5].
First patch provides the basic arndale board support. The second patch
adds the MMC support.
Changes in v2:
- split from earlier patchset at [3] as per Minkyu
- Removed chec
Dear Wolfgang,
On Tue, 2013-07-02 at 06:24 +0200, ZY - wd wrote:
> Dear Chin Liang See,
>
> In message <1372719771-4329-1-git-send-email-cl...@altera.com> you wrote:
> > Adding the generated pin mux
> > configuration by Preloader Generator tool
>
> In addition to the license issue, please chose
Dear Marek Vasut,
The same kernel image works fine in P1020 RDB board with NOR flash boot.
When the same kernel image is used for our custom board with P1012
processor we are getting kernel panic.
We are also suspecting on memory, How do we trace it ?
Note: The same kernel image is used for our
Dear Rajeshwari,
On 01/07/13 19:02, Rajeshwari Shinde wrote:
> This patch performs the following:
>
> 1) Convert the assembly code for memory and clock initialization to C code.
> 2) Move the memory and clock init codes from board/samsung to arch/arm
> 3) Creat a common lowlevel_init file across
On Mon, 1 Jul 2013 23:11:07 -0300
Otavio Salvador wrote:
...
> You didn' t put the splashpos fix.
I would prefer to wait a few days, so other people will have a chance
to review and comment. Also I didn't test the splashpos fix yet, it
was only compile-tested.
Thanks,
Anatolij
_
Dear Inder,
On 2 July 2013 10:11, Inderpal Singh wrote:
> The Arndale board is based on samsung's exynos5250 SOC.
> For spl generation, it depends on the patch at [5].
>
> First patch provides the basic arndale board support. The second patch
> adds the MMC support.
>
> Changes in v2:
> -
Latest changes to mkimage, Makefile and added proftool broke compilation on OS
X. This series makes u-boot build clean again with some little adoptions.
Patch 'lib/rsa/rsa-sig.c: compile on OS X' supersedes
http://patchwork.ozlabs.org/patch/255283/
Changes in v2:
- remove REG_NOERROR instead of
Dear Inderpal Singh,
On 02/07/13 13:41, Inderpal Singh wrote:
> Arndale board is based on samsung's exynos5250 soc.
>
> Signed-off-by: Inderpal Singh
> ---
> MAINTAINERS |4 +
> board/samsung/arndale/Makefile | 58 +++
> board/samsung/arndale/arndale
Interfaces exposed by error.h seems not to be used in rsa-sig.c, remove it.
This also fixes an compile error on OS X:
---8<---
u-boot/lib/rsa/rsa-sign.c:23:19: error: error.h: No such file or directory
--->8---
Signed-off-by: Andreas Bießmann
Tested-by: Lubomir Popov
---
Changes in v2: None
l
Remove non portable usage of REG_NOERROR.
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, even GNU
regex(3) do mention REG_NOERROR, just remove it.
Signed-off-by: Andreas Bießmann
---
Changes in v2:
- remove REG_NOERROR instead of defining it conditionally (as Jeroen
suggested
Some OS (like OS X) do not provide a generic readelf. We should enforce to use
the toochain provided readelf instead, to do so use $(CROSS_COMPILE)readelf.
Signed-off-by: Andreas Bießmann
Tested-by: Lubomir Popov
---
Changes in v2: None
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deleti
Hi Jeroen,
On 01.07.13 22:12, Jeroen Hofstee wrote:
> Hello Andreas,
>
> On 07/01/2013 08:45 PM, Jeroen Hofstee wrote:
>> Hello Andreas,
>>
>> On 06/30/2013 01:15 PM, Andreas Bießmann wrote:
>>> BSD (like OS X) variants of regex.h do not declare REG_NOERROR, add a
>>> simple
>>> define for them.
Hi Tom, Marek,
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini wrote:
> Hey all,
>
> I've tagged and pushed v2013.07-rc2. A bit more over the place than I
> should have gone, but picked up a lot of things that have been
> outstanding for a while. The big thing is a refactor of the boot loop.
> Everyt
Signed-off-by: Masahiro Yamada
---
doc/README.SPL | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index 4e1cb28..ac9a213 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -77,7 +77,7 @@ an SPL CPU in boards.cfg as follows:
normal_cpu
On 01/07/13 17:41, Rajeshwari Birje wrote:
> Hi Minkyu Kang,
>
> As per the user manual I have for EXYNOS5 it is
> FOUT = MDIV * FIN / (PDIV * 2^SDIV)
What is your version of manual?
If possible, could you please send it to me?
>
> Regards,
> Rajeshwari Shinde.
>
> On Mon, Jul 1, 2013 at 1:56
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