> -Original Message-
> From: Sebastian Hesselbarth
> [mailto:sebastian.hesselba...@gmail.com]
> Sent: 03 March 2013 17:14
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Rabeeh Khoury; Albert
> Aribaud; Andy Fleming; Joe Hershberger; Daniel Stodden;
> Luka Perkov
> Subject: Re: [PATCH
> -Original Message-
> From: Sebastian Hesselbarth
> [mailto:sebastian.hesselba...@gmail.com]
> Sent: 03 March 2013 17:07
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Rabeeh Khoury; Albert
> Aribaud; Andy Fleming; Joe Hershberger; Daniel Stodden;
> Luka Perkov
> Subject: Re: [PATCH
> -Original Message-
> From: Sebastian Hesselbarth
> [mailto:sebastian.hesselba...@gmail.com]
> Sent: 03 March 2013 17:01
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Rabeeh Khoury; Albert
> Aribaud; Andy Fleming; Joe Hershberger; Daniel Stodden;
> Luka Perkov
> Subject: Re: [PATCH
Dear All,
> Hi Tom,
>
> > -BEGIN PGP SIGNED MESSAGE-
> > Hash: SHA1
> >
> > On 02/21/2013 06:33 PM, Jaehoon Chung wrote:
> > > Hi Tom,
> > >
> > > On 02/22/2013 02:45 AM, Tom Rini wrote: On 02/21/2013 12:21 PM,
> > > Lukasz Majewski wrote:
> > Dear All,
> >
> > I'd like
Hi Tom,
> From: Pantelis Antoniou
>
> Previously we didn't support upload/download larger than available
> memory. This is pretty bad when you have to update your root
> filesystem for example.
>
> This patch removes that limitation (and the crashes when you
> transfered any file larger than 4
Hello,
There is merge conflict between mainline and ARM trees on davinci gpio,
between
commit 03414ac45e119496e2475aeacbb968bb67da24f8
gpio: Build the da8xx_gpio code for the davinci644x device
(mainline)
and
commit b9f56698c7e9bf7ac773b5346c4f6886e214b69b
From: Sonic Zhang
- Should return 0 for both DOS_MBR and DOS_PBR block types in test_part_dos().
Signed-off-by: Sonic Zhang
---
disk/part_dos.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 3fe901b..98f82ca 100644
--- a/disk/
Hi Tom,
>
> > From: Pantelis Antoniou
> >
> > Previously we didn't support upload/download larger than available
> > memory. This is pretty bad when you have to update your root
> > filesystem for example.
> >
> > This patch removes that limitation (and the crashes when you
> > transfered an
Hi Andy,
Could you please apply this patch?
- dongsheng
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Tuesday, March 05, 2013 10:14 AM
> To: 'york...@freescale.com'
> Cc: Fleming Andy-AFLEMING; 'u-boot@lists.denx.de'
> Subject: RE: [PATCH] powerpc/mpc85xx: add setting of clo
Dear Eric,
In message <513d18f3.2010...@boundarydevices.com> you wrote:
>
> I understand the point, but think the pain is manageable and
> mostly ours.
When I say it doesn't scale, I'm not only thinking about yourown
efforts, and your customers.
I also think about things like the increase of bu
On 3/10/2013 11:55 PM, Andreas Bießmann wrote:
Hi, Andreas
Dear Josh Wu,
On 22.02.2013 11:36, Josh Wu wrote:
Hi, Bo Shen
Sorry for the late reply. I am taken over by other stuff. check my
comments below.
On 1/23/2013 5:31 PM, Bo Shen wrote:
Hi Josh,
On 01/22/2013 04:36 PM, Josh Wu wrote:
Hi, experts:
I want to know which specific nand chip supports ONFI interface spec?
I have googled , but not find any product manual.
Best wishes,
___
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Hi,
On Mon, Mar 11, 2013 at 5:06 PM, wrote:
> Hi, experts:
> I want to know which specific nand chip supports ONFI interface spec?
> I have googled , but not find any product manual.
Spansion ML series and Micron MT29F series flashes have onfi read
parameter page support.
Thanks,
Jagan.
>
> B
On 11/03/2013 12:15, Wolfgang Denk wrote:
> Dear Eric,
>
Hi Wolfgang, hi Eric,
sorry to jump late in the discussion.
> In message <513d18f3.2010...@boundarydevices.com> you wrote:
>>
>> I understand the point, but think the pain is manageable and
>> mostly ours.
>
> When I say it doesn't scale
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/11/2013 06:03 AM, Lukasz Majewski wrote:
> Hi Tom,
>
>
>>
>>> From: Pantelis Antoniou
>>>
>>> Previously we didn't support upload/download larger than
>>> available memory. This is pretty bad when you have to update
>>> your root filesystem
Hi Stefano,
On Mon, Mar 11, 2013 at 9:04 AM, Stefano Babic wrote:
> As set previously, my position is, since RFC patches were pushed in
> January, that some kind of complexity can be well managed with SPL
> instead of with very SOC specific code. However, in the meantime I said
> explicitely tha
Adnan Ali (1):
Introduced btrfs file-system with btrload command
Makefile |1 +
common/Makefile|1 +
common/cmd_btr.c | 65 +++
fs/btrfs/Makefile | 51 ++
fs/btrfs/btrfs.c | 1348
Introduces btrfs file-system to read file from
volume/sub-volumes with btrload command. This
implementation has read-only support.
This btrfs implementation is based on syslinux btrfs
code, commit 269ebc845ebc8b46ef4b0be7fa0005c7fdb95b8d.
v5: merged with master.
v4: btrls command added.
v3
Thanks Wolfgang,
On 03/11/2013 04:15 AM, Wolfgang Denk wrote:
Dear Eric,
In message <513d18f3.2010...@boundarydevices.com> you wrote:
I understand the point, but think the pain is manageable and
mostly ours.
When I say it doesn't scale, I'm not only thinking about yourown
efforts, and your
On 11/03/2013 14:18, Fabio Estevam wrote:
> Hi Stefano,
>
> On Mon, Mar 11, 2013 at 9:04 AM, Stefano Babic wrote:
>
>> As set previously, my position is, since RFC patches were pushed in
>> January, that some kind of complexity can be well managed with SPL
>> instead of with very SOC specific co
On Mon, Mar 11, 2013 at 10:44 AM, Stefano Babic wrote:
> IMHO, yes. The long term solution is using SPL, as well as it is already
> used in other SOCs. But at the moment, I tend to not block the current
> series, taking into account that we have not yet a i.MX6 board with SPL.
Thanks, Stefano. S
Thanks Stefano,
On 03/11/2013 06:44 AM, Stefano Babic wrote:
On 11/03/2013 14:18, Fabio Estevam wrote:
Hi Stefano,
On Mon, Mar 11, 2013 at 9:04 AM, Stefano Babic wrote:
As set previously, my position is, since RFC patches were pushed in
January, that some kind of complexity can be well mana
On 11/03/2013 15:02, Eric Nelson wrote:
> Thanks Stefano,
>
> On 03/11/2013 06:44 AM, Stefano Babic wrote:
>> On 11/03/2013 14:18, Fabio Estevam wrote:
>>> Hi Stefano,
>>>
>>> On Mon, Mar 11, 2013 at 9:04 AM, Stefano Babic wrote:
>>>
As set previously, my position is, since RFC patches were
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/11/2013 10:30 AM, Stefano Babic wrote:
> On 11/03/2013 15:02, Eric Nelson wrote:
>> Thanks Stefano,
>>
>> On 03/11/2013 06:44 AM, Stefano Babic wrote:
>>> On 11/03/2013 14:18, Fabio Estevam wrote:
Hi Stefano,
On Mon, Mar 11, 2013
On Sat, Mar 09, 2013 at 04:02:35PM +0100, Wolfgang Denk wrote:
> Dear Tom,
>
> I apologize for being inattentive for so long...
>
>
> The following changes since commit fc959081d41aab2d6f4614c5fb3dd1b77ffcdcf4:
>
> x86: Enable CONFIG_OF_CONTROL on coreboot (2013-03-04 15:57:52 -0800)
>
> ar
On Sat, Mar 09, 2013 at 04:07:24PM +0100, Wolfgang Denk wrote:
> Dear Tom,
>
> The following changes since commit fc959081d41aab2d6f4614c5fb3dd1b77ffcdcf4:
>
> x86: Enable CONFIG_OF_CONTROL on coreboot (2013-03-04 15:57:52 -0800)
>
> are available in the git repository at:
>
> git://git.de
Adding new fields to struct spi_slave and struct spi_flash is painful,
because most drivers don't zero the fields they don't use. Anyway it
seems better to have the SPI/SPI flash infrastructure provide a simple
way of doing this that all drivers can use.
So the first part of this series adds spi_a
At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structu
Rather than each driver having its own way to allocate a SPI slave,
use the new allocation function everywhere. This will make it easier
to extend the interface without breaking drivers.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use spi_alloc_slave() in bfin_spi6xx.c
- Use spi_alloc_slave()
It is possible that our PCI bus will provide the SPI controller, so change
the init order to make this work.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/x86/lib/board.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/lib/board.c b/arch/x86/lib/bo
This command is useful for measuring SPI flash load times and the like.
Enable gettime as well to obtain absolute time tick values.
Signed-off-by: Simon Glass
---
Changes in v2:
- Enable gettime command for coreboot also
include/configs/coreboot.h | 2 ++
1 file changed, 2 insertions(+)
diff -
Add a memory-mapped 8GB SPI chip.
Signed-off-by: Simon Glass
---
Changes in v2: None
board/chromebook-x86/dts/link.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/board/chromebook-x86/dts/link.dts
b/board/chromebook-x86/dts/link.dts
index ae8217d..d0738cb 100644
--- a/boar
Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/spi/atmel.c| 8 +---
driver
At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure cha
This supports Intel ICH7/9. The Intel controller is a little unusual in
that it is mostly intended for use with SPI flash, and has some
optimisations and features specifically for that application. In
particular it is not possible to support ongoing transactions that
continue over many calls with S
Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/spi/spi_flash.c | 10 --
1 file changed, 8 i
Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
bytes that can be written at a time. Add this as a parameter so that
clients of the SPI interface can respect this value.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/spi.h | 3 +++
1 file changed, 3 insertion
This SPI controller can only write 64 bytes at a time. Add this restriction
in so that 'sf write' works correct for blocks larger than 64 bytes.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/spi/ich.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/spi/ich.c b/driv
The verify code is broken on archs with signed char. Fix it.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to use unsigned type for buffers in 'sf test'
common/cmd_sf.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/common/cmd_sf.c b/common/cmd_sf.c
Turn on SPI flash support and related commands.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/configs/coreboot.h | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index 49f05de..4826756 100644
--
It is common to have a "reg = " property in the FDT.
Add a function to handle this, similar to the existing
fdtdec_get_addr();
Signed-off-by: Simon Glass
---
Changes in v2: None
include/fdtdec.h | 15 +++
lib/fdtdec.c | 26 +-
2 files changed, 36 insertio
Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/mtd/spi/spi_flash.c | 46 -
include/fdtdec.h| 1 +
i
Hi Marek,
As requested here is an email about the USB patches. I have put them in a
bundle here:
http://patchwork.ozlabs.org/bundle/sjg/for-marex/
Regards,
Simon
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Hi Tom,
On Sun, Mar 10, 2013 at 6:27 AM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 03/09/2013 01:30 PM, Simon Glass wrote:
> > Hi Otavio,
> >
> > On Sat, Mar 9, 2013 at 4:31 AM, Otavio Salvador
> > mailto:ota...@ossystems.com.br>> wrote:
> >
> > On Fri, Mar 8, 201
When building host utilities, we include libfdt.h from the host, not from
U-Boot. This in turn brings in libfdt_env.h from the host, which can mess
up the types and cause a build failure, depending on the host environment.
To fix this, force inclusion of U-Boot's libfdt_env.h so that the types
are
Hi Amar,
On Tue, Mar 5, 2013 at 5:11 AM, Amar wrote:
> Add required compatible information for DWMMC driver.
>
> Signed-off-by: Vivek Gautam
> Signed-off-by: Amar
> Acked-by: Jaehoon Chung
> ---
> Changes since V1:
> No change.
>
> Changes since V2:
> 1)Updation of commit mess
On 03/09/2013 07:06:54 PM, htbegin wrote:
Hi, Scott
On Fri, Mar 8, 2013 at 6:27 AM, Scott Wood
wrote:
>> >> I just use "*length -= left_to_write - written_size" to tell
the upper
>> >> level that what
>> >> had been actually happened. For the current block,
"written_size" has
>> >> be
Dear Eric,
In message <513dde22.4090...@boundarydevices.com> you wrote:
>
> Would it help if we restrict the number of boards directly in
> boards.cfg?
Not really. Thi sjust papers over the problem, but does not solve it.
> We'll be happy to pursue the SPL route, but this won't be
> something
This file handles common pre-relocation init for boards which use
the generic framework.
It starts up the console, DRAM, performs relocation and then jumps
to post-relocation init.
Signed-off-by: Simon Glass
---
Changes in v9:
- Rebase x86 global_data patch on top of mainline
Changes in v8: Non
This enables generic board support so that ARM boards can define
CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Simon Glass
---
Changes in v9:
- Use !CONFIG instead of nCONFIG
Changes in v8:
- Define __HAVE_ARCH_GENERIC_BOARD in ARM's config.mk
Changes in v7: None
Changes in v6: None
Changes in v5: N
This enables generic board support so that ppc boards can define
CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Simon Glass
---
Changes in v9:
- Use !CONFIG instead of nCONFIG
Changes in v8:
- Define __HAVE_ARCH_GENERIC_BOARD in PPC's config.mk
Changes in v7: None
Changes in v6: None
Changes in v5: N
This enables generic board support so that x86 boards can define
CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Simon Glass
---
Changes in v9:
- Use !CONFIG instead of nCONFIG
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- Avoid setting up gd on x86 as it is already done
Link symbols as created by the link script can either be absolute or
relative to the text start. This option switches between the two options
so that we can support both.
As we convert architectures over to generic board, we can see if this
option is actually needed, or whether it is possible to u
On 03/11/2013 03:56 AM, sonic@gmail.com wrote:
> From: Sonic Zhang
>
> - Should return 0 for both DOS_MBR and DOS_PBR block types in test_part_dos().
What problem does this solve?
I don't believe this change is correct. The purpose of test_part_dos()
is to determine whether a block device c
Hi,
On Tue, Mar 5, 2013 at 4:39 PM, Simon Glass wrote:
> This enables generic board support so that x86 boards can define
> CONFIG_SYS_GENERIC_BOARD.
>
> Signed-off-by: Simon Glass
> ---
> Changes in v6: None
> Changes in v5:
> - Avoid setting up gd on x86 as it is already done
>
> Changes in v
This enables generic board support so that x86 boards can define
CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Simon Glass
---
Changes in v10:
- Define __HAVE_ARCH_GENERIC_BOARD in the correct x86 patch
Changes in v9:
- Use !CONFIG instead of nCONFIG
Changes in v8: None
Changes in v7: None
Changes i
Hello,
The following changes since commit fc959081d41aab2d6f4614c5fb3dd1b77ffcdcf4:
x86: Enable CONFIG_OF_CONTROL on coreboot (2013-03-04 15:57:52 -0800)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes up to 76b40ab41eff1f402ee52ba768
On Thu, Feb 07, 2013 at 11:14:48PM -, Enric Balletbo i Serra wrote:
> From: Enric Balletbo i Serra
>
> This patch will allow use SPL to boot an u-boot from the OneNAND.
>
> Tested with IGEPv2 board with a OneNAND from Numonyx
>
> Signed-off-by: Enric Balletbo i Serra
>
> ---
> common/spl
On Tue, Feb 12, 2013 at 09:29:08PM -, Lokesh Vutla wrote:
> Adding new board files for DRA7XX socs.
> The pad registers layout is changed completely from OMAP5
> So introducing the new structure here and also adding the
> minimal data.
>
> Signed-off-by: Lokesh Vutla
> Signed-off-by: Nishant
Hi Tom,
On Mon, Mar 11, 2013 at 10:03 AM, Simon Glass wrote:
> This series creates a generic board init implementation which contains
> the essential functions of the major arch/xxx/lib/board.c files. It is
> split into two parts: board_f.c for pre-relocation and board_r.c for
> post-relocation.
Dear colleagues!
Thank You very much for the u-Boot GIT. It is very useful. I have tried to make
u-Boot for tms320dm368. It works.
I do have a questions will You please give Me the advise.
I do have board Spectrumboard. u-Boot is started from NAND there. What I needed
is to make booting from SD
On Fri, Mar 08, 2013 at 09:51:32PM +0100, Wolfgang Denk wrote:
> The "mtest" command is of little practical use (if any), and
> experience has shown that a large number of board configurations
> define useless or even dangerous start and end addresses. If not even
> the board maintainers are able
On Mon, Mar 11, 2013 at 10:38:21AM +0100, Albert ARIBAUD wrote:
> Hello,
>
> There is merge conflict between mainline and ARM trees on davinci gpio,
> between
>
> commit 03414ac45e119496e2475aeacbb968bb67da24f8
> gpio: Build the da8xx_gpio code for the davinci644x device
> (mai
From: Vincent Palatin
Use the ability to have several active EHCI controller on a system
in the PCI EHCI controller implementation.
Signed-off-by: Simon Glass
---
Changes in v4:
- Add errno.h header file to ehci-pci
Changes in v3: None
Changes in v2:
- Add blank line before function return
d
Hi Marek,
On Mon, Mar 11, 2013 at 9:16 AM, Simon Glass wrote:
> Hi Marek,
>
> As requested here is an email about the USB patches. I have put them in a
> bundle here:
>
> http://patchwork.ozlabs.org/bundle/sjg/for-marex/
>
>
But unfortunately I found a problem in patch 4. Here is an updated vers
This file handles common post-relocation init for boards which use
the generic framework.
Signed-off-by: Simon Glass
---
Changes in v11:
- Correct Flash output message to remove double printing
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
C
This adds ppc features to the generic pre-relocation board init.
This is a separate commit so that these features are clearly shown.
Signed-off-by: Simon Glass
---
Changes in v11:
- Add possible fix for PPC stack alignment problem
Changes in v10: None
Changes in v9: None
Changes in v8: None
Cha
On Thu, 7 Mar 2013 19:11:16 -0800
Simon Glass wrote:
> Hi Kim,
>
> On Thu, Mar 7, 2013 at 6:18 PM, Kim Phillips
> wrote:
> > On Thu, 7 Mar 2013 17:05:15 -0800
> > Simon Glass wrote:
> >
> >> On Thu, Mar 7, 2013 at 4:25 PM, Kim Phillips
> >> wrote:
> >> > On Wed, 6 Mar 2013 18:08:21 -0800
>
Hi Kim,
On Mon, Mar 11, 2013 at 5:44 PM, Kim Phillips wrote:
> On Thu, 7 Mar 2013 19:11:16 -0800
> Simon Glass wrote:
>
> > Hi Kim,
> >
> > On Thu, Mar 7, 2013 at 6:18 PM, Kim Phillips
> wrote:
> > > On Thu, 7 Mar 2013 17:05:15 -0800
> > > Simon Glass wrote:
> > >
> > >> On Thu, Mar 7, 2013 at
On 18/02/13 21:51, Rajeshwari Shinde wrote:
> Print out the board model by parsing the device tree file.
>
> Signed-off-by: Rajeshwari Shinde
> ---
> board/samsung/smdk5250/smdk5250.c | 11 ++-
> 1 files changed, 10 insertions(+), 1 deletions(-)
>
> diff --git a/board/samsung/smdk5250
On 19/02/13 15:32, Rajeshwari Shinde wrote:
> From: Simon Glass
>
> The mem_manuf is not in the correct order according to the string table.
> This causes cros_bundle_firmware to get the BL2 settings in the wrong
> order. This patch fixes the same.
>
> Signed-off-by: Simon Glass
> Signed-off-by
Dear Donghwa,
On 22/02/13 18:52, Ajay Kumar wrote:
> Ajay Kumar (13):
> [PATCH 01/13] video: exynos_fb: Remove callbacks from the driver
> [PATCH 02/13] video: exynos_dp: Remove callbacks from the driver
> [PATCH 03/13] video: exynos_fb: Make fimd_ctrl global
> [PATCH 04/13] EXYNOS: FDT: A
Hi, Jagan:
Got it!
Thank you!
I have downloaded a MT29F16G08A data sheet.
Best wishes,
-邮件原件-
发件人: Jagan Teki [mailto:jagannadh.t...@gmail.com]
发送时间: 2013年3月11日 19:56
收件人: Tiger Liu
抄送: u-boot@lists.denx.de
主题: Re: [U-Boot] Nand flash (supports ONFI)
Hi,
On Mon, Mar 11, 2013 at 5:06 PM
Hi Stephen,
On Tue, Mar 12, 2013 at 1:28 AM, Stephen Warren wrote:
> On 03/11/2013 03:56 AM, sonic@gmail.com wrote:
>> From: Sonic Zhang
>>
>> - Should return 0 for both DOS_MBR and DOS_PBR block types in
>> test_part_dos().
>
> What problem does this solve?
>
> I don't believe this change
On Tuesday 12 March 2013 12:05 AM, Tom Rini wrote:
On Tue, Feb 12, 2013 at 09:29:08PM -, Lokesh Vutla wrote:
Adding new board files for DRA7XX socs.
The pad registers layout is changed completely from OMAP5
So introducing the new structure here and also adding the
minimal data.
Signed-off-
On Tuesday 12 March 2013 12:05 AM, Tom Rini wrote:
> On Tue, Feb 12, 2013 at 09:29:08PM -, Lokesh Vutla wrote:
>
>> Adding new board files for DRA7XX socs.
>> The pad registers layout is changed completely from OMAP5
>> So introducing the new structure here and also adding the
>> minimal data.
On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal
multi-bit ECC errors, which has impact on performance, so software should
disable all ECC reporting from USB1 and USB2.
In formal release document, the errata number should be USB14 instead of USB138.
Signed-off-by: xulei
Si
Hi Heiko,
Do let me know if you have any comments on this patch.
Would you consider it for I2C branch or should it go through u-boot-samsung?
Regards,
Rajeshwari
On Wed, Mar 6, 2013 at 2:57 PM, Hung-ying Tyan wrote:
> On Tue, Feb 19, 2013 at 8:19 PM, Rajeshwari Shinde > wrote:
>
>> This patch
Hi Albert,
On Tuesday 05 March 2013 11:34 AM, Sricharan R wrote:
> Currently for ARM based cpu's, mmu pagetable attributes are
> set with manager permissions for all 4GB address space.
> Because of this the 'execute never (XN)' permission is
> never checked on read sensitive regions which results
Hi Minkyu,
Yes it is based on the following patches submitted by Simon Glass and
link for the same.
"sf: Add spi_flash_alloc() to create a new SPI flash struct"
http://patchwork.ozlabs.org/patch/208228/
"sf: Use spi_flash_alloc() in each SPI flash driver":
http://patchwork.ozlabs.org/patch/2265
This patch series add sama5d3xek board support.
Included features
- boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
- boot from SPI flash support
- boot from SD card support
- LCD support
- EMAC support
- USB support
Will do
- Add GMAC support
- Add of control sup
Add OHCI support for sama5d3x devices
Signed-off-by: Bo Shen
---
change in v2:
- change #if defined to #ifdef for sama5d3
---
drivers/usb/host/ohci-at91.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-
Add macb support for sama5d3x devices
Signed-off-by: Bo Shen
---
change in v2:
No change
---
drivers/net/macb.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 8bacbda..9e7fbc6 100644
--- a/drivers/net/macb.c
+++ b/driv
Add WDRBT bit support for sama5d3x devices
Signed-off-by: Bo Shen
---
Change in v2:
no change
---
drivers/spi/atmel_spi.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index ce7d460..5e97225 100644
--- a/drivers/spi/a
Add sama5d3xek support with following feature
- boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
- boot from SPI flash support
- boot from SD card support
- LCD support
- EMAC support
- USB support (OHCI)
Signed-off-by: Bo Shen
---
Change in v2:
- Remove unneeded #un
Hi Simon,
I am not planning to resend the series untill a re-base is required.
Thanks & Regards
Amarendra reddy
On 11 March 2013 22:04, Simon Glass wrote:
> Hi Amar,
>
> On Tue, Mar 5, 2013 at 5:11 AM, Amar wrote:
>
> > Add required compatible information for DWMMC driver.
> >
> > Signed-off-
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