Hi Joel,
On Fri, Aug 12, 2011 at 4:19 PM, Joel A Fernandes wrote:
> [Adding Simon to CC]
>
> Hi Simon,
>
> Sorry for the delayed response to your email. I was just trying to
> prepare a proper response to your email with collating information
> about similar fixes to the EHCI timeout but never go
On 08/12/11 09:49, Stefano Babic wrote:
> On 08/12/2011 01:41 AM, Eric Jarrige wrote:
>
> Hi Eric,
>
+int board_init(void) +{ + gd->bd->bi_arch_number =
CONFIG_MACH_TYPE;
>>> Is there no MACH_TYPE for this board ? It is uncommon for an ARM
>>> board. Should this board run Linux ?
>> The
Hi Andy,
On 08/17/2011 04:30 AM, Andy Fleming wrote:
>
> Ok, I feel dumb. I apparently applied this already. But I'm still
> interested in a response to my comments/questions. :)
OK, I'll humor you :)
>
> On Tue, Aug 16, 2011 at 9:15 PM, Andy Fleming wrote:
>> On Mon, Jul 18, 2011 at 9:40 AM,
On 08/16/2011 06:56 PM, Scott Wood wrote:
>>> How about a patch that was sent, that at the time didn't depend on
>>> another series, but after review and changes, now depends on those
>>> changes?
>> Then you have to note it in the version history that it now depends on
>> another patch - don't fo
> -Original Message-
> From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
> Sent: Tuesday, August 16, 2011 11:31 AM
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Ajay Bhargav
> Subject: [PATCH v6 1/2] gpio: Add GPIO driver framework for Marvell SoCs
>
> This patch adds generic
This commit adds support for reading the D cache line size for armv7
architecture.
The get_dcache_line_size() function is supposed to work in conjunction
with memalign call to provide D cache aligned DMA buffers.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
CC: Aneesh V
CC: Albe
- "Prafulla Wadaskar" wrote:
> Hi Ajay
> I am sorry if I missed this in my earlier reviews.
>
> Why you wish to keep mvgpio.h in /include folder?
> I think it should be in drivers/gpio/.
>
> Regards..
> Prafulla . .
>
Hi Prafulla,
gpio.h includes this file, as GPIO_LEVEL_SET/CLR are def
This commit replaces the ext_csd buffer allocated as an automatic
variable with one cache aligned. The ext_csd might be allocated with
alignment not equal to the L1 D cache alignment.
The memalign from common/dlmalloc.c is allowing for buffer allocation
with proper cache alignment.
The common/dlm
Hi Albert,
Sorry for the poor responsiveness - I was out of office for about 2 weeks.
On 08/12/11 12:20, Albert ARIBAUD wrote:
> Hi Igor,
>
> On 28/07/2011 11:04, Igor Grinberg wrote:
>> gd->bd pointer has been used prior been initialized.
>> Move the relevant code after the initialization.
>>
>
gd->bd pointer has been used prior been initialized.
Move the relevant code after the initialization.
Signed-off-by: Igor Grinberg
---
v2: move it closer to the bd pointer set up as for Albert's suggestion.
arch/arm/lib/board.c |9 +
1 files changed, 5 insertions(+), 4 deletions
Am 10.08.2011 12:47, schrieb Stefan Herbrechtsmeier:
> Am 09.08.2011 21:46, schrieb Marek Vasut:
>> On Tuesday, August 09, 2011 03:14:38 PM Stefan Herbrechtsmeier wrote:
>>> Hi,
>>>
>>> after porting my board support from u-boot 2009.11 to 2011.06
>>> together with adding the relocation support
>>>
On 08/16/2011 08:12 AM, John Rigby wrote:
> Stefano,
>
Hi John,
> Since:
>
> commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47
> Author: Stefano Babic
> Date: Thu Jul 7 03:37:06 2011 +
>
> MX5: Update to autogenerated asm-offsets.h
>
> On i.MX5, the asm-offsets.h file is not yet
On Wednesday, August 17, 2011 12:01:02 PM Stefan Herbrechtsmeier wrote:
> Am 10.08.2011 12:47, schrieb Stefan Herbrechtsmeier:
> > Am 09.08.2011 21:46, schrieb Marek Vasut:
> >> On Tuesday, August 09, 2011 03:14:38 PM Stefan Herbrechtsmeier wrote:
> >>> Hi,
> >>>
> >>> after porting my board suppo
commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47 breaks
building on a different directory with the O= parameter.
The patch wil fix this issue, generating always asm-offsets.h before
the other targets.
Signed-off-by: Stefano Babic
---
Note: the patch fixes the issue, however I generate an empty as
Your Email I.D have just Won a Sum payout of £1,350,000.00 GBP. You are to
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> -Original Message-
> From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
> Sent: Wednesday, August 17, 2011 2:18 PM
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH v6 1/2] gpio: Add GPIO driver framework for Marvell
> SoCs
>
>
> - "Prafulla Wadaskar"
- "Prafulla Wadaskar" wrote:
> > -Original Message-
> > From: Ajay Bhargav [mailto:ajay.bhar...@einfochips.com]
> > Sent: Wednesday, August 17, 2011 2:18 PM
> > To: Prafulla Wadaskar
> > Cc: u-boot@lists.denx.de
> > Subject: Re: [PATCH v6 1/2] gpio: Add GPIO driver framework for
> Ma
Hi,
Does someone knows what is the smallest step to increase the mem
parameter in the bootargs?
I am dealing with an embedded system based on an ARM LPC3250 and running
linux. I have a very critical memory constraint and I would like to
have mem=3584k instead mem=3M or mem=4M.
The Linux boot up
Hi,
I am working As R&D engineer. Presently i am compiling u-boot.2011.03
and i am facing bit problem.following is the problem while compiling u-boot.
i am using cross compile tool chain.
make -C arch/arm/cpu/arm926ejs/at91/
make[1]: Entering directory
`/data1/UBOOT/u-boot-2011.03/arch/arm/c
Hi,
I am working As R&D engineer. Presently i am compiling u-boot.2011.03
and i am facing bit problem.following is the problem while compiling u-boot.
i am using cross compile tool chain. I am trying to compile for
AT91SAM9260/61 controller.
make -C arch/arm/cpu/arm926ejs/at91/
make[1]: Ent
Hi Detlev,
Thanks for your valuable and detailed comments, they make sense. I will make
appropriate changes and reduce the env size.
Best Regards,
-Nag
On Wed, Aug 10, 2011 at 16:20:51, Detlev Zundel wrote:
> Hi Nag,
>
> [...]
>
> >> > +#define CONFIG_SYS_FLASH_SECT_SZ(128 << 10) /*
Detlev,
Thanks for detailed explanation. I will make appropriate patches
And send them separately(not as part of ongoing series). Even though
I love to make patches for mx35 and mx5 base, I am afraid I may not
Able to find time. But, I will do my best.
Thanks again for comments!
Nag
On Wed, Aug
Dear Stefano
Am 17.08.2011 12:12, schrieb Stefano Babic:
> commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47 breaks
> building on a different directory with the O= parameter.
> The patch wil fix this issue, generating always asm-offsets.h before
> the other targets.
>
> Signed-off-by: Stefano Babic
On 08/17/2011 03:02 PM, Matthias Weißer wrote:
> Dear Stefano
>
> Am 17.08.2011 12:12, schrieb Stefano Babic:
>> commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47 breaks
>> building on a different directory with the O= parameter.
>> The patch wil fix this issue, generating always asm-offsets.h befor
I have been thinking about the problem of the pesky init_sequence arrays
and the inevitable #ifdefs and empty stub functions that result so I
thought I'de have a crack at a more dynamic implementation. And like all
good programmers, I stole the solution ;). This implementation is based
on Linux's _
Dear Rajeev Rao Battu:
> Hi,
> I am working As R&D engineer. Presently i am compiling u-boot.2011.03
> and i am facing bit problem.following is the problem while compiling u-boot.
> i am using cross compile tool chain. I am trying to compile for
> AT91SAM9260/61 controller.
>
The AT91SAM9260
If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory
mapped access will be used to read/write the uart registers.
This is especially useful for SoC devices that implement 16550
compatible uarts but that have peripheral access width constraints.
Signed-off-by: Dave Aldridge
---
drivers/seri
From: Nagabhushana Netagunte
TX and RX channel numbers programmed as '1' during EMAC
teardown initialization is wrong. This patch fixes the
same by setting channel number to '0' which is used by U-boot.
Signed-off-by: Sugumar Natarajan
Signed-off-by: Nagabhushana Netagunte
---
drivers/net/dav
From: Nagabhushana Netagunte
AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
NOR to work on Rev.3 EVM. When GP0[11] is low,
the SD0 interface will not work, but NOR flash will.
Signed-off-by: Rajashekhara, Sudhakar
Signed-off-by: Nagabhushana Netagunte
---
arch/arm/include/asm/arch-da
From: Nagabhushana Netagunte
Fix from last version (addressed comments from Detlev)
1: fixed env size for NOR boot mode.
Manjunathappa, Prakash (1):
da850: add support for Spectrum Digital AM18xx EVM
Nagabhushana Netagunte (6):
da850: indicate cache usage disable in config file
da850: add
From: Manjunathappa, Prakash
The AM18xx EVM contains winbond SPI flash instead of ST SPI flash in
comparison with logic PD da850/omap-l138 EVM. So enable configuration
to look for winbond flash.
Signed-off-by: Manjunathappa, Prakash
Signed-off-by: Nagabhushana Netagunte
---
include/configs/da
From: Nagabhushana Netagunte
Add pin-mux support for NOR in board file and correspanding
macros to use NOR boot mode in configuration file.
Signed-off-by: Sudhakar Rajashekhara
Signed-off-by: Nagabhushana Netagunte
---
board/davinci/da8xxevm/da850evm.c | 51 +
From: Sudhakar Rajashekhara
Modify clk_get() function in cpu file to work for
multiple PLL controllers.
Signed-off-by: Sudhakar Rajashekhara
Signed-off-by: Nagabhushana Netagunte
---
arch/arm/cpu/arm926ejs/davinci/cpu.c | 30 -
arch/arm/include/asm/arch-davin
From: Nagabhushana Netagunte
there are cache coherency issues when using the DAVINCI Ethernet driver,
hence caches cant be used for da850 u-boot. As per new cache management
framework,if the caches are not used in u-boot, it needs to be explicitly
indicated through macros in config file. CACHE di
From: Nagabhushana Netagunte
Modify U-Boot prompt string from "DA850-evm >" to "U-Boot >".
Signed-off-by: Sudhakar Rajashekhara
Signed-off-by: Nagabhushana Netagunte
---
include/configs/da850evm.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/da850e
From: Nagabhushana Netagunte
add support for DSP wake-up by default on DA850/OMAP-L138
during board initialization. Enable hwconfig environment and added
extra env setting through CONFIG_EXTRA_ENV_SETTINGS.
To prevent DSP from being woken up,set the environment variable as,
set hwconfig "dsp:wake
From: Nagabhushana Netagunte
there are cache coherency issues when using the DAVINCI Ethernet driver,
hence caches cant be used for d365 u-boot. As per new cache management
framework,if the caches are not used in u-boot, it needs to be explicitly
indicated through macros in config file. CACHE dis
From: Rajashekhara, Sudhakar
Newer version for DM365 silicon support higher speeds
and is called DM368. Modify the bootprompt string DM365
to DM36x.
Signed-off-by: Rajashekhara, Sudhakar
Signed-off-by: Nagabhushana Netagunte
---
include/configs/davinci_dm365evm.h |2 +-
1 files changed, 1
On 08/17/2011 02:47 PM, Netagunte, Nagabhushana wrote:
>> Maybe we should use this opportunity to align them? So what example should
>> we follow? Hm, oldest code wins, so here we go:
Never heard about this rule, but I agree it makes no sense to have
differen commands.
>> [dzu@pollux u-boot-tes
Hi Stefano,
> On 08/17/2011 02:47 PM, Netagunte, Nagabhushana wrote:
>>> Maybe we should use this opportunity to align them? So what
>>> example should we follow? Hm, oldest code wins, so here we go:
>
> Never heard about this rule, but I agree it makes no sense to have
> differen commands.
You
There was already a command to show the priocessor clocks
for PowerPC (clocks). For i.MX, the "clockinfo" command
was introduce. The patch sets the same command name used on
PowerPC.
A nasty and not needed newline is also dropped in the help for
the command.
Signed-off-by: Stefano Babic
---
arch
Hi Igor,
Le 17/08/2011 11:48, Igor Grinberg a écrit :
> gd->bd pointer has been used prior been initialized.
> Move the relevant code after the initialization.
>
> Signed-off-by: Igor Grinberg
> ---
> v2: move it closer to the bd pointer set up as for Albert's suggestion.
>
> arch/arm/lib/boar
Hi Lukasz,
Le 17/08/2011 10:51, Lukasz Majewski a écrit :
> This commit adds support for reading the D cache line size for armv7
> architecture.
>
> The get_dcache_line_size() function is supposed to work in conjunction
> with memalign call to provide D cache aligned DMA buffers.
>
> Signed-off-by
l am a Staff of Hang Seng Bank HongKong, I do not know if we can work
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___
U-Boot mail
Hi Higor, Hi Stefano,
On 17 août 2011, at 09:31, Igor Grinberg wrote:
>
> On 08/12/11 09:49, Stefano Babic wrote:
>> On 08/12/2011 01:41 AM, Eric Jarrige wrote:
>>
>> Hi Eric,
>>
> +int board_init(void) +{ +gd->bd->bi_arch_number =
> CONFIG_MACH_TYPE;
Is there no MACH_TYPE
Hi Simon,
Thanks a lot for reviewing the issue.
>>> With respect to using a bulk USB stick (some of which take 3s or more
>>> to respond to a submit) this doesn't make any difference for me. It
>>> seems to take a long time to respond the first time, so the 5s timeout
>>> seems prudent.
>>>
>>> S
Hi Chunhe Lan,
On 08/17/2011 02:24 AM, Chunhe Lan wrote:
[snip]
> +
> +static inline void do_fixup_by_path_string(void *fdt, const char *path,
> +const char *prop, const char *status)
> +{
> + do_fixup_by_path(fdt, path, prop, status, strlen(status) +
From: Syed Mohammed Khasim
* Supports dynamic panel configuration
* Supports dynamic tv standard selection
* Adds support for DSS register access through generic APIs
* Incorporated DSS register access using structures.
* DSS makefile update
Previous discussions are here:
http://www.mail-archive
On Fri, Aug 12, 2011 at 2:47 PM, Jason Kridner wrote:
> On Fri, Jun 10, 2011 at 6:21 PM, Eric Bénard wrote:
>> which is used to provide 120MHz to USB EHCI
>> This allows EHCI to work on BeagleBoard XM
>>
>> Signed-off-by: Eric Bénard
>
> Acked-by: Jason Kridner
>
> We've tested this at TI. Tha
This patch adds support for generic GPIO driver framework for Marvell
SoC Armada100.
Signed-off-by: Ajay Bhargav
---
Changes for v2:
- Added function get_gpio_base
- GPIO base address added to armada100.h
Changes for v3:
- gpio register map moved to mvgpio.h
Changes for v4
This patch adds generic GPIO driver framework support for Marvell SoCs.
To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands
define CONFIG_CMD_GPIO in your board configuration file.
Signed-off-by: Ajay Bhargav
---
Changes for v2:
- mvgpio.h removed
- function ge
Hi,
I would like to know if U boot supports the Intel 2nd generation core i7
processors.
Regards,
Flash
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Hi Flash,
On Thu, Aug 18, 2011 at 3:38 PM, Flash K wrote:
> Hi,
>
> I would like to know if U boot supports the Intel 2nd generation core i7
> processors.
No it doesn't (at least not yet)
Be aware that U-Boot is a boot-loader for embedded devices (phones,
routers, set-top boxes, TV's etc) and
Thanks Graeme,
Okay, so that means that U boot is a combination of Primary and Secondary
bootloaders, ie loading the MBR and then loading the Kernel image.
So is U Boot along the lines of Syslinux, Lilo, GRUB etc. I mean does it work
in conjunction with a BIOS? I thought that U Boot was a com
On 08/18/11 00:58, Eric Jarrige wrote:
> Hi Higor, Hi Stefano,
>
> On 17 août 2011, at 09:31, Igor Grinberg wrote:
>
>> On 08/12/11 09:49, Stefano Babic wrote:
>>> On 08/12/2011 01:41 AM, Eric Jarrige wrote:
>>>
>>> Hi Eric,
>>>
>> +int board_init(void) +{ + gd->bd->bi_arch_number =
>
Hi Flash
On Thu, Aug 18, 2011 at 4:10 PM, Flash K wrote:
> Thanks Graeme,
> Okay, so that means that U boot is a combination of Primary and Secondary
> bootloaders, ie loading the MBR and then loading the Kernel image.
U-Boot (like coreboot) sits at the lowest level - It starts executing
from th
On Thu, 18 Aug 2011 08:29:51 +0800, Jerry Van Baren
wrote:
> Hi Chunhe Lan,
>
> On 08/17/2011 02:24 AM, Chunhe Lan wrote:
>
> [snip]
>
>> +
>> +static inline void do_fixup_by_path_string(void *fdt, const char *path,
>> + const char *prop, const char *status
This commit adds support for reading the D cache line size for armv7
architecture.
The get_dcache_line_size() function is supposed to work in conjunction
with memalign call to provide D cache aligned DMA buffers.
Signed-off-by: Lukasz Majewski
Signed-off-by: Kyungmin Park
CC: Aneesh V
CC: Albe
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