Hi,
I tried to boot with ext2 file system and get this result:
=> usb start
(Re)start USB...
USB: scanning bus for devices... cannot reset port 1!?
2 USB Device(s) found
scanning bus for storage devices... 1 Storage Device(s) found
=>ext2load usb 0:1 0x0020 uImage
…….
1045127 bytes
Hi all,
Here are the updated patches.
v2:
- Addressed Andy Fleming's comments. Now we don't need the exported
tsec_info struct.
Thanks,
--
Anton Vorontsov
email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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MPC837xE specs says that SerDes1 has:
— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
And for SerDes2:
— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
The sp
The rfcks should be shifted by 28 bits left. We didn't notice the bug
because we were using only 100MHz clocks (for which rfcks == 0).
Though, for SGMII we'll need 125MHz clocks.
Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
cpu/mpc83xx/serdes.c |2 +-
include/asm-ppc/fsl_se
We'll use these masks to parse TSEC modes out of HRCWH.
Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
include/mpc83xx.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 5d82bb4..ee38191 100644
--- a/include/mpc83xx.h
++
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.
For Linux we also fix up the device tree.
Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
---
board/freescale/mpc837xemds/mpc837xemds.c | 123 +
include/configs/MPC837XEM
All implementations of the functions i2c_reg_read() and i2c_reg_write() are
identical. We can save space and simplify the code by converting these
functions into inlines and putting them in i2c.h.
Signed-off-by: Timur Tabi <[EMAIL PROTECTED]>
---
I'm posting this patch because I'm enhancing the
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:
- When the CPLD recognizes its location on the PIB it automatically
configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatic
Hi Remy,
Sorry it took so long but here are the results of the tests on my
AT91SAM9261-EK.
Le samedi 20 septembre 2008 à 22:14 +0200, Stelian Pop a écrit :
> > Also, it would be very helpful if you would test your sticks on a
> > SAM9261, because that SoC _must_ work. (I tested on AT91SAM9261-EK
On Wed, Oct 01, 2008 at 06:04:02PM -0700, Roman Mashak wrote:
> As far as I understand not all manufacturers adhere to CFI standards,
> so this is flash chip's problem rather then board itself.
> CFI is for both NAND and NOR flash devices (even though CFI stands for
> Common _Flash memory_ Interfac
Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 23:07 Wed 01 Oct , Ben Warren wrote:
>
>> Hi Nobuhiro-san,
>>
>> Nobuhiro Iwamatsu wrote:
>>
>>> get_prom function was used __attriute__ , but it is not enable.
>>> ax88796.o does not do link besides ne2000.o. When ld is carried
>>> out, get_
On 23:07 Wed 01 Oct , Ben Warren wrote:
> Hi Nobuhiro-san,
>
> Nobuhiro Iwamatsu wrote:
> > get_prom function was used __attriute__ , but it is not enable.
> > ax88796.o does not do link besides ne2000.o. When ld is carried
> > out, get_prom function of ax88796.c is ignored.
> > This problem i
Hello Stelian,
>> Hmm, I can do that, but not before September 29.
> The stick is fine, it does work ok on the 9261:
Thanks for testing it, it sounds good... But that does mean that there
is a SoC dependant issue here...
I looked at the code again, and found an oddity that I overlooked
before and
commit 599e6d1ff1fbab0abda4ef685f6078c4d2f1d2eb
Author: Nikita V. Youshchenko <[EMAIL PROTECTED]>
Date: Tue Sep 2 07:51:05 2008 +0400
ads5121: support for running from memory
This patch makes it possible to start u-boot from memory on ads5121
board.
It does two simple thin
commit 81489a85c4c3536ec54290ac9216b746ec346663
Author: Nikita V. Youshchenko <[EMAIL PROTECTED]>
Date: Thu Sep 25 00:44:00 2008 +0400
fsl_diu: fix alignment error that caused malloc corruption
When aligning malloc()ed screen_base, invalid offset was added.
This not only caused
Martin Mroz wrote:
> Hello,
> I wanted to write in to ask if there was something I was doing wrong, with
> respect to running standalone applications on U-Boot on an ATNGW100 (AVR32).
> I uploaded one of the test programs (hello_world) to the SDRAM (0x1000)
> and verified the contents of memory
The Arches Evaluation board is based on the AMCC 460GT SoC chip. This board is
a dual processor board with each processor providing independent resources for
Rapid IO, Gigabit Ethernet, and serial communications. Each 460GT has it's own
512MB DDR2 memory, 32MB NOR FLASH, UART, EEPROM and tempe
This patch add the capability to configure a PPC440 based IBM SDRAM Controller
with static, compiled-in, values. PPC440 memory subsystem includes a Memory
Queue core.
Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
---
v2:
- No changes.
v3
Provide a weak defined routine to retrieve the CPU number for reference boards
that have multiple CPU's. Default behavior is the existing single CPU print
output. Reference boards with multiple CPU's need to provide a board specific
routine. See board/amcc/arches/arches.c for an example.
Sig
Kumar has already added alias expansion to fdt_path_offset().
However, in some circumstances it may be convenient for the user of
libfdt to explicitly get the string expansion of an alias. This patch
adds a function to do this, fdt_get_alias(), and uses it to implement
fdt_path_offset().
Signed-o
After changing SDRAM_CLKTR phase value rerun the memory preload initialization
sequence (INITPLR) to reset and relock the memory DLL. Changing the
SDRAM_CLKTR memory clock phase coarse timing adjustment effects the phase
relationship of the internal, to the PPC chip, and external, to the PPC ch
Hi,
Do i have a problem with "Verifying Checksum ... Bad Data CRC”?
Best regard.
--
View this message in context:
http://www.nabble.com/-UBoot--Hows-to-boot-Linux-Kernel-from-USB-tp19740267p19790840.html
Sent from the Uboot - Users mailing list archive at Nabble.com.
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Hi, all
2008/10/3 Ben Warren <[EMAIL PROTECTED]>:
> Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 23:07 Wed 01 Oct , Ben Warren wrote:
>>
>>> Hi Nobuhiro-san,
>>>
>>> Nobuhiro Iwamatsu wrote:
>>>
get_prom function was used __attriute__ , but it is not enable.
ax88796.o does not do li
Hi,
thaoth wrote:
> Hi,
>
>Do i have a problem with "Verifying Checksum ... Bad Data CRC”?
>
> Best regard.
>
>
Have you try to load your image using tftpboot and put it in memory?
Are you sure that you don't have any problem with memory initialization?
Regards
Michael
_
Hi Michael,
>Have you try to load your image using tftpboot and put it in memory?
My board don't have Eth port, so we can't try tftpboot
>Are you sure that you don't have any problem with memory initialization?
i think i don't have any problem with memory initialization, because i can
see my ima
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