Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-28 Thread Stefano Babic
On 28/03/2012 15:31, Fabio Estevam wrote: > On 3/28/12, Stefano Babic wrote: >> On 22/03/2012 23:00, Troy Kisky wrote: >>> Currently, board files are setting this field to 0x01 >>> which the manual says is a reserved value. Change to >>> use the default of 0x04 - 128 cycles. >>> >>> Signed-off-by:

Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-28 Thread Fabio Estevam
On 3/28/12, Stefano Babic wrote: > On 22/03/2012 23:00, Troy Kisky wrote: >> Currently, board files are setting this field to 0x01 >> which the manual says is a reserved value. Change to >> use the default of 0x04 - 128 cycles. >> >> Signed-off-by: Troy Kisky >> --- > > Thanks everybody to fix /

Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-28 Thread Stefano Babic
On 22/03/2012 23:00, Troy Kisky wrote: > Currently, board files are setting this field to 0x01 > which the manual says is a reserved value. Change to > use the default of 0x04 - 128 cycles. > > Signed-off-by: Troy Kisky > --- Thanks everybody to fix / explain this issue. Applied to u-boot-imx(f

Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-28 Thread Fabio Estevam
On 3/22/12, Troy Kisky wrote: > Currently, board files are setting this field to 0x01 > which the manual says is a reserved value. Change to > use the default of 0x04 - 128 cycles. > > Signed-off-by: Troy Kisky Confirmed with the design team that your patch is correct. Thanks for catching this.

Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-23 Thread Fabio Estevam
Hi Stefano, On Fri, Mar 23, 2012 at 6:34 AM, Stefano Babic wrote: > Is there someone who can answer to this question ? This patch fixes the > value according to the manual, without doubts. But if the manual is wrong... We are checking this internally at Freescale and will keep the list updated.

Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-23 Thread Stefano Babic
On 23/03/2012 04:25, Troy Kisky wrote: > On 3/22/2012 6:47 PM, Troy Kisky wrote: >> On 3/22/2012 3:00 PM, Troy Kisky wrote: >>> Currently, board files are setting this field to 0x01 >>> which the manual says is a reserved value. Change to >>> use the default of 0x04 - 128 cycles. >> Typo, should sa

Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-22 Thread Troy Kisky
On 3/22/2012 6:47 PM, Troy Kisky wrote: On 3/22/2012 3:00 PM, Troy Kisky wrote: Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles. Typo, should say default of 0x02 - 128 cycles Possibly the manual is

Re: [U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-03-22 Thread Troy Kisky
On 3/22/2012 3:00 PM, Troy Kisky wrote: Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles. Typo, should say default of 0x02 - 128 cycles Signed-off-by: Troy Kisky --- board/freescale/mx53ard/imxima