3 PM
> To: u-boot@lists.denx.de
> Subject: Re: [U-Boot] P2020 L2 cache as SRAM
>
>
> Hi Scott,
>
> I need your help with an issue ,i think, related to this topic.
>
> I have P2020RDB development kit and try to boot it from nand flash using
> u-boot codes.
>
gt;>
>> I know you're busy with patches and releasing, I just wanted
>> to ask again if anybody has already done this.
>
> Yes, it's been done. P1_P2_RDB does this when configured for NAND boot.
>
> Look for CONFIG_SYS_INIT_L2_ADDR.
>
> -Scott
>
> __
>> >We're trying to configure the PPC P2020 cpu to use the L2 cache
>> >as SRAM so we can load the U-Boot code in there. However we
>> >stumble into problems. Sometimes the cpu goes on trap when
>> >trying to access this area. Sometimes there's no trap but we
>> >seem to access a different area. T
On Wed, 19 Jan 2011 08:50:52 +0100
Fabian Cenedese wrote:
> At 09:07 17.01.2011 +0100, Fabian Cenedese wrote:
> >Hi
> >
> >We're trying to configure the PPC P2020 cpu to use the L2 cache
> >as SRAM so we can load the U-Boot code in there. However we
> >stumble into problems. Sometimes the cpu goe
At 09:07 17.01.2011 +0100, Fabian Cenedese wrote:
>Hi
>
>We're trying to configure the PPC P2020 cpu to use the L2 cache
>as SRAM so we can load the U-Boot code in there. However we
>stumble into problems. Sometimes the cpu goes on trap when
>trying to access this area. Sometimes there's no trap bu
Hi
We're trying to configure the PPC P2020 cpu to use the L2 cache
as SRAM so we can load the U-Boot code in there. However we
stumble into problems. Sometimes the cpu goes on trap when
trying to access this area. Sometimes there's no trap but we
seem to access a different area. That's probably a
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