At 09:07 17.01.2011 +0100, Fabian Cenedese wrote: >Hi > >We're trying to configure the PPC P2020 cpu to use the L2 cache >as SRAM so we can load the U-Boot code in there. However we >stumble into problems. Sometimes the cpu goes on trap when >trying to access this area. Sometimes there's no trap but we >seem to access a different area. That's probably a problem with >setting up a TLB/LAW. > >Has anybody already done this and could share some code with >us? > >I've seen that there's a mpc85xx branch with quite some work >going on. Where should we base our work on? Should we use >the master or is it better to use this branch? I'm used to svn, >not git, so there may be other options I don't know about yet.
I know you're busy with patches and releasing, I just wanted to ask again if anybody has already done this. Thanks bye Fabi _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
