subject:"\[U\-Boot\] \[PATCH v5 12\/14\] arm\: add Faraday specific boot command"

Re: [U-Boot] [PATCH v5 12/14] arm: add Faraday specific boot command

2013-06-23 Thread Kuo-Jung Su

2013/6/23 Albert ARIBAUD : > Hi Kuo-Jung, > > On Mon, 17 Jun 2013 20:07:02 +0800, Kuo-Jung Su > wrote: > >> From: Kuo-Jung Su >> >> At the time of writting, none of Faraday NAND & SPI controllers >> supports XIP (eXecute In Place). So the Faraday A360/A369 SoC has >> to implement a 1st level boot

Re: [U-Boot] [PATCH v5 12/14] arm: add Faraday specific boot command

2013-06-23 Thread Albert ARIBAUD

Hi Kuo-Jung, On Mon, 17 Jun 2013 20:07:02 +0800, Kuo-Jung Su wrote: > From: Kuo-Jung Su > > At the time of writting, none of Faraday NAND & SPI controllers > supports XIP (eXecute In Place). So the Faraday A360/A369 SoC has > to implement a 1st level bootstrap code stored in the embedded ROM >

[U-Boot] [PATCH v5 12/14] arm: add Faraday specific boot command

2013-06-17 Thread Kuo-Jung Su

From: Kuo-Jung Su At the time of writting, none of Faraday NAND & SPI controllers supports XIP (eXecute In Place). So the Faraday A360/A369 SoC has to implement a 1st level bootstrap code stored in the embedded ROM inside the SoC. After power-on, the ROM code (1st level bootstrap code) would loa