Re: [U-Boot] [PATCH v2 06/18] net: macb: Flush correct cache portion when sending

2016-05-30 Thread Andreas Bießmann
On 05.05.16 15:28, Simon Glass wrote: > The end address of the cache flush must be cache-line-aligned since > otherwise (at least on ARM926-EJS) the request is ignored. When the cache > is enabled this means that packets are not sent. > > Signed-off-by: Simon Glass > Reviewed-by: Heiko Schocher

[U-Boot] [PATCH v2 06/18] net: macb: Flush correct cache portion when sending

2016-05-05 Thread Simon Glass
The end address of the cache flush must be cache-line-aligned since otherwise (at least on ARM926-EJS) the request is ignored. When the cache is enabled this means that packets are not sent. Signed-off-by: Simon Glass Reviewed-by: Heiko Schocher Acked-by: Joe Hershberger --- Changes in v2: Non