Re: [U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-17 Thread Michal Simek
On 16. 10. 18 17:10, Alexander Graf wrote: > > > On 16.10.18 16:57, Michal Simek wrote: >> On 16.10.2018 16:55, Alexander Graf wrote: >>> >>> >>> On 16.10.18 16:51, Michal Simek wrote: On 16.10.2018 16:23, Alexander Graf wrote: > ... >> +#define ENV_MEM_LAYOUT_SETTINGS

Re: [U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-16 Thread Alexander Graf
On 16.10.18 16:57, Michal Simek wrote: > On 16.10.2018 16:55, Alexander Graf wrote: >> >> >> On 16.10.18 16:51, Michal Simek wrote: >>> On 16.10.2018 16:23, Alexander Graf wrote: >>> >>> ... >>> > +#define ENV_MEM_LAYOUT_SETTINGS \ > + "fdt_high=1000\0" \ > + "initrd_high=100

Re: [U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-16 Thread Michal Simek
On 16.10.2018 16:55, Alexander Graf wrote: > > > On 16.10.18 16:51, Michal Simek wrote: >> On 16.10.2018 16:23, Alexander Graf wrote: >>> >> >> ... >> +#define ENV_MEM_LAYOUT_SETTINGS \ + "fdt_high=1000\0" \ + "initrd_high=1000\0" \ + "fdt_addr_r=0x4000\0" \ >>>

Re: [U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-16 Thread Alexander Graf
On 16.10.18 16:51, Michal Simek wrote: > On 16.10.2018 16:23, Alexander Graf wrote: >> > > ... > >>> +#define ENV_MEM_LAYOUT_SETTINGS \ >>> + "fdt_high=1000\0" \ >>> + "initrd_high=1000\0" \ >>> + "fdt_addr_r=0x4000\0" \ >>> + "pxefile_addr_r=0x1000\0" \ >>> + "kernel_

Re: [U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-16 Thread Michal Simek
On 16.10.2018 16:23, Alexander Graf wrote: > ... >> +#define ENV_MEM_LAYOUT_SETTINGS \ >> +"fdt_high=1000\0" \ >> +"initrd_high=1000\0" \ >> +"fdt_addr_r=0x4000\0" \ >> +"pxefile_addr_r=0x1000\0" \ >> +"kernel_addr_r=0x1800\0" \ >> +"scriptaddr=0x02000

Re: [U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-16 Thread Alexander Graf
On 03.10.18 07:57, Michal Simek wrote: > Xilinx is introducing Versal, an adaptive compute acceleration platform > (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine > Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent > Engines with leading-edge memory and i

[U-Boot] [PATCH 1/3] arm64: versal: Add support for new Xilinx Versal ACAPs

2018-10-03 Thread Michal Simek
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heter