Dear Kumar Gala,
In message <1938b866-a0c2-4152-8085-4bcc4e1a7...@kernel.crashing.org> you wrote:
>
> > PCIE1 ... pci2 ... pcie1 ???
> >
> > This looks broken to me?
>
>
> This is actually correct.. This has to do w/stupid FSL documentation
> and #. The device tree "orders" PCI buses based o
On Aug 20, 2009, at 10:14 AM, Wolfgang Denk wrote:
> Dear Poonam Aggrwal,
>
> In message <1250775054-20418-1-git-send-email-poonam.aggr...@freescale.com
> > you wrote:
>> * Added PCIe support for P1 P2 RDB
>> * Calls the fsl_pci_init_port function to initialize all the PCIe
>> ports
>> on the
Dear Poonam Aggrwal,
In message <1250775054-20418-1-git-send-email-poonam.aggr...@freescale.com> you
wrote:
> * Added PCIe support for P1 P2 RDB
> * Calls the fsl_pci_init_port function to initialize all the PCIe ports
> on the board.
>
> Signed-off-by: Poonam Aggrwal
> Signed-off-by: Kumar G
* Added PCIe support for P1 P2 RDB
* Calls the fsl_pci_init_port function to initialize all the PCIe ports
on the board.
Signed-off-by: Poonam Aggrwal
Signed-off-by: Kumar Gala
---
- applies on git.denx.de/u-boot-mpc85xx.git branch->next
board/freescale/p1_p2_rdb/Makefile |1 +
board/free
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