Re: [U-Boot] [PATCH] net: phy: micrel: fix KSZ9031 clock skew for values greater 0ps

2019-01-22 Thread Joe Hershberger
On Thu, Nov 29, 2018 at 1:05 PM Andreas Pretzsch wrote: > > For KSZ9021, all skew register fields are 4-bit wide. > For KSZ9031, the clock skew register fields are 5-bit wide. > > The common code in ksz90x1_of_config_group calculating the combined > register value checks if the requested value is

Re: [U-Boot] [PATCH] net: phy: micrel: fix KSZ9031 clock skew for values greater 0ps

2019-01-07 Thread Andreas Pretzsch
Request for inclusion of below patch. CC Joe Hershberger as listed maintainer for 'drivers/net/'. Thanks, Andreas On Thu, 2018-11-29 at 20:04 +0100, Andreas Pretzsch wrote: > For KSZ9021, all skew register fields are 4-bit wide. > For KSZ9031, the clock skew register fields are 5-bit wide. > >

[U-Boot] [PATCH] net: phy: micrel: fix KSZ9031 clock skew for values greater 0ps

2018-11-29 Thread Andreas Pretzsch
For KSZ9021, all skew register fields are 4-bit wide. For KSZ9031, the clock skew register fields are 5-bit wide. The common code in ksz90x1_of_config_group calculating the combined register value checks if the requested value is above the maximum and uses this maximum if so. The calculation of th