On Thu, Nov 29, 2018 at 1:05 PM Andreas Pretzsch <a...@cn-eng.de> wrote: > > For KSZ9021, all skew register fields are 4-bit wide. > For KSZ9031, the clock skew register fields are 5-bit wide. > > The common code in ksz90x1_of_config_group calculating the combined > register value checks if the requested value is above the maximum > and uses this maximum if so. The calculation of this maximum uses > the register width, but the check itself does not. It uses a hardcoded > value of 0xf, which is too low in case of the 5-bit clock (0x1f). > This detail was probably lost during driver unification. > > Effect (only for KSZ9031 clock skews): For values greater 900 (== 0ps), > this silently results in 1860 (== +960ps) instead of the requested one. > > Fix the check by using the bit width instead of hardcoded value(s). > > Signed-off-by: Andreas Pretzsch <a...@cn-eng.de>
Acked-by: Joe Hershberger <joe.hershber...@ni.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
