Hi Stefano,
On Thu, 14 Jul 2011 10:30:11 +0200
Stefano Babic wrote:
> On 07/14/2011 09:11 AM, David Jander wrote:
> > This is a port of the official PLL errata workaround from Freescale to
> > mainline u-boot.
> > The PLL's in the i.MX51 processor can go out of lock due to a metastable
> > cond
On 07/14/2011 12:23 PM, David Jander wrote:
>> Hi David,
>>
>> do you have now also an official Errata number from Freescale to be
>> added to your documentation ?
>
> Needless to say that this supersedes my patch sent back in May, 26th... which
> btw did not help much, since _all_ PLL's are affec
On 07/14/2011 12:13 PM, David Jander wrote:
Hi David,
> Freescale promised an official errata a week ago, but released the errata just
> yesterday (hadn't seen it until now).
> The number is ENGcm12051.
> Do you mind including it in the commit yourself, or do you want me to re-post?
Well, it is
On Thu, 14 Jul 2011 10:30:11 +0200
Stefano Babic wrote:
> On 07/14/2011 09:11 AM, David Jander wrote:
> > This is a port of the official PLL errata workaround from Freescale to
> > mainline u-boot.
> > The PLL's in the i.MX51 processor can go out of lock due to a metastable
> > condition in an an
On 07/14/2011 09:11 AM, David Jander wrote:
> This is a port of the official PLL errata workaround from Freescale to
> mainline u-boot.
> The PLL's in the i.MX51 processor can go out of lock due to a metastable
> condition in an analog flip-flop when used at high frequencies.
> This workaround impl
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode
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