On Thu, 14 Jul 2011 10:30:11 +0200 Stefano Babic <sba...@denx.de> wrote:
> On 07/14/2011 09:11 AM, David Jander wrote: > > This is a port of the official PLL errata workaround from Freescale to > > mainline u-boot. > > The PLL's in the i.MX51 processor can go out of lock due to a metastable > > condition in an analog flip-flop when used at high frequencies. > > This workaround implements an undocumented feature in the PLL (dither > > mode), which causes the effect of this failure to be much lower (in terms > > of frequency deviation), avoiding system failure, or at least decreasing > > the likelihood of system failure. > > > > Signed-off-by: David Jander <da...@protonic.nl> > > Hi David, > > do you have now also an official Errata number from Freescale to be > added to your documentation ? Needless to say that this supersedes my patch sent back in May, 26th... which btw did not help much, since _all_ PLL's are affected by this problem. Not only PLL1. Best regards, -- David Jander Protonic Holland. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
