Re: [PATCH v13 12/19] riscv: sifive: dts: fu540: set ethernet clock rate

On Fri, May 29, 2020 at 2:05 PM Pragnesh Patel wrote: > > Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps, > Earlier this is done by FSBL. With this change We can remove the > ethernet clock rate code from FSBL. > > Signed-off-by: Pragnesh Patel > --- > arch/riscv/dts/fu540

[PATCH v13 12/19] riscv: sifive: dts: fu540: set ethernet clock rate

Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps, Earlier this is done by FSBL. With this change We can remove the ethernet clock rate code from FSBL. Signed-off-by: Pragnesh Patel --- arch/riscv/dts/fu540-c000-u-boot.dtsi | 5 + 1 file changed, 5 insertions(+) diff --g