On Sat, Apr 26, 2025 at 04:56:58PM +, Yao Zi wrote:
> This patch cleans the vendor code of DDR initialization up, converts the
> driver to fit in DM framework and use a firmware[1] packaged by binman to
> ship PHY configuration.
>
> Currently the driver is only capable of initializing the cont
On Sat, Apr 26, 2025 at 05:09:16PM +, Yao Zi wrote:
> [EXTERNAL MAIL]
>
> On Sat, Apr 26, 2025 at 04:56:58PM +, Yao Zi wrote:
> > This patch cleans the vendor code of DDR initialization up, converts the
> > driver to fit in DM framework and use a firmware[1] packaged by binman to
> > ship
On Sat, Apr 26, 2025 at 04:56:58PM +, Yao Zi wrote:
> [EXTERNAL MAIL]
>
> This patch cleans the vendor code of DDR initialization up, converts the
> driver to fit in DM framework and use a firmware[1] packaged by binman to
> ship PHY configuration.
>
> Currently the driver is only capable of
On Sat, Apr 26, 2025 at 04:56:58PM +, Yao Zi wrote:
> This patch cleans the vendor code of DDR initialization up, converts the
> driver to fit in DM framework and use a firmware[1] packaged by binman to
> ship PHY configuration.
>
> Currently the driver is only capable of initializing the cont
This patch cleans the vendor code of DDR initialization up, converts the
driver to fit in DM framework and use a firmware[1] packaged by binman to
ship PHY configuration.
Currently the driver is only capable of initializing the controller to
work with dual-rank 3733MHz LPDDR4, which is shipped by
This patch cleans the vendor code of DDR initialization up, converts the
driver to fit in DM framework and use a firmware[1] packaged by binman to
ship PHY configuration.
Currently the driver is only capable of initializing the controller to
work with dual-rank 3733MHz LPDDR4, which is shipped by
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