On Sat, Apr 26, 2025 at 04:56:58PM +0000, Yao Zi wrote: > [EXTERNAL MAIL] > > This patch cleans the vendor code of DDR initialization up, converts the > driver to fit in DM framework and use a firmware[1] packaged by binman to > ship PHY configuration. > > Currently the driver is only capable of initializing the controller to > work with dual-rank 3733MHz LPDDR4, which is shipped by 16GiB variants > of LicheePi 4A boards and I could test with. Support for other > configurations could be easily added later. > > Link: https://github.com/ziyao233/th1520-firmware # [1] > Signed-off-by: Yao Zi <zi...@disroot.org> > --- > drivers/ram/Kconfig | 1 + > drivers/ram/Makefile | 4 + > drivers/ram/thead/Kconfig | 5 + > drivers/ram/thead/Makefile | 1 + > drivers/ram/thead/th1520_ddr.c | 781 +++++++++++++++++++++++++++++++++ > 5 files changed, 792 insertions(+) > create mode 100644 drivers/ram/thead/Kconfig > create mode 100644 drivers/ram/thead/Makefile > create mode 100644 drivers/ram/thead/th1520_ddr.c
Reviewed-by: Leo Yu-Chi Liang <ycli...@andestech.com>
