The Linux pinctrl-sx150 was originally written as a GPIO driver
and fully rewritten by me as a Pinctrl driver and extended by
other contributors.
Fixup the Copyright header style and correctly report the
Copyright headers from the Linux driver.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl
pccb, start, blks);
start += blks;
- blks = 0;
}
if (scsi_exec(bdev, pccb)) {
scsi_print_error(pccb);
blkcnt -= blks;
break;
}
+ blks -= blocks;
} while (blks != 0);
return blkcnt;
}
Reviewed-by: Neil Armstrong
On 23/07/2025 13:41, Luca Weiss wrote:
Hi Neil,
On Fri Jun 20, 2025 at 11:07 AM CEST, Luca Weiss wrote:
On Fri Jun 20, 2025 at 10:54 AM CEST, Neil Armstrong wrote:
On 18/06/2025 16:25, Luca Weiss wrote:
Add Clock driver for the GCC block found in the SM6350 SoC.
Signed-off-by: Luca Weiss
AGE=y
CONFIG_UFS=y
CONFIG_QCOM_UFS=y
Reviewed-by: Neil Armstrong
t < 0)
+ if (!timeout)
return -ETIMEDOUT;
return 0;
---
base-commit: bd0ade7d090a334b3986936d63a34001d99722ad
change-id: 20250722-meson_saradc-4bba9dc18333
Best regards,
Reviewed-by: Neil Armstrong
: 20250723-clk_meson-3d90bc29f8dc
Best regards,
Reviewed-by: Neil Armstrong
-32,6 +33,8 @@
#define MRX_FSM_STATE 0xC1
/* M-PHY registers */
+#define RX_OVRD_IN_1(n)(0x3006 + ((n) * 0x100))
+#define RX_PCS_OUT(n) (0x300F + ((n) * 0x100))
#define FAST_FLAGS(n) (0x401C + ((n) * 0x100))
#define RX_AFE_ATT_IDAC(n)(0x4000 + ((n) * 0x100))
#define RX_AFE_CTLE_IDAC(n) (0x4001 + ((n) * 0x100))
Looks good !
Reviewed-by: Neil Armstrong
ic inline u32 cmd_db_read_addr(const char *resource_id)
Reviewed-by: Neil Armstrong
Hi,
On 02/07/2025 04:59, Lothar Waßmann wrote:
Hi,
On Mon, 30 Jun 2025 17:19:57 +0200 Neil Armstrong wrote:
From: Dmitrii Merkurev
Introduce fastboot block flashing functions and helpers
to be shared with the MMC implementation.
The write logic comes from the mmc implementation, while
the
Hi,
On 02/07/2025 20:01, Aswin Murugan wrote:
Added support for Qualcomm RPMH power domain driver, responsible
for managing power domains on Qualcomm SoCs. This is a port of
the Linux RPMHPD driver [1] and sa8775p related changes. The
power domain driver currently has support to power on and off
On 02/07/2025 20:01, Aswin Murugan wrote:
Partially reverted commit "soc: qcom: cmd-db: drop unused
functions" by restoring only the cmd_db_read_slave_id() and
cmd_db_read_aux_data() functions, which were removed in that
commit. These functions are required for the RPMH Power Domain
Driver.
So
On 02/07/2025 20:01, Aswin Murugan wrote:
Enable QCOM_POWER_DOMAIN & OF_LIVE_SA8775P config for qcs9100
Please fixup the commit message and subject, because there's no OF_LIVE_SA8775P
nor qcs9100 config.
Neil
Signed-off-by: Aswin Murugan
---
v3:
- Removed OF_LIVE_SA8775P config, since ther
On 02/07/2025 20:01, Aswin Murugan wrote:
RPMH power domain properties were initially removed from the
device tree due to the absence of driver support. Support for
SA8775P_MMCX and SA8775P_MMCX_AO has now been added in the RPMH
Power Domain Driver for the SA8775P platform.
Well this affects al
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RNG=y
Reviewed-by: Neil Armstrong
Move support of the pm8550 gpios to the newly introduced
driver and drop the compatible entry and the read-only quirk
at the same time from the old driver.
Signed-off-by: Neil Armstrong
---
drivers/gpio/qcom_pmic_gpio.c | 20 +---
drivers/gpio/qcom_spmi_gpio.c | 1 +
2 files
innekhanov
Signed-off-by: Neil Armstrong
---
drivers/gpio/Makefile |2 +-
drivers/gpio/qcom_spmi_gpio.c | 1034 +
2 files changed, 1035 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index
d64c14db5cfd3e5
al is to deprecate the old one it has been validated
on currently supported hardware.
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Collected tested-by
- Rebased on next
- Link to v1:
https://lore.kernel.org/r/20250401-topic-sm8x50-pmic-gpio-pinctrl-new-v1-0-74077ef0b...@linaro.org
---
From: Dmitrii Merkurev
Switch the mmc backend to this new shared block helpers,
reducing block logic and only leaving MMC specific logic.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
drivers/fastboot
so it doesn't break the CHIP & Ninendo boards, and for ROCKCHIP
when MMC is enabled.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
drivers/fastboot/Kconfig | 32 ++--
dr
the
erase operation, except mmc & virtio, so in order to allow
erasiong any partition a soft-erase logic has been added
to write zero-ed buffers in a loop.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
dri
made FASTBOOT_FLASH_BLOCK
enabled on boards that didn't want FASTBOOT_FLASH enabled at all.
Signed-off-by: Neil Armstrong
---
Changes in v6:
- Fix BLK dependency that can affect SUNXI board with MMC/NAND disabled
- Link to v5:
https://lore.kernel.org/r/20250606-topic-fastboot-blk-v5-0
| PIPE3_PHYSTATUS_SW);
+ udelay(100);
+
clrbits_le32(qscratch_base + QSCRATCH_GENERAL_CFG,
PIPE_UTMI_CLK_DIS);
}
Reviewed-by: Neil Armstrong
>base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) &&
- !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY))
+ while (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_READY))
;
- writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR);
-
- writel(1, priv->base + UARTDM_NCF_TX);
writel(ch, priv->base + UARTDM_TF);
}
Reviewed-by: Neil Armstrong
UARTDM_CR_CMD_RESET_RX, priv->base + UARTDM_CR);
writel(UARTDM_CR_CMD_RESET_TX, priv->base + UARTDM_CR);
+ writel(UARTDM_CR_RX_ENABLE, priv->base + UARTDM_CR);
+ writel(UARTDM_CR_TX_ENABLE, priv->base + UARTDM_CR);
}
static int msm_serial_probe(struct udevice *dev)
{
Reviewed-by: Neil Armstrong
erial_probe(struct udevice *dev)
{
Reviewed-by: Neil Armstrong
0_ids[] = {
- { .compatible = "qcom,sdm845-smmu-500" },
{ .compatible = "qcom,sc7280-smmu-500" },
+ { .compatible = "qcom,sdm845-smmu-500" },
+ { .compatible = "qcom,sm6350-smmu-500" },
{ .compatible = "qcom,smmu-500", },
{ /* sentinel */ }
};
Reviewed-by: Neil Armstrong
{
+ .compatible = "qcom,gcc-sm6350",
+ .data = (ulong)&sm6350_gcc_data,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(gcc_sm6350) = {
+ .name = "gcc_sm6350",
+ .id = UCLASS_NOP,
+ .of_match = gcc_sm6350_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
Apart that, looks good :-)
Reviewed-by: Neil Armstrong
CONFIG_PINCTRL_QCOM_SM8550=y
Reviewed-by: Neil Armstrong
Y_PIPE_CLK,0x39068, BIT(0)),
+ GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x39088, BIT(0)),
};
static int sm8650_enable(struct clk *clk)
Reviewed-by: Neil Armstrong
+CONFIG_DEBUG_UART_CLOCK=14745600
Reviewed-by: Neil Armstrong
"vdd-l13-l16-l17"),
{}
@@ -705,6 +732,10 @@ static int rpmh_regulators_bind(struct udevice *dev)
}
static const struct udevice_id rpmh_regulator_ids[] = {
+ {
+ .compatible = "qcom,pm6150l-rpmh-regulators",
+ .data = (ulong)pm6150l_vreg_data,
+ },
{
.compatible = "qcom,pm8150-rpmh-regulators",
.data = (ulong)pm8150_vreg_data,
Reviewed-by: Neil Armstrong
sdm845_ufsphy_cfg },
{ .compatible = "qcom,sm8150-qmp-ufs-phy", .data =
(ulong)&sm8150_ufsphy_cfg },
{ .compatible = "qcom,sm8250-qmp-ufs-phy", .data =
(ulong)&sm8250_ufsphy_cfg },
{ .compatible = "qcom,sm8550-qmp-ufs-phy", .data =
(ulong)&sm8550_ufsphy_cfg },
Reviewed-by: Neil Armstrong
inctrl_sm6350",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops= &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
Reviewed-by: Neil Armstrong
= "qcom,sc7280-rpmh-clk" },
+ { .compatible = "qcom,sm6350-rpmh-clk" },
{ .compatible = "qcom,sm8150-rpmh-clk" },
{ .compatible = "qcom,sm8250-rpmh-clk" },
{ .compatible = "qcom,sm8550-rpmh-clk" },
Reviewed-by: Neil Armstrong
Hi Tom,
On 03/06/2025 00:27, Tom Rini wrote:
Hey all,
Something I've talked about in release emails earlier this year, and
promised a follow-up on but hadn't gotten to yet, was how to manage the
project moving forward. The email I made last week about Simon also I
believe highlighted some of th
:
- return -EINVAL directly in case of error. (Neil Armstrong
)
- Link to v1:
https://lore.kernel.org/r/20250617-meson_ppinctrl-v1-1-593aa15f2...@outlook.com
---
drivers/pinctrl/meson/pinctrl-meson.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drive
2);
dw_pcie_dbi_write_enable(&priv->dw, false);
}
I'll need to validate it on HW, but it looks fine:
Reviewed-by: Neil Armstrong
correct and is now aligned
with Linux kernel behavior.
Signed-off-by: Marek Vasut
---
Cc: Casey Connolly
Cc: Christian Marangi
Cc: Daniel Schwierzeck
Cc: Jiaxun Yang
Cc: John Crispin
Cc: Kever Yang
Cc: Neil Armstrong
Cc: Nobuhiro Iwamatsu
Cc: Philipp Tomsich
Cc: Siddharth Vadapalli
Cc
ches.
The Qualcomm documentation is also cleaned up, a new "signing" page
is added to briefly cover the what and why of MBN signing, and board
specific pages are updated to explain the new build process.
These patches have been tested on the RB3 Gen 2, but additional
testing for othe
On 16/06/2025 18:23, Yang Xiwen via B4 Relay wrote:
From: Yang Xiwen
meson_gpio_get() always assumes gpio is configured to input mode. This
is incorrect and breaks `gpio toggle` command:
gpio: pin aobus-banks2 (gpio 2) value is 0
Warning: value of pin is still 1
Fix it by adding the logic
-CONFIG_DEBUG_UART_MSM_GENI=y
-CONFIG_DEBUG_UART_CLOCK=14745600
-
# Address where U-Boot will be loaded
CONFIG_TEXT_BASE=0xaf00
CONFIG_REMAKE_ELF=y
Reviewed-by: Neil Armstrong
@@ F: drivers/serial/serial_msm.c
F:drivers/serial/serial_msm_geni.c
F:drivers/smem/msm_smem.c
F:drivers/spmi/spmi-msm.c
F:drivers/usb/host/ehci-msm.c
+F: configs/chromebook_trogdor_defconfig
N:qcom
N:snapdragon
N:qualcomm
Reviewed-by: Neil Armstrong
udelay(plat->spi_delay_us);
+ if (plat->spi_delay_us)
+ udelay(plat->spi_delay_us);
/*
* drive bit
Reviewed-by: Neil Armstrong
On 06/06/2025 16:36, Tom Rini wrote:
On Fri, Jun 06, 2025 at 11:33:09AM +0200, Neil Armstrong wrote:
From: Dmitrii Merkurev
1. Get partition info/size
2. Erase partition
3. Flash partition
4. BCB
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs
the
erase operation, except mmc & virtio, so in order to allow
erasiong any partition a soft-erase logic has been added
to write zero-ed buffers in a loop.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
dri
From: Dmitrii Merkurev
1. Get partition info/size
2. Erase partition
3. Flash partition
4. BCB
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
drivers/fastboot/Kconfig | 29
From: Dmitrii Merkurev
Switch the mmc backend to this new shared block helpers,
reducing block logic and only leaving MMC specific logic.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
drivers/fastboot
welcome to make sure this series doesn't
introduce any regressions on the emmc backend.
Signed-off-by: Neil Armstrong
---
Changes in v5:
- Removed BLK dependency on FASTBOOT_FLASH_MMC
- Removed BLK dependency on FASTBOOT_FLASH in patch 2
- Added back BLK dependency on FASTBOOT_FLASH in pa
On 06/06/2025 09:22, Mattijs Korpershoek wrote:
On jeu., juin 05, 2025 at 19:48, Neil Armstrong
wrote:
On 05/06/2025 16:21, Tom Rini wrote:
On Thu, Jun 05, 2025 at 10:16:54AM +0200, Neil Armstrong wrote:
On 22/05/2025 16:39, Tom Rini wrote:
On Thu, May 22, 2025 at 02:37:07PM +0200, Neil
On 05/06/2025 22:02, Tom Rini wrote:
On Thu, Jun 05, 2025 at 07:46:54PM +0200, neil.armstr...@linaro.org wrote:
Hi,
On 04/06/2025 14:15, Martin Schwan wrote:
This series implements a new bootmeth for RAUC A/B systems. RAUC (Robust
Auto Update Controller) is a lightweight update client, providi
On 05/06/2025 16:21, Tom Rini wrote:
On Thu, Jun 05, 2025 at 10:16:54AM +0200, Neil Armstrong wrote:
On 22/05/2025 16:39, Tom Rini wrote:
On Thu, May 22, 2025 at 02:37:07PM +0200, Neil Armstrong wrote:
From: Dmitrii Merkurev
1. Get partition info/size
2. Erase partition
3. Flash partition
Hi,
On 04/06/2025 14:15, Martin Schwan wrote:
This series implements a new bootmeth for RAUC A/B systems. RAUC (Robust
Auto Update Controller) is a lightweight update client, providing "Safe
and Secure OTA Updates for Embedded Linux". See the following links for
more information about RAUC:
On 22/05/2025 16:35, Tom Rini wrote:
On Thu, May 22, 2025 at 02:37:06PM +0200, Neil Armstrong wrote:
From: Dmitrii Merkurev
Switch the mmc backend to this new shared block helpers,
reducing block logic and only leaving MMC specific logic.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs
On 22/05/2025 16:39, Tom Rini wrote:
On Thu, May 22, 2025 at 02:37:07PM +0200, Neil Armstrong wrote:
From: Dmitrii Merkurev
1. Get partition info/size
2. Erase partition
3. Flash partition
4. BCB
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs
On 30/05/2025 14:15, Ilias Apalodimas wrote:
Hi Tom,
On Wed, 28 May 2025 at 20:59, Tom Rini wrote:
Hey all,
First, I am not happy to be writing this email. But at this point, I
feel I have no other choice, for the good of the overall project and
community.
Back in January[0] of this year I
On 04/06/2025 14:40, Casey Connolly wrote:
On 6/3/25 18:43, Neil Armstrong wrote:
On 01/04/2025 11:47, Neil Armstrong wrote:
The current SPMI gpio driver is very old and doesn't support
pin state tracking to fully support the whole pinconf calls.
The simplest is to rewritte the driver
: Casey Connolly
+S: Maintained
+N: qcs6490
+N: sc7280
Reviewed-by: Neil Armstrong
On 01/04/2025 11:47, Neil Armstrong wrote:
The current SPMI gpio driver is very old and doesn't support
pin state tracking to fully support the whole pinconf calls.
The simplest is to rewritte the driver using the v6.14 Linux
driver and fully implement pinctrl, pinmux, pinconf and gpio
su
ranges from devicetree and ensure that the
pinctrl and GPIO drivers don't try to interact with these pins.
Signed-off-by: Caleb Connolly
Signed-off-by: Neil Armstrong
---
Gentle ping !
Neil
Hi,
On 26/05/2025 21:47, ver...@hpe.com wrote:
From: Jean-Marie Verdun
Add support for the Wiznet W5500 spi to ethernet controller
Signed-off-by: Jean-Marie Verdun
---
drivers/net/Kconfig | 9 +
drivers/net/Makefile | 1 +
drivers/net/w5500.c | 610 +
Hi,
On 26/05/2025 11:31, Balaji Selvanathan wrote:
This patch series introduces support for the Qualcomm watchdog timer
in U-Boot. It includes a new driver based on the upstream Linux
implementation and integrates the driver into the
early boot initialization sequence.
A watchdog support has a
tx_complete, false, timeout_us, dev);
if (ret < 0) {
dev_err(dev, "TCPM: PD transmit data failed: %d\n", ret);
return ret;
---
base-commit: bab54f5942c428be698216224fd10b91d974d4da
change-id: 20250526-topic-tcpm-tx-poll-cond-8dd3ebbbeddc
Best regards,
--
Neil Armstrong
welcome to make sure this series doesn't
introduce any regressions on the emmc backend.
Signed-off-by: Neil Armstrong
---
Changes in v4:
- Rebase on next
- Fixup Kconfig default values & description
- Link to v3:
https://lore.kernel.org/r/20250506-topic-fastboot-blk-v3-0-d94be5829...@l
From: Dmitrii Merkurev
Switch the mmc backend to this new shared block helpers,
reducing block logic and only leaving MMC specific logic.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
drivers/fastboot
From: Dmitrii Merkurev
1. Get partition info/size
2. Erase partition
3. Flash partition
4. BCB
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
drivers/fastboot/Kconfig | 29
the
erase operation, except mmc & virtio, so in order to allow
erasiong any partition a soft-erase logic has been added
to write zero-ed buffers in a loop.
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Tested-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
dri
On 22/05/2025 08:58, Mattijs Korpershoek wrote:
Hi Tom,
On mer., mai 21, 2025 at 13:03, Tom Rini wrote:
On Wed, May 21, 2025 at 08:52:41PM +0200, Mattijs Korpershoek wrote:
Hi Tom,
On mer., mai 21, 2025 at 09:12, Tom Rini wrote:
On Wed, May 21, 2025 at 04:49:35PM +0200, Mattijs Korpersho
default 0x350b if ROCKCHIP_RK3588
default 0x350c if ROCKCHIP_RK3528
+ default 0x4ee0 if ARCH_QCOM
default 0x0
help
Product ID of the USB device emulated, reported to the host device.
Reviewed-by: Neil Armstrong
{ .compatible = "qcom,sc7280-qmp-ufs-phy", .data =
(ulong)&sc7280_ufsphy_cfg, },
Reviewed-by: Neil Armstrong
_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x830d4, 1),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x83064, 1),
Please replace "1" with BIT(0) is you re-spin
Thanks,
Reviewed-by: Neil Armstrong
+};
+
+static int qcs8300_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_
},
+ { }
+};
+
+U_BOOT_DRIVER(gcc_qcs615) = {
+ .name = "gcc_qcs615",
+ .id = UCLASS_NOP,
+ .of_match = gcc_qcs615_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
With that:
Reviewed-by: Neil Armstrong
{ .compatible = "qcom,sm8650-qmp-ufs-phy", .data =
(ulong)&sm8650_ufsphy_cfg },
{ .compatible = "qcom,sc7280-qmp-ufs-phy", .data =
(ulong)&sc7280_ufsphy_cfg, },
+ { .compatible = "qcom,qcs615-qmp-ufs-phy", .data =
(ulong)&sm6115_ufsphy_cfg, },
{ }
};
Reviewed-by: Neil Armstrong
Hi,
Thanks for fixing it !
On 11/05/2025 20:02, ver...@hpe.com wrote:
From: Jean-Marie Verdun
Add support for the Wiznet W5500 spi to ethernet controller
Signed-off-by: Jean-Marie Verdun
---
drivers/net/Kconfig | 9 +
drivers/net/Makefile | 1 +
drivers/net/w5500.c | 584 +
2.0 */
+ .data = (ulong)&vialab_vl817_data,
+ }, {
+ .compatible = "usb2109,2817", /* Via labs VL817 3.1 */
+ .data = (ulong)&vialab_vl817_data,
}
};
Reviewed-by: Neil Armstrong
b5e3,620", /* GL852G USB 3.1 */
+ .data = (ulong)&genesys_gl853g_data,
}
};
Reviewed-by: Neil Armstrong
On 09/05/2025 09:02, Anand Moon wrote:
Add conditional compilation for the usb5744_i2c_init() function based
on the CONFIG_DM_I2C configuration, to avoid compilation failure.
CC net/net-common.o
AR net/built-in.o
LDS u-boot.lds
LD u-boot
aarch64-linux-gnu-ld.bfd: c
=y
CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
Same as patch 2, with that fixed:
Reviewed-by: Neil Armstrong
CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
Same as patch 2, with that fixed:
Reviewed-by: Neil Armstrong
# CONFIG_VIDEO_BPP8 is not set
# CONFIG_VIDEO_BPP16 is not set
With that fixed:
Reviewed-by: Neil Armstrong
On 09/05/2025 09:02, Anand Moon wrote:
Add support for the Genesys GL852G USB2.0 Hub on Odroid C1+
and Odroid C2. The GL852G driver trigger hub reset signal
which toggles the gpio.
Signed-off-by: Anand Moon
---
Still some issue with USB hub on Odroid C2
What does that mean ?
=> dm tree
v
T_REG(dev, gpio)) &
BIT(GPIO_IN));
}
static int msm_gpio_get_function_special(struct msm_gpio_bank *priv,
Reviewed-by: Neil Armstrong
b to harmonize the fastboot emmc
backend with the generic block backend:
https://source.denx.de/u-boot/custodians/u-boot-dfu/-/issues/6
Nice !
Signed-off-by: Neil Armstrong
---
Changes in v3:
- Move Kconfig/Makefile changes over the 2 patches
- Relicence to GPL2 with Dmitrii approval
- Move soft e
On 05/05/2025 15:12, Wayne Schroeder wrote:
If I add the usb reset command, it works reliably at reboot, but it
does not work on a fresh power-up with that change.
OK this means there's a dangling resource, Does USB always work within
U-Boot or it breaks U-Boot and Linux in those cases ?
On
From: Dmitrii Merkurev
Switch the mmc backend to this new shared block helpers,
reducing block logic and only leaving MMC specific logic.
Signed-off-by: Dmitrii Merkurev
Signed-off-by: Neil Armstrong
---
drivers/fastboot/Kconfig | 4 +-
drivers/fastboot/Makefile | 3 +-
drivers/fastboot
From: Dmitrii Merkurev
1. Get partition info/size
2. Erase partition
3. Flash partition
4. BCB
Signed-off-by: Dmitrii Merkurev
Reviewed-by: Mattijs Korpershoek
Signed-off-by: Neil Armstrong
---
drivers/fastboot/Kconfig | 24
drivers/fastboot/Makefile | 1
welcome to make sure this series doesn't
introduce any regressions on the emmc backend.
Signed-off-by: Neil Armstrong
---
Changes in v3:
- Move Kconfig/Makefile changes over the 2 patches
- Relicence to GPL2 with Dmitrii approval
- Move soft erase in a separate function
- Update help text of Kc
the
erase operation, except mmc & virtio, so in order to allow
erasiong any partition a soft-erase logic has been added
to write zero-ed buffers in a loop.
Signed-off-by: Dmitrii Merkurev
Signed-off-by: Neil Armstrong
---
drivers/fastboot/fb_block.c |
Hi,
On 05/05/2025 19:58, ver...@hpe.com wrote:
From: Jean-Marie Verdun
Add support for the Wiznet W5500 spi to ethernet controller
Signed-off-by: Jean-Marie Verdun
---
drivers/net/Kconfig | 9 +
drivers/net/Makefile | 1 +
drivers/net/w5500.c | 618 +
On 06/05/2025 09:24, Varadarajan Narayanan wrote:
Allow SCSI to be able to store environment variables.
Signed-off-by: Varadarajan Narayanan
---
env/Kconfig| 15 +-
env/Makefile | 1 +
env/env.c | 3 ++
env/scsi.c | 115 ++
On 06/05/2025 09:24, Varadarajan Narayanan wrote:
Add a function to obtain the block device for SCSI.
Signed-off-by: Varadarajan Narayanan
---
drivers/scsi/scsi-uclass.c | 30 ++
include/scsi.h | 11 +++
2 files changed, 41 insertions(+)
diff
ANDROID_BOOT_IMAGE_IGNORE_BLOB_ADDR
imply OF_UPSTREAM
imply CMD_DM
imply DM_USB_GADGET
Reviewed-by: Neil Armstrong
c(SZ_4M));
status |= env_set_hex("pxefile_addr_r", addr_alloc(SZ_4M));
addr = addr_alloc(SZ_2M);
Anyway
Reviewed-by: Neil Armstrong
k_ptr;
} else {
ramdisk_ptr = img_data.ramdisk_addr;
I like this and should be the default except rare cases, exposing the whole
memory
to image loading sound really dangerous..
Reviewed-by: Neil Armstrong
@Mattijs would this still work on Amlogic board
Hi,
On 02/05/2025 04:50, Simon Glass wrote:
During a recent discussion with Heinrich we discussed why the hooks are
kept in a separate repo.
The amount of code is small, a tenth of the size of the recently added
lwip, just by way of example. Testing is a critical part of U-Boot and
one of the t
On 05/05/2025 09:23, Neil Armstrong via groups.io wrote:
Hi,
On 23/04/2025 07:11, Sumit Garg wrote:
From: Sumit Garg
RB1 and RB2 have three root compatibles where the last one can't be used
to decode fdtfile name (qcm* vs qrb*). So rather just rely on the first
compatible to retrieve th
Hi,
On 23/04/2025 07:11, Sumit Garg wrote:
From: Sumit Garg
RB1 and RB2 have three root compatibles where the last one can't be used
to decode fdtfile name (qcm* vs qrb*). So rather just rely on the first
compatible to retrieve the SoC name.
OK, so "soc" would be qcm2290 instead of qrb2210,
Hi,
+CC u-boot-amlo...@groups.io
+CC linux-amlo...@lists.infradead.org
On 05/05/2025 00:34, Wayne Schroeder wrote:
Hello. I am not sure if this is a bug, or even related to u-boot, but I am
reporting it here because it was easiest to resolve via a u-boot change.
I am using u-boot-2025.04 (sou
250502-u-boot-topic-mdio-mux-gxl-bit28-a6d03bf8e383
Best regards,
--
Neil Armstrong
On 30/04/2025 10:54, Varadarajan Narayanan wrote:
The SYSRESET_PSCI interface presently available doesn't support booting
into Emergency DownLoad (EDL) mode. The EDL mode is used to flash the
board with different firmware.
Since EDL is Qcom specific, implement a Qcom specific SYSRESET_PSCI
handl
Hi,
But using raw partition descriptors[1] does not work with the above
[1]
https://docs.u-boot.org/en/latest/android/fastboot.html#raw-partition-descriptors
Right, not all features will work with generic block backend, but it's a start!
+
+config FASTBOOT_FLASH_BLOCK_DEVICE_ID
+
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