| 20 +++
doc/usage/cmd/meminfo.rst | 71 ++---
include/asm-generic/sections.h | 2 +
include/cpu_func.h | 16 ++
23 files changed, 215 insertions(+), 41 deletions(-)
--
2.47.2
Tested-by: Neil Armstrong # on AML-S905X-CC
and SM8650.
Based on the Linux commit 777e7c3ab7303 that can be found at [1].
[1]
https://lore.kernel.org/all/20220624143428.8334-5-sergey.se...@baikalelectronics.ru/
Signed-off-by: Neil Armstrong
---
drivers/pci/pcie_dw_common.c | 8 ++--
drivers/pci/pcie_dw_common.h | 2 ++
2 files changed
,0x41008, BIT(0)),
+ GATE_CLK(GCC_USB_HS_SYSTEM_CLK, 0x41004, BIT(0)),
};
/* SDHCI */
This should be 2 patches, but it's still fine for me...
Reviewed-by: Neil Armstrong
= readl_relaxed(priv->base + PRNG_LFSR_CFG);
val &= ~PRNG_LFSR_CFG_MASK;
val |= PRNG_LFSR_CFG_CLOCKS;
Good catch !
Reviewed-by: Neil Armstrong
i-LUN device, if somehow it happens the enquiry
command would need to get the SCSI level to handle this case.
The Linux fix was added in [1] to fix the exact same issue.
[1]
https://lore.kernel.org/all/pine.lnx.4.44l0.1409021108380.2308-100...@iolanthe.rowland.org/
Signed-off-by: Neil Arms
On 08/01/2025 16:42, Marc Zyngier wrote:
On Wed, 08 Jan 2025 15:19:07 +,
Caleb Connolly wrote:
Hi Marc,
Thanks for your comments.
On 08/01/2025 16:05, Marc Zyngier wrote:
On Wed, 08 Jan 2025 14:22:24 +,
Caleb Connolly wrote:
This seems to cause crashes on a bunch of Qualcomm plat
ddr4_2d.fw \
- --ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--level v3
Reviewed-by: Neil Armstrong
CTL);
if (!(reg & DWC3_DCTL_CSFTRST))
break;
Good catch !
Reviewed-by: Neil Armstrong
ompatible = "ti,dwc3" },
{ }
};
Reviewed-by: Neil Armstrong
of the variant header */
memcpy(tparams->hdr + HEADER_OFFSET, hdr, hdr->header_size);
+ /* Insert relocate code to move payload from 0x1200 to 0x1000 on GXBB */
+ if (!strcmp("gxbb", variant->name))
+ memcpy(tparams->hdr + 0x200,
+ gxbb_relocate, sizeof(gxbb_relocate));
+
/* Pad up to payload size of the variant header */
return hdr->payload_size - params->file_size;
}
Awesome work !
Reviewed-by: Neil Armstrong
header size, datafile will be appended */
+ tparams->header_size = PAYLOAD_OFFSET;
+
+ tparams->hdr = calloc(1, tparams->header_size);
+ if (!tparams->hdr) {
+ fprintf(stderr, "%s: Can't alloc header: %s\n",
+ params->cmdname, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ /* Start with a copy of the variant header */
+ memcpy(tparams->hdr + HEADER_OFFSET, hdr, hdr->header_size);
+
+ /* Pad up to payload size of the variant header */
+ return hdr->payload_size - params->file_size;
+}
+
+/*
+ * amlimage parameters
+ */
+U_BOOT_IMAGE_TYPE(
+ amlimage,
+ "Amlogic Boot Image",
+ 0,
+ NULL,
+ amlimage_check_params,
+ amlimage_verify_header,
+ amlimage_print_header,
+ amlimage_set_header,
+ amlimage_extract_subimage,
+ amlimage_check_image_type,
+ NULL,
+ amlimage_vrec_header
+);
Reviewed-by: Neil Armstrong
Via which tree this should be merged ?
Neil
On 05/01/2025 11:24, Ferass El Hafidi wrote:
Hi Jonas and Simon,
On Sat Jan 4, 2025 at 10:23 PM UTC, Jonas Karlman wrote:
Hi Simon,
On 2025-01-04 20:31, Simon Glass wrote:
Hi Jonas,
On Sat, 4 Jan 2025 at 10:59, Jonas Karlman wrote:
GXBB BL1 only tries to read boot image from sector 0 on e
On 03/01/2025 06:14, Varadarajan Narayanan wrote:
Add initial support for the QCS9100 (derived from SA8775p) Ride platforms.
Define memory layout statically.
Signed-off-by: Varadarajan Narayanan
---
arch/arm/dts/sa8775p-ride-r3-u-boot.dtsi | 22 ++
arch/arm/dts/sa8775p-ri
CONFIG_CLK_QCOM_SM8150=y
Reviewed-by: Neil Armstrong
y_ops qmp_ufs_ops = {
};
static const struct udevice_id qmp_ufs_ids[] = {
+ { .compatible = "qcom,sa8775p-qmp-ufs-phy", .data =
(ulong)&sa8775p_ufsphy_cfg, },
{ .compatible = "qcom,sdm845-qmp-ufs-phy", .data =
(ulong)&sdm845_ufsphy_cfg },
{ .compatibl
id = UCLASS_NOP,
+ .of_match = gcc_sa8775p_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
Reviewed-by: Neil Armstrong
On 28/12/2024 14:46, Ahmad Fatoum wrote:
Hi,
On 11.10.24 16:38, Neil Armstrong wrote:
On Qualcomm systems, the setup buffer and even buffers are in
a bad state at interrupt handling, so invalidate the dcache lines
for the setup_buf and event buffer to make sure we read correct
data written by
Sync ufshci.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Acked-by: Neha Malcom Francis
Tested-by: Love Kumar
Signed-off-by: Neil
Splitting the header will help synchronizing the defines
again with Linux.
Acked-by: Neha Malcom Francis
Tested-by: Love Kumar
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.h| 329 +-
drivers/ufs/ufshci.h | 334
Add missing ufs.h causing build warning on some symbols.
Tested-by: Love Kumar
Reviewed-by: Neha Malcom Francis
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index
Sync unipro.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Acked-by: Neha Malcom Francis
Tested-by: Love Kumar
Signed-off-by: Neil
Fixes some alignment warnings, missing comments on write barrier,
missing parenthesis around macro parameters and a comment typo.
No functional changes intended.
Reviewed-by: Neha Malcom Francis
Tested-by: Love Kumar
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c| 16
Mark the remaining local functions as static to avoid build
warnings.
Also drop the EXPORT_SYMBOL of ufshcd_map_desc_id_to_length.
Tested-by: Love Kumar
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions
This serie fixes the build and checkpatch warnings, and
does a split of the ufs.h into a separate ufshci.h which
helps syndhronizing the defines from Linux v6.12.
No functional changes intended, tests on hardware
are welcome.
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Colect tested
Hi,
On 23/12/2024 23:23, Baltazár Radics wrote:
The previous instructions resulted in a bootloader that wouldn't fit in
an mbr gap. I have updated the docs based on upstream's build process.
Note that the script should be compatible with other g12 based odroid
boards, but I'm unable to test tho
On 06/12/2024 08:55, Neha Malcom Francis wrote:
On 20/11/24 14:52, Neil Armstrong wrote:
Mark the remaining local functions as static to avoid build
warnings.
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions
Hi,
On 20/11/2024 10:22, Neil Armstrong wrote:
This serie fixes the build and checkpatch warnings, and
does a split of the ufs.h into a separate ufshci.h which
helps syndhronizing the defines from Linux v6.12.
No functional changes intended, tests on hardware
are welcome.
Signed-off-by: Neil
On 26/11/2024 07:43, Love Kumar wrote:
Hi,
On 20/11/24 2:52 pm, Neil Armstrong wrote:
This serie fixes the build and checkpatch warnings, and
does a split of the ufs.h into a separate ufshci.h which
helps syndhronizing the defines from Linux v6.12.
No functional changes intended, tests on
NIST SP800 90B compliant entropic source.
Signed-off-by: Neil Armstrong
---
drivers/rng/msm_rng.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/rng/msm_rng.c b/drivers/rng/msm_rng.c
index
658c153d3edb2590b0b470e3067da9
Enable the MSM RNG driver by default with the associated
command, this will fill KASLR seed when booting Linux.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index
Add support for RNG on newer SoCs which shares the
RNG hardware between different Execution Environments (EE).
Also enable it by default to fill KASL seed when running Linux.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (2):
rng: msm: add support for newer Qualcomm hwrandom IPs
Add PCIe config space capability search function specific for
the host controller, which are bridges *to* PCI devices but
are not PCI devices themselves.
Signed-off-by: Neil Armstrong
---
drivers/pci/pcie_dw_common.c | 42 ++
drivers/pci/pcie_dw_common.h
0
- sm8450
- sm8550
- sm8650
- x1e80100
But it has only been tested on:
- sc7280
- sm8550
- sm8650
- x1e80100
It supports setting the IOMMU SID table for supported platforms.
Signed-off-by: Neil Armstrong
---
drivers/pci/Kconfig| 8 +
drivers/pci/Makefile | 1 +
drivers/pci/pcie
Add support for the DWC PCIe controllers found
on the Qualcomm SoCs, it requires introducing
pcie_dw_find_capability() to properly configure
the Host controller capabilities.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (2):
pci: pcie_dw_common: introduce pcie_dw_find_capability
Add support for the PCIe QMP PHY on the SM8550,
SM8650 and x1e80100 SoCs.
The driver is based on the Linux phy/qualcomm/phy-qcom-qmp-pcie.c
driver and adapted to U-Boot.
Signed-off-by: Neil Armstrong
---
drivers/phy/qcom/Kconfig |6 +
drivers/phy/qcom/Makefile
Add the PCIe clocks for the SM8550 GCC.
Signed-off-by: Neil Armstrong
---
drivers/clk/qcom/clock-sm8550.c | 36
1 file changed, 36 insertions(+)
diff --git a/drivers/clk/qcom/clock-sm8550.c b/drivers/clk/qcom/clock-sm8550.c
index
Add the PCIe clocks for the SM8550, SM8650 and X1E80100
platforms to enable support for PCIe feature.
Depends on:
-
https://lore.kernel.org/all/20241118-topic-x1e80100-clk-v1-0-8841e87ad...@linaro.org/
Signed-off-by: Neil Armstrong
---
Neil Armstrong (4):
clk: qcom: add
Add the PCIe clocks for the x1e80100 GCC.
Signed-off-by: Neil Armstrong
---
drivers/clk/qcom/clock-x1e80100.c | 54 +++
1 file changed, 54 insertions(+)
diff --git a/drivers/clk/qcom/clock-x1e80100.c
b/drivers/clk/qcom/clock-x1e80100.c
index
Add the PCIe clocks for the SM8650 GCC.
Signed-off-by: Neil Armstrong
---
drivers/clk/qcom/clock-sm8650.c | 36
1 file changed, 36 insertions(+)
diff --git a/drivers/clk/qcom/clock-sm8650.c b/drivers/clk/qcom/clock-sm8650.c
index
The PCIe PIPE clock requires a special setup function to
mux & enable the clock from the PCIe PHY before the PHY
has enabled the clock.
Import the clk_phy_mux_enable() from the Linux driver to
use the same implementation regarding the PIPE clock.
Signed-off-by: Neil Armstrong
---
drivers
Add the missing PCIe clk_req function for the x1e80100 TLMM.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/pinctrl-x1e80100.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-x1e80100.c
b/drivers/pinctrl/qcom/pinctrl-x1e80100.c
index
Add the missing PCIe clk_req functions for the SM8650 TLMM.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/pinctrl-sm8650.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8650.c
b/drivers/pinctrl/qcom/pinctrl-sm8650.c
index
Add the missing PCIe clk_req functions for the SM8550, SM8650
and X1E80100 TLMM.
Depends on:
-
https://lore.kernel.org/all/20241115-topic-x1e80100-pinctrl-v1-0-35f984226...@linaro.org/
Signed-off-by: Neil Armstrong
---
Neil Armstrong (3):
pinctrl: qcom: sm8550: add pcie1_clk_req_n
Add the missing PCIe clk_req function for the SM8550 TLMM.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/pinctrl-sm8550.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550.c
b/drivers/pinctrl/qcom/pinctrl-sm8550.c
index
Add the PMC8380 regulator data found on the Snapdragon X Elite platforms.
The tables are imported from the Linux driver.
Signed-off-by: Neil Armstrong
---
drivers/power/regulator/qcom-rpmh-regulator.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/power
Hi Dmitrii,
So you plan to send a new version of this patchset ?
It would be very useful to enable fastboot onr UFS/SCSI based devices.
Thanks,
Neil
On 06/03/2024 19:59, Dmitrii Merkurev wrote:
Signed-off-by: Dmitrii Merkurev
Cc: Patrick Delaunay
Cc: Simon Glass
Cc: Mattijs Korpershoek
Cc
Add missing ufs.h causing build warning on some symbols.
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index
f7d8c40c448c6865b7c04e03bab6f3f93a44a591..31c2959aeb12931b2bbdf26b3c676ae1a7b0fd1a
Sync ufshci.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufsh
Splitting the header will help synchronizing the defines
again with Linux.
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.h| 329 +-
drivers/ufs/ufshci.h | 334 +++
2 files changed, 335
Sync unipro.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Signed-off-by: Neil Armstrong
---
drivers/ufs/unip
This serie fixes the build and checkpatch warnings, and
does a split of the ufs.h into a separate ufshci.h which
helps syndhronizing the defines from Linux v6.12.
No functional changes intended, tests on hardware
are welcome.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (6):
ufs: core
Fixes some alignment warnings, missing comments on write barrier,
missing parenthesis around macro parameters and a comment typo.
No functional changes intended.
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c| 16 ++--
drivers/ufs/ufs.h| 6 +++---
drivers/ufs/unipro.h
Mark the remaining local functions as static to avoid build
warnings.
Signed-off-by: Neil Armstrong
---
drivers/ufs/ufs.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index
Hi,
On 14/11/2024 22:29, Guillaume La Roque wrote:
Actually bootmethod android only support android boot image version 4
and with AB image, some old platform wtill use android boot image
version 2 with AB or without AB slot.
This patchset add support of both version 2 and non-AB slot images.
It
Add support for GCC in X1E80100, and enable it in qcom_defconfig
Signed-off-by: Neil Armstrong
---
Neil Armstrong (2):
clk: qcom: Add X1E80100 clock driver
qcom_defconfig: enable X1E80100 clock driver
configs/qcom_defconfig| 1 +
drivers/clk/qcom/Kconfig
On 18/11/2024 15:59, Caleb Connolly wrote:
Hi Neil,
On 11/18/24 15:41, Neil Armstrong wrote:
Add support for GCC in X1E80100, and enable it in qcom_defconfig
Thanks for sending this!
In my testing so far on the Yoga Slim 7x UART doesn't seem to work correctly
unless I skip the UART
Enable the X1E80100 clock driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index
ea0dd3e58018c8bf08e4a455a47e29cf1bbd3c60
Add Clock driver for the GCC block found in the X1E80100 SoC.
Signed-off-by: Neil Armstrong
---
drivers/clk/qcom/Kconfig | 8 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock-x1e80100.c | 348 ++
3 files changed, 357 insertions
Add pinctrl driver for the TLMM block found in the X1E80100 SoC.
Signed-off-by: Neil Armstrong
---
drivers/pinctrl/qcom/Kconfig| 7 +++
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-x1e80100.c | 100
3 files changed
Enable the X1E80100 pinctrl driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index
ea0dd3e58018c8bf08e4a455a47e29cf1bbd3c60
Add support for TLMM in X1E80100, and enable it in qcom_defconfig
Signed-off-by: Neil Armstrong
---
Neil Armstrong (2):
pinctrl: qcom: Add X1E80100 pinctrl driver
qcom_defconfig: enable X1E80100 pinctrl driver
configs/qcom_defconfig | 1 +
drivers/pinctrl/qcom
;setenv dtb_index 1;" \
- "elif test $board_name = vim3; then " \
- "echo \" Reading DTB for vim3...\"; " \
- "setenv dtb_index 3;" \
"else " \
"echo Error: Android boot is not supported for $board_name; " \
"exit; " \
Acked-by: Neil Armstrong
.\"; " \
"setenv dtb_index 1;" \
- "elif test $board_name = vim3l; then " \
- "echo \" Reading DTB for vim3l...\"; " \
- "setenv dtb_index 2;" \
"elif test $board_name = vim3; then " \
"echo \" Reading DTB for vim3...\"; " \
"setenv dtb_index 3;" \
Acked-by: Neil Armstrong
;Error: %s: iommus property not found or wrong number of
cells\n",
__func__);
return -EINVAL;
}
Reviewed-by: Neil Armstrong
pr_fmt(fmt) "QCOM: " fmt
+
#include
#include
#include
#include
@@ -28,8 +30,9 @@
#include
#include
#include
#include
+#include
#include "qcom-priv.h"
DECLARE_GLOBAL_DATA_PTR;
Reviewed-by: Neil Armstrong
/* Read SMMU config */
val = gr0_readl(priv, ARM_SMMU_GR0_ID0);
priv->num_smr = FIELD_GET(ARM_SMMU_ID0_NUMSMRG, val);
Reviewed-by: Neil Armstrong
Hi Tom,
Here's a small fix for khadas-vim3{l} android config, and a drop of
obsolete dtsi and include bindings in favor or the upstream ones.
Thanks,
Neil
The following changes since commit 56accc56b9aab87ef4809ccc588e1257969cd271:
bios_emulator: fix first argument of pci_{read,write}_config
From: Neil Armstrong
Hi,
On Tue, 12 Nov 2024 15:58:32 +0300, Alexey Romanov wrote:
> We should remove bindings and dtsi from include/ folder for A1
> and AXG Amlogic devices. We have exactly the same, or with minor
> differences in dts/upstream folder.
>
> I tested this cha
On 13/11/2024 15:40, Heinrich Schuchardt wrote:
Am 13. November 2024 14:32:57 MEZ schrieb Neil Armstrong
:
On 13/11/2024 05:22, Caleb Connolly wrote:
Add a small utility for displaying some information about U-Boot and the
hardware it's running on in a similar fashion to the popular neo
INERS
@@ -1724,8 +1724,13 @@ M: Heiko Schocher
S:Maintained
T:git https://source.denx.de/u-boot/custodians/u-boot-ubi.git
F:drivers/mtd/ubi/
+UFETCH
+M: Caleb Connolly
+S: Maintained
+F: cmd/ufetch.c
+
UFS
M: Neil Armstrong
M:Bhupesh Sharma
Hi,
On Thu, 17 Oct 2024 18:10:24 +0200, Guillaume La Roque wrote:
> Actually bootmethod android only support android boot image version 4
> and with AB image, some old platform wtill use android boot image
> version 2 with AB or without AB slot.
>
> This patchset add support of both version 2 and
On 08/11/2024 11:05, Mattijs Korpershoek wrote:
Hi Neil,
On jeu., oct. 17, 2024 at 18:10, Guillaume La Roque
wrote:
After increase boot and recovery partition userdata was not resize.
so on VIM3 16GB and VIM3L `fastboot oem format` or `gpt write mmc 2
$partitions` fail because end of last pa
Hi Caleb,
On 16/10/2024 11:16, Neil Armstrong wrote:
The qcom_pmic code is broken for new PMICs and should be fixed,
without the QUIRK the code is broken and the GPIOs don't work
anymore on SM8550 and SM8650 platforms.
Partially revert the revert and only add the quirk on the PM8550
On 24/10/2024 15:11, Caleb Connolly wrote:
Hi Neil,
On 16/10/2024 11:17, Neil Armstrong wrote:
On earlier platforms, the vqmmc regulator was enabled by the
previous bootloader, but on the newest (SM8650) it's not
and we need vqmmc to be enabled in order to have the card
to respond.
gion(lmb_rgn_lst, base, size);
- if (ret)
+ if (ret < 0)
return ret;
if (lmb_should_notify(LMB_NONE))
return lmb_map_update_notify(base, size, MAP_OP_ADD);
Tested-by: Neil Armstrong
Thanks !
Neil
dr_mode device tree helper")
https://github.com/torvalds/linux/commit/a45c82b84c844cd85b2ed1aa32596f1bffa32716
Reviewed-by: Caleb Connolly
Signed-off-by: Neil Armstrong
---
Changes in v2:
- add ref to linux behaviour
- Link to v1:
https://lore.kernel.org/r/20241016-topic-usb-dwc3-d
On 17/10/2024 15:52, Marek Vasut wrote:
On 10/17/24 1:07 PM, Caleb Connolly wrote:
On 16/10/2024 10:26, Neil Armstrong via groups.io wrote:
The USB DRD bindingsa at [1] are clear, if not specified the dr_mode
property defaults to otg, and this is how Linux behaves.
I guess this is (kind of
eader version 3 and later, the ramdisk
can't be used in-place to use ramdisk_addr_r in this case.
Signed-off-by: Neil Armstrong
---
boot/image-android.c | 38 ++
1 file changed, 30 insertions(+), 8 deletions(-)
diff --git a/boot/image-android.c b/boot/image
.
Signed-off-by: Neil Armstrong
---
boot/image-android.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/boot/image-android.c b/boot/image-android.c
index
bb5f4f84487d40e0cf24dc3b57042993967e66d5..3adcc69a392f74ae64f3fbcf1b85204f60ac9aff
100644
--- a/boot
When booting with platforms having > 4GiB of memory,
the kernel physical address can be more than 32bits.
Use ulong like all the other addresses, and fix the
print to show the > 32bits address numbers.
Signed-off-by: Neil Armstrong
---
boot/image-android.c| 4 ++--
include/android_i
e kernel.
Finally, the ramdisk also uses a default load address, and
it should be taken in account like for the kernel address.
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Fix patch 2 prefix
- Fix patch 3 commit msg
- Fix patch 3 behavior when using boot image header version > 2, use th
On 17/10/2024 15:19, Caleb Connolly wrote:
On 14/10/2024 08:53, Neil Armstrong wrote:
On 12/10/2024 15:57, Caleb Connolly wrote:
Enable all the necessary options for capsule updates to work, as well as
a few additional EFI features.
Capsule updates themselves are only enabled for the RB3
On 17/10/2024 14:14, Mattijs Korpershoek wrote:
On jeu., oct. 17, 2024 at 14:07, Mattijs Korpershoek
wrote:
Hi Neil,
On jeu., oct. 17, 2024 at 14:01, Neil Armstrong
wrote:
On 17/10/2024 13:58, Mattijs Korpershoek wrote:
Hi Neil,
On jeu., oct. 17, 2024 at 13:33, Mattijs Korpershoek
On 17/10/2024 13:58, Mattijs Korpershoek wrote:
Hi Neil,
On jeu., oct. 17, 2024 at 13:33, Mattijs Korpershoek
wrote:
Hi Neil,
Thank you for the series.
On mer., oct. 16, 2024 at 17:46, Neil Armstrong
wrote:
When trying to use the Android boot image with header version 2
on recent
The SM8550 and SM8650 SoCs requires PINCONF to properly
setup SDC pins in order to function correctly.
Signed-off-by: Neil Armstrong
---
configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index
eader version 3 and later, the ramdisk can't be
used in-place to use ramdisk_addr_r in this case.
Signed-off-by: Neil Armstrong
---
boot/image-android.c | 36 +---
1 file changed, 29 insertions(+), 7 deletions(-)
diff --git a/boot/image-android.c b/boot/image
.
Signed-off-by: Neil Armstrong
---
boot/image-android.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/boot/image-android.c b/boot/image-android.c
index bb5f4f84487..3adcc69a392 100644
--- a/boot/image-android.c
+++ b/boot/image-android.c
@@ -208,7 +208,8
When booting with platforms having > 4GiB of memory,
the kernel physical address can be more than 32bits.
Use ulong like all the other addresses, and fix the
print to show the > 32bits address numbers.
Signed-off-by: Neil Armstrong
---
boot/image-android.c| 4 ++--
include/android_i
e kernel.
Finally, the ramdisk also uses a default load address, and
it should be taken in account like for the kernel address.
Signed-off-by: Neil Armstrong
---
Neil Armstrong (3):
image: android: use ulong for kernel address
boot: image-android: do not boot XIP when kernel is co
Hi,
On 16/10/2024 13:22, Marek Vasut wrote:
On 10/16/24 10:26 AM, Neil Armstrong wrote:
The USB DRD bindingsa at [1] are clear, if not specified the dr_mode
property defaults to otg, and this is how Linux behaves.
A cleanup is ongoing on the Linux Device Trees to remove dr_mode when
set to
Fastboot is very hungry when it flashes larges chunks, and 8MiB
is way too small, allocate a much bigger size like other platforms
using Fastboot.
Signed-off-by: Neil Armstrong
---
arch/arm/mach-snapdragon/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-snapdragon
On earlier platforms, the vqmmc regulator was enabled by the
previous bootloader, but on the newest (SM8650) it's not
and we need vqmmc to be enabled in order to have the card
to respond.
Signed-off-by: Neil Armstrong
---
drivers/mmc/msm_sdhci.c | 12
1 file changed, 12 inser
igned-off-by: Neil Armstrong
---
drivers/gpio/qcom_pmic_gpio.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
index f2ef4e5ce14..cd9f3926ac4 100644
--- a/drivers/gpio/qcom_pmic_gpio.c
+++ b/dr
pecified in the glue or dwc3 node.
[1]
https://www.kernel.org/doc/Documentation/devicetree/bindings/usb/usb-drd.yaml
Signed-off-by: Neil Armstrong
---
drivers/usb/dwc3/dwc3-generic.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/d
The ufsphy_v2_regs_layout is not used, drop it and fix:
phy-qcom-qmp-ufs.c:87:27: warning: ‘ufsphy_v2_regs_layout’ defined but not used
[-Wunused-const-variable=]
Signed-off-by: Neil Armstrong
---
drivers/phy/qcom/phy-qcom-qmp-ufs.c | 6 --
1 file changed, 6 deletions(-)
diff --git a
The upstream version has new defines use to build DT, drop
it in favor of the dts/upstream more recent one.
Signed-off-by: Neil Armstrong
---
include/dt-bindings/phy/phy-qcom-qmp.h | 20
1 file changed, 20 deletions(-)
diff --git a/include/dt-bindings/phy/phy-qcom-qmp.h
b
quot;qcom,sc7280-qmp-ufs-phy", .data =
(ulong)&sc7280_ufsphy_cfg, },
{ }
};
U_BOOT_DRIVER(qcom_qmp_ufs) = {
Reviewed-by: Neil Armstrong
Hi,
On 10/10/2024 09:31, Marek Behún wrote:
Hi all,
I am searching for HW that supports both USB host & USB device/gadget
mode, on the same USB port, capable of switching between these modes
at runtime.
Preferably supported in upstream kernel.
The following commercial dev boards support dual
= 1;
*blksz = ((uint64_t)pccb->pdata[8] << 56) |
((uint64_t)pccb->pdata[9] << 48) |
---
base-commit: 29e5dbc55c64c6450f066c55a5bc48bd1717aa1b
change-id: 20241014-fix-scsi-disksize-d73a017cadf4
Best regards,
Reviewed-by: Neil Armstrong
Tested-by: Neil Armstr
start'
ufs: Add Support for Qualcomm UFS HC driver
Marek Vasut (2):
ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS
ufs: Add UFSHCD_QUIRK_HIBERN_FASTAUTO
Neil Armstrong (9):
ufs: allocate descriptors with size aligned with DMA_MINALIGN
ufs: fix dcache flush and inva
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