Hi,
On 16.03.2014 11:42, armdev wrote:
Dear Michael,
Thanks for taking out time to extend help.
As per the RefManual the UART is taking the SCLK_UART Clock and as there are 4
channels (4 UARTS).
Following is from the public exynos 5250 manual
(http://www.samsung.com/global/business/semicondu
Hi,
On 14.03.2014 09:04, armdev wrote:
Hi,
We are trying to enable the UART3 on COM18 pins of arndale board. The UART3 RXD
and TXD are on pins 2 and 4 which as per the base board specification is
connected as
XuRXD3 : UART_3_RXD/GPA1[4] : 2
XuTXD3 : UART_3_TXD/GPA1[5] : 4
As per the public
e in the same place of the
memory, what obviously means impossibility to use the JFFS2 partition.
This problem is fixed in this patch by including sector size calculation in
non-CONFIG_JFFS2_CMDLINE mtdparts_init variant.
Signed-off-by: Tomasz Figa
---
diff --git a/common/cmd_jffs2.c b/common/c
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