S6E63M0 panel driver
> video: bridge: add Samsung CMC623 image converter driver
> video: backlight: add Samsung CMC623 backlight PWM driver
>
> Svyatoslav Ryhel (1):
> video: tegra: parametrize PCLK and DE polarity
>
> arch/arm/include/asm/arch-tegra/dc.h | 3 +
>
cmc623_backlight.c | 124 +++
> 3 files changed, 132 insertions(+)
> create mode 100644 drivers/video/cmc623_backlight.c
>
Reviewed-by: Svyatoslav Ryhel
eo/bridge/Kconfig | 8 ++
> drivers/video/bridge/Makefile | 1 +
> drivers/video/bridge/cmc623.c | 234 ++
> 3 files changed, 243 insertions(+)
> create mode 100644 drivers/video/bridge/cmc623.c
>
Reviewed-by: Svyatoslav Ryhel
8 +
> drivers/video/Makefile | 1 +
> drivers/video/samsung-s6e63m0.c | 393
> 3 files changed, 402 insertions(+)
> create mode 100644 drivers/video/samsung-s6e63m0.c
>
Reviewed-by: Svyatoslav Ryhel
| 9 ++
> drivers/video/Makefile | 1 +
> drivers/video/sony-l4f00430t01.c | 210 +++
> 3 files changed, 220 insertions(+)
> create mode 100644 drivers/video/sony-l4f00430t01.c
>
Reviewed-by: Svyatoslav Ryhel
4 board/samsung/n1/MAINTAINERS
> create mode 100644 board/samsung/n1/bose.config
> create mode 100644 board/samsung/n1/n1.env
> create mode 100644 configs/n1_defconfig
> create mode 100644 doc/board/samsung/n1.rst
>
Reviewed-by: Svyatoslav Ryhel
Applied to u-boot-tegra/staging, thank you!
slight differences in storage size (16GB/32GB) and presence
of built-in cellular modem.
Tested-by: Raffaele Tranquillini
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/Makefile |1 +
arch/arm/dts/tegra30-pegatron-chagall.dts | 1291 +
arch/arm/mach
Add support for Pegatron Chagall Tegra 3 tablet.
Svyatoslav Ryhel (1):
board: chagall: add Pegatron Chagall support
arch/arm/dts/Makefile |1 +
arch/arm/dts/tegra30-pegatron-chagall.dts | 1291 +
arch/arm/mach-tegra/tegra30/Kconfig |5
From: Ion Agorria
Previously software based AES encryption was used with previously known
device specific keys (SBK), now that we have AES driver we can simply
delegate this to the engine without prior knowledge of the key (assuming
it is still loaded).
Signed-off-by: Ion Agorria
---
arch/arm/
From: Ion Agorria
Add device tree nodes for BSEA and BSEV devices on Tegra20 and Tegra30.
Signed-off-by: Ion Agorria
---
arch/arm/dts/tegra20.dtsi | 29 +
arch/arm/dts/tegra30.dtsi | 29 +
2 files changed, 58 insertions(+)
diff --git a/a
From: Ion Agorria
Now that we have working AES engine driver we can request the warmboot code
to be encrypted and signed with SBK if the device requires so. This
unlocks LP0 support for most devices in the wild as they use ODM Production
Secure.
We are not aware of any "ODM Production Open" dev
From: Ion Agorria
Enable BSEV for devices that support u-boot self-upgrading feature.
Signed-off-by: Ion Agorria
---
arch/arm/dts/tegra20-acer-a500-picasso.dts | 4
arch/arm/dts/tegra20-asus-transformer.dtsi | 4
arch/arm/dts/tegra20-lg-star.dts| 4
arc
From: Ion Agorria
Move a set of helpers used in warmboot code to more appropriate AP and FUSE
locations.
Signed-off-by: Ion Agorria
---
arch/arm/include/asm/arch-tegra/ap.h | 7 ++
arch/arm/include/asm/arch-tegra/fuse.h | 21 ++
arch/arm/include/asm/arch-tegra/warmboot.h | 6 --
From: Ion Agorria
This driver allows using Tegra AES engines within BSEV and BSEA blocks to
encrypt and decrypt data using different AES algorithms.
One use case is allowing u-boot to self update by using the already loaded
AES key in the engine's SBK slot by the bootrom.
Particular care must b
Switch to HW AES engine of Tegra20/Tegra30 SoC for cryptographic
operations.
Ion Agorria (6):
ARM: tegra: Relocate fuse code from warmboot file
crypto: tegra: Add Tegra AES engine driver
ARM: tegra: Add LP0 support for ODM production
ARM: tegra: Add BSE bindings
ARM: tegra: Enable BSEV f
Create a basic test suit for AES DM uclass that covers all available
operations.
Signed-off-by: Svyatoslav Ryhel
---
arch/sandbox/dts/test.dts | 4 +++
configs/sandbox64_defconfig| 2 ++
configs/sandbox_defconfig | 2 ++
configs/sandbox_flattree_defconfig | 3
From: Ion Agorria
Create a basic framework for a group of devices that perform AES
cryptographic operations.
Signed-off-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
drivers/crypto/Kconfig | 2 +
drivers/crypto/Makefile | 1 +
drivers/crypto/aes/Kconfig | 5
From: Ion Agorria
This adds new aes subcommands to use interface provided by AES UCLASS which
can be used to expose HW AES engines.
Signed-off-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
cmd/aes.c | 275 ++
1 file changed, 255
Add uclass for HW AES cryptographic devices found on some devices, like
Tegra20/Tegra30 SoC AES engine.
Ion Agorria (3):
dm: crypto: Create AES uclass
crypto: aes: Add software AES DM driver
cmd: aes: Add support for DM AES drivers
Svyatoslav Ryhel (1):
test: dm: add AES engine test
From: Ion Agorria
This adds AES crypto engine using the AES Uclass implemented in software,
serves as example implementation and for uclass tests.
Those implementing HW AES crypto engine drivers can use this as basis and
replace software parts with the HW specifics of their device.
Signed-off-b
ans/u-boot-tegra.git staging
for you to fetch changes up to d5b9b7aa039b03e6de4b32cc961f7ec1205ded75:
ARM: tegra: drop CONFIG_DISABLE_SDMMC1_EARLY (2025-05-08 08:31:13 +0300)
----
Svyatoslav Ryhel (13):
gpio: tegra_gpio: implement rfree
This was a temporary workaround for the Tegra210 Jetson Nano board. It is
not used by any device anymore, so let's remove it.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-tegra/board2.c | 25 -
1 file changed, 25 deletions(-)
diff --git a/arch/arm/mach-tegra/b
Since most boards now use the same generic device config header, move its
setup to SoC Kconfig instead of setting SYS_CONFIG_NAME in each board's
Kconfig.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-tegra/Kconfig | 3 +++
board/acer/picasso/Kconfig
Wrap CFG_PRAM with Kconfig option.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-tegra/Kconfig | 14 ++
include/configs/tegra.h | 4
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 4690dcb3ea6..67bd2398bfd
Switch boards that use CFG_PRAM to TEGRA_PRAM.
Signed-off-by: Svyatoslav Ryhel
---
board/asus/transformer-t114/Kconfig | 6 +-
board/nvidia/tegratab/Kconfig | 6 +-
board/xiaomi/mocha/Kconfig | 6 +-
doc/board/asus/transformer_t114.rst | 2 +-
doc/board/nvidia
not needed anymore.
Svyatoslav Ryhel (4):
ARM: tegra: add PRAM Kconfig option
ARM: tegra: convert boards to use TEGRA_PRAM
ARM: tegra: set default SYS_CONFIG_NAME from SoC Kconfig
ARM: tegra: drop CONFIG_DISABLE_SDMMC1_EARLY
arch/arm/mach-tegra/Kconfig | 17
LG LH400WV3-SD04 is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD). The resolution of a 4" contains 480 x 800
pixels.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/Kconfig| 8 ++
drivers/video/Makefile | 1 +
drivers/video/lg-lh4
port.
Tested-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/tegra20-lg-star.dts| 538
arch/arm/mach-tegra/tegra20/Kconfig | 5 +
board/lg/star/Kconfig | 16 +
board/lg/star/MAINTA
Hitachi TX10D07VM0BAA is a color active matrix TFT (Thin Film Transistor)
liquid crystal display (LCD). The resolution of a 4" contains 480 x 800
pixels.
Tested-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/Kconfig | 8 +
drivers/video/Mak
Add support for Skyworks AAT2870 LED Backlight Driver and Multiple LDO
Lighting Management Unit. Only backlight is supported as for now. Supported
backlight level range is from 2 to 255 with step of 1.
Tested-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/Kconfig
Add support for 8-bit CPU driven (primary and secondary) display signal
interface found in Tegra 2 and Tegra 3 SoC.
Tested-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/include/asm/arch-tegra/dc.h | 48
drivers/video/tegra/Kconfig | 10 +
drivers/video/tegra
MAX8907 PMIC has embedded poweroff function used by some device to initiane
device power off. Implement it as optional sysreset driver guarded by
kconfig option and system-power-controller device tree property.
Tested-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
drivers/power/pmic
Added a new regulator driver for the MAXIM MAX8907 PMIC, providing
essential regulator functionalities and incorporated the necessary binding
framework within the core PMIC driver.
Tested-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
drivers/power/pmic/max8907.c| 29
Releasing a GPIO on Tegra necessitates changing its configuration to SFIO
to activate its special function. Without this reconfiguration, the special
function will be unavailable.
Signed-off-by: Svyatoslav Ryhel
---
drivers/gpio/tegra_gpio.c | 11 +++
1 file changed, 11 insertions
Add basic i2c based read/write functions to access PMIC registers.
Tested-by: Ion Agorria
Signed-off-by: Svyatoslav Ryhel
---
drivers/power/pmic/Kconfig | 9 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/max8907.c | 53
3 files changed
Add support for LG Optimus 2X P990 Tegra 2 device along with drivers for
PMIC complex, panels, video bridge and backlight led-controller found on
this device.
Svyatoslav Ryhel (9):
gpio: tegra_gpio: implement rfree operation
power: pmic: add the base MAX8907 PMIC support
power: regulator
wn/invalid pin/func configurations
ARM: tegra20: add funcmux for exposing UART over uSD slot on Tegra 20
Svyatoslav Ryhel (22):
spi: tegra20_slink: fix CS polarity setup
ARM: tegra: clock: take in account PLLD/D2 enable bit on clock_set_rate
ARM: tegra: clock: fix PLLD2
пн, 31 бер. 2025 р. о 08:42 Svyatoslav Ryhel пише:
>
> нд, 30 бер. 2025 р. о 22:27 Artur Kowalski пише:
> >
> > UART-A can be exposed through uSD, this was tested on Transformer T20
> > but should work on all Ventana-based boards.
> >
> > TX is exported on S
t;
> This change was manually tested on an rpi2 with postmarketOS added,
> using standard boot and also the 'bootz' command.
>
> Signed-off-by: Simon Glass
> Fixes: 47eda7e80ea ("boot: pxe: Use bootm_...() functions where possible")
> Reported-by: Svyatoslav
пн, 7 квіт. 2025 р. о 18:19 Simon Glass пише:
>
> Hi Svyatoslav,
>
> On Mon, 7 Apr 2025 at 08:43, Svyatoslav Ryhel wrote:
> >
> >
> > 07.04.25 4:53 пп, Tom Rini:
> > > On Mon, Apr 07, 2025 at 01:07:34PM +1200, Simon Glass wrote:
> > >> Hi Tom,
07.04.25 4:53 пп, Tom Rini:
On Mon, Apr 07, 2025 at 01:07:34PM +1200, Simon Glass wrote:
Hi Tom,
On Mon, 7 Apr 2025 at 10:48, Tom Rini wrote:
On Mon, Apr 07, 2025 at 09:12:32AM +1200, Simon Glass wrote:
Hi Tom,
On Sun, 6 Apr 2025 at 11:23, Tom Rini wrote:
On Sun, Apr 06, 2025 at 08:46:3
Ouya was added and tested right before this config option was added. Add it
to restore proper booting.
Fixes: d6a53f52 ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Svyatoslav Ryhel
---
configs/ouya_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/ouya
нд, 30 бер. 2025 р. о 22:12 Artur Kowalski пише:
>
> Tegra20 driver doesn't know about some pin configurations and even about
> some pins. In case when pin configuration is unknown the pin would be
> muxed to whatever is under function 0, in case when pin itself is
> unknown, it could cause out-of
The LM3532 is a 500-kHz fixed frequency asynchronous boost converter which
provides the power for 3 high-voltage, low-side current sinks. The device
is programmable over an I2C-compatible interface and has independent
current control for all three channels.
Signed-off-by: Svyatoslav Ryhel
| 3 +++
> drivers/pinctrl/tegra/funcmux-tegra20.c | 9 -
> 4 files changed, 14 insertions(+), 1 deletion(-)
>
Reviewed-by: Svyatoslav Ryhel
ith a microSDXC card giving up to 64 GB of additional
storage.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/Makefile |1 +
arch/arm/dts/tegra114-nvidia-tegratab.dts | 1041 +
arch/arm/mach-tegra/tegra114/Kconfig |5 +
board/nvidia/tegratab/Kc
. Transformers (t114) board derives from Nvidia Macallan
development board.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/Makefile |1 +
arch/arm/dts/tegra114-asus-tf701t.dts | 1245 +
arch/arm/mach-tegra/tegra114/Kconfig |5
driver handles DISP* configuration.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-tegra/tegra114/clock.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-tegra/tegra114/clock.c
b/arch/arm/mach-tegra/tegra114/clock.c
index d5cc8ac44dd..d67d808b724 100644
--- a/arch/arm/mach-tegra
Add support for Asus TF701T and Nvidia Tegratab Tegra 4 devices.
---
Changes in v2:
- upgraded to comply latest video and device header changes
- fixed chainloading fail due to T114 clock issue
---
Svyatoslav Ryhel (3):
ARM: tegra114: clock: avoid touching DISP clocks on init
board: asus
нд, 30 бер. 2025 р. о 22:12 Artur Kowalski пише:
>
> Tegra20 driver doesn't know about some pin configurations and even about
> some pins. In case when pin configuration is unknown the pin would be
> muxed to whatever is under function 0, in case when pin itself is
> unknown, it could cause out-of
Convert CFG_TEGRA_BOARD_STRING into Kconfig option and move it into device
board Kconfig.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-tegra/board2.c | 2 +-
board/acer/picasso/Kconfig | 4
board/asus/grouper/Kconfig | 4
board/asus
Most device headers contain SoC specific part and common Tegra post part.
Add a generic header which can be used by any Tegra device of one of the
supported SoC generations (T20, T30, T114, T124 or T210) without need in
device specific configuration.
Signed-off-by: Svyatoslav Ryhel
---
board
Link CFG_SYS_NS16550_COM1 value to chosen CONFIG_TEGRA_ENABLE_UART Tegra
wide. Remove all CFG_SYS_NS16550_COM1 from device headers.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-tegra/board.c | 5 +
include/configs/apalis-tk1.h | 3 ---
include/configs/apalis_t30.h | 1
board needs some specific configuration)
Svyatoslav Ryhel (3):
ARM: tegra: board: set CFG_SYS_NS16550_COM1 according to
TEGRA_ENABLE_UART
ARM: tegra: convert CFG_TEGRA_BOARD_STRING into Kconfig option
ARM: tegra: replace per-device config headers with generic Tegra
arch/arm/mach-tegra
вт, 1 квіт. 2025 р. о 18:38 Svyatoslav Ryhel пише:
>
> GPIO reset and power-off functionality depends on device tree data, which
> is often absent in SPL or TPL. To address this, incorporate PHASE_ into the
> config and add Kconfig option for each phase.
>
> Adjust SYSRESET_GPIO
: Svyatoslav Ryhel
---
board/sifive/unleashed/Kconfig | 1 +
board/sifive/unmatched/Kconfig | 1 +
configs/ge_b1x5v2_defconfig | 1 +
configs/microblaze-generic_defconfig | 1 +
drivers/sysreset/Kconfig | 45
drivers/sysreset/Makefile
GPIO reset and power-off functionality depends on device tree data, which
is often absent in SPL or TPL.
---
Changes in v2:
- added Kconfig option of GPIO reset and poweroff for each phase
- adjust uses of SYSRESET_GPIO and POWEROFF_GPIO in different stages
---
Svyatoslav Ryhel (1):
sysreset
вт, 1 квіт. 2025 р. о 16:34 Artur Kowalski пише:
>
>
> W dniu 31.03.2025 o 07:51, Svyatoslav Ryhel pisze:
> > нд, 30 бер. 2025 р. о 22:27 Artur Kowalski пише:
> >> Tegra20 has mux allowing to repurpose microSD as UART on boards which
> >> use s
вт, 1 квіт. 2025 р. о 16:30 Artur Kowalski пише:
>
>
> W dniu 31.03.2025 o 07:48, Svyatoslav Ryhel pisze:
> > нд, 30 бер. 2025 р. о 22:27 Artur Kowalski пише:
> >> If debug UART is set to anything other than UARTD, U-Boot's SPL hangs
> >> trying to commu
пн, 31 бер. 2025 р. о 13:31 Quentin Schulz пише:
>
> On 3/31/25 12:27 PM, Svyatoslav Ryhel wrote:
> > пн, 31 бер. 2025 р. о 13:16 Quentin Schulz пише:
> >>
> >> Hi Svyatoslav,
> >>
> >> On 3/30/25 11:28 AM, Svyatoslav Ryhel wrote:
> >>&
пн, 31 бер. 2025 р. о 13:16 Quentin Schulz пише:
>
> Hi Svyatoslav,
>
> On 3/30/25 11:28 AM, Svyatoslav Ryhel wrote:
> > GPIO reset and power-off functionality depends on device tree data, which
> > is often absent in SPL or TPL. To address this, incorporate PHASE_ in
нд, 30 бер. 2025 р. о 22:30 Artur Kowalski пише:
>
> W dniu 25.03.2025 o 08:14, Svyatoslav Ryhel pisze:
>
> пн, 24 бер. 2025 р. о 22:01 Artur Kowalski пише:
>
> Hello
>
> Thanks for quick response. I know UARTD is the dedicated UART for
> debugging on TF101, but exposi
нд, 30 бер. 2025 р. о 22:27 Artur Kowalski пише:
>
> Tegra20 has mux allowing to repurpose microSD as UART on boards which
> use sdmmc3 controller for microSD. Add TEGRA_UARTA_MICROSD to enable
> this feature. It is currently supported on Transformer T20, support for
> other boards may require Dev
нд, 30 бер. 2025 р. о 22:27 Artur Kowalski пише:
>
> If debug UART is set to anything other than UARTD, U-Boot's SPL hangs
> trying to communicate with UARTD which clock won't be ungated. With this
> patch it is possible to boot with UARTA enabled.
>
> Signed-off-by: Artur Kowalski
> ---
>
> (no
ans/u-boot-tegra.git fixes
for you to fetch changes up to 5c0f34a0c9ea2fb34d608a5adb6632230b1c273c:
configs: mocha: add missing SPL_HAVE_INIT_STACK option (2025-03-30 11:16:47
+0300)
----
Svyatoslav Ryhel (2):
configs: ouya: a
Fix DC and DSI config names to reflect more generic nature of existing
Tegra video drivers.
Signed-off-by: Svyatoslav Ryhel
---
board/toradex/colibri_t20/colibri_t20.c | 2 +-
configs/endeavoru_defconfig | 2 +-
configs/grouper_defconfig | 2 +-
configs
Existing Tegra30 DSI configuration is fully compatible with Tegra20.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/tegra20/tegra-dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/tegra20/tegra-dsi.c
b/drivers/video/tegra20/tegra-dsi.c
index a2a22fa0fe2..a96fba01ee4
CPCAP has a dedicated interrupt for power button. Implement this to have
more input control over the devices.
Signed-off-by: Svyatoslav Ryhel
---
drivers/input/Kconfig | 6 ++
drivers/input/Makefile | 1 +
drivers/input/cpcap_pwrbutton.c | 134
s Kconfig description adjustments.
> Has the other series been merged to next? You should also put a note about
> dependencies etc.
>
Yes, prev series is already in the next.
> Generally for this the rename makes sense so:
> Reviewed-by: Peter Robinson
>
> Peter
>
> On Su
pixels (qHD). The devices originally ran on Android up to 2.3
(Gingerbread).
This patchset brings full support for both devices along with DM drivers
for special PMIC used in these devices, DSI panel, backlight and many more
staff already supported by exising U-Boot code.
Svyatoslav Ryhel (6
pixels (qHD). The devices originally ran on Android up to 2.3
(Gingerbread).
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/tegra20-motorola-daytona.dts | 9 +
arch/arm/dts/tegra20-motorola-mot.dtsi| 490 ++
arch/arm/dts
Add support for the LCD panel module used in Motorola Atrix 4G or Droid X2.
Exact panel vendor and model are unknown. The panel has a 540x960 (qHD)
resolution and uses 24 bit RGB per pixel.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/Kconfig | 10 ++
drivers/video/Makefile| 1
: Svyatoslav Ryhel
---
drivers/power/pmic/Kconfig | 10 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/cpcap.c | 90 ++
include/power/cpcap.h | 238
4 files changed, 339 insertions(+)
create mode 100644 drivers/power/pmic/cpcap.c
The driver provides regulator set/get voltage and enable/disable functions
for CPCAP PMIC.
Signed-off-by: Svyatoslav Ryhel
---
drivers/power/pmic/cpcap.c| 35 +++
drivers/power/regulator/Kconfig | 9 +
drivers/power/regulator/Makefile | 1 +
drivers/power
Since this set of drivers suports four Tegra SoC generations, lets name it
just 'tegra'.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/Kconfig | 2 +-
drivers/video/Makefile | 2 +-
drivers/video/{tegra20 => t
Dir name is enough.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/tegra/Makefile | 10 +-
.../{tegra-pwm-backlight.c => dc-pwm-backlight.c} | 2 +-
drivers/video/tegra/{tegra-dc.c => dc.c} | 2 +-
drivers/video/tegra/{tegra-dc.h =
Adjust driver names, configs and paths to better reflect generic support
of multiple Tegra SoC generations they provide.
Svyatoslav Ryhel (5):
video: tegra20: dsi: add Tegra20 support
video: rename tegra20 to tegra
video: move tegra124 into common tegra dir
video: tegra: drop prefix from
Place Tegra124 SOR and eDP implenetation into common Tegra driver folder
until it is integrated into existing setup.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/Kconfig| 8
drivers/video/Makefile | 1 -
drivers/video/tegra
Historically, PLLD2 mirrored PLLD's layout on Tegra30 and 114. However,
with the introduction of Tegra124, this changed. This layout alteration was
not considered, and it now requires a corrective action to prevent future
complications.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-
GPIO reset and power-off functionality depends on device tree data, which
is often absent in SPL or TPL. To address this, incorporate PHASE_ into the
config option.
Signed-off-by: Svyatoslav Ryhel
---
drivers/sysreset/Makefile | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
GPIO reset and power-off functionality depends on device tree data, which
is often absent in SPL or TPL. To address this, incorporate PHASE_ into the
config option.
Svyatoslav Ryhel (1):
sysreset: add PHASE_ to GPIO reset and poweroff configs
drivers/sysreset/Makefile | 4 ++--
1 file changed
PLLD and PLLD2 clocks possess a unique enable bit within their
miscellaneous register. Take this into account when using clock_set_rate
function.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/mach-tegra/clock.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-tegra/clock.c
Fix PLLD2 info table entry on Tegra124 and Tegra210 which unlike on
Tegra114 and lower does not match PLLD.
Take in account PLLD/D2 enable bit on clock_set_rate call. Those two
seems to be only which have this bit.
Svyatoslav Ryhel (2):
ARM: tegra: clock: take in account PLLD/D2 enable bit on
Add missing configuration of chip select polarity. Default polarity is LOW,
which satisfies most cases but some devices require HIGH polarity and will
not work.
Svyatoslav Ryhel (1):
spi: tegra20_slink: fix CS polarity setup
drivers/spi/tegra20_slink.c | 18 ++
1 file changed
Add missing configuration of chip select polarity. Default polarity is LOW,
which satisfies most cases but some devices require HIGH polarity and will
not work.
Signed-off-by: Svyatoslav Ryhel
---
drivers/spi/tegra20_slink.c | 18 ++
1 file changed, 18 insertions(+)
diff --git
Mocha was added and tested right before this config option was added. Add
it to restore proper booting.
Fixes: d6a53f52 ("spl: Add an SPL_HAVE_INIT_STACK option")
Signed-off-by: Svyatoslav Ryhel
---
configs/mocha_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Ouya and Mocha were added around the same time SPL_HAVE_INIT_STACK was
introduced by Simon and therefore do not include this config option. It is
critical to add it before any defconfig resync, since the SPL_STACK option
will then be removed.
Svyatoslav Ryhel (2):
configs: ouya: add missing
.de/u-boot/custodians/u-boot-tegra.git staging
for you to fetch changes up to 03f61b153965101f21783e8e6a1e5e86496598ff:
board: ouya: add Ouya Game Console support (2025-03-19 11:04:41 +0200)
----
Svyatoslav Ryhel (47):
video: tegra20:
ср, 26 бер. 2025 р. о 17:01 Miquel Raynal пише:
>
> There are already several helpers to find a udevice based on its
> position in a device tree, like getting a child or a node pointed by a
> phandle, but there was no support for graph endpoints, which are very
> common in display pipelines.
>
> A
. Thank you.
That is not mandatory if the rest of your patches are accepted.
Reviewed-by: Svyatoslav Ryhel
d, but patch similar
to yours which would reconfigure usd to uart for surface rt or p880
would be rejected.
> Also, today, after running U-Boot with debug enabled, I discovered some
> failed assertions in pinmux code probably
> caused by my changes, I will get that fixed before sending v2.
вт, 18 бер. 2025 р. о 10:31 Artur Kowalski пише:
>
>
> The first patch in the series brings general pinmux support for exposing
> UART over SDB/SDD pins on T20. The following patches bring support
> Transformer T20 allowing to enable UART over uSD by setting
>
> CONFIG_TEGRA_ENABLE_UARTA=y
> CONFI
пт, 14 бер. 2025 р. о 18:21 Tom Rini пише:
>
> On Fri, Mar 14, 2025 at 08:47:19AM +0200, Svyatoslav Ryhel wrote:
>
> > Since EDID only indicates supported standard timings, a large table with
> > detailed timing information is necessary, consuming significant space. To
&
Migrate dp501, tc358768 and ssd2825 to bridge UCLASS and OF graph.
Fix and improve power supply requests, handling clocks, gpios.
Clean up code a bit.
Svyatoslav Ryhel (13):
video: bridge: dp501: convert to video bridge UCLASS
video: bridge: tc358768: convert to video bridge UCLASS
video
Use DSI message flag to set correct speed mode for message transfer.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/tegra20/tegra-dsi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/video/tegra20/tegra-dsi.c
b/drivers/video/tegra20/tegra-dsi.c
index 3ce0d33e380..a2a22fa0fe2
.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/endeavoru-panel.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/video/endeavoru-panel.c b/drivers/video/endeavoru-panel.c
index d4ba4d8b6da..90f838ecc20 100644
--- a/drivers/video/endeavoru-panel.c
Establish the backlight as a DC display controller child.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/tegra20/tegra-pwm-backlight.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/video/tegra20/tegra-pwm-backlight.c
b/drivers/video/tegra20/tegra
Align TF700T bindings with existing upstream device trees. OF_UPSTREAM
migration is possible already but resulting size of binary exceeds maximum
allowed size with full size trees.
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/tegra30-asus-tf700t.dts | 96 +++-
1 file
Adjust pinctrl driver to better work with Tegra Linux device trees regards
lock, io-reset and open-drain properties. Fix pin and drive default values
and fix function naming mismatches on Tegra 2.
Svyatoslav Ryhel (4):
pinctrl: tegra: adjust default values of pins
pinctrl: tegra: adjust pin
---
Svyatoslav Ryhel (1):
board: ouya: add Ouya Game Console support
arch/arm/dts/Makefile |1 +
arch/arm/dts/tegra30-ouya.dts | 2063 +++
arch/arm/mach-tegra/tegra30/Kconfig |5 +
board/ouya/ouya/Kconfig | 12 +
board/ouya/ouya/MAINTAINERS
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