On 2024-12-19 07:55, J. Neuschäfer wrote:
On Wed, Dec 18, 2024 at 02:18:48PM -0500, Sinan Akman wrote:
Hi
On 2024-12-15 10:18, J. Neuschäfer via B4 Relay wrote:
From: "J. Neuschäfer"
Globals defined in headers can result in multiple-definition errors
while linking, if they are visi
On 2024-12-19 08:06, J. Neuschäfer wrote:
On Wed, Dec 18, 2024 at 02:20:21PM -0500, Sinan Akman wrote:
Hi
On 2024-12-15 10:18, J. Neuschäfer via B4 Relay wrote:
From: "J. Neuschäfer"
The mpc8xxx_gpio driver contains a workaround for certain chips
where the previously written state
onf.spcr |= SPCR_TBEN_MASK;
}
/*
Reviewed-by: Sinan Akman
Hi
On 2024-12-15 10:18, J. Neuschäfer via B4 Relay wrote:
From: "J. Neuschäfer"
Globals defined in headers can result in multiple-definition errors
while linking, if they are visible beyond the current translation unit.
Is this happening anywhere ? It seems you introduced this in your other
p
uct udevice *dev)
Reviewed-by: Sinan Akman
Hi
On 2024-12-15 10:18, J. Neuschäfer via B4 Relay wrote:
From: "J. Neuschäfer"
The mpc8xxx_gpio driver contains a workaround for certain chips
where the previously written state of outputs cannot be read back
from the GPIO data (GPDAT) register (MPC8572/MPC8536). This workaround
consists of tr
On 2024-06-17 8:16 a.m., Marek Mojík wrote:
On 6/7/24 1:32 AM, Sinan Akman wrote:
On 2024-06-06 12:33 p.m., Marek Mojík wrote:
From: Pali Rohár
This allows boards to fixup / overwrite DT model string when booting OS.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Mojík
---
board
Hi Marek
On 2022-07-25 11:06, Marek Behún wrote:
After a discussion with Tom Rini, we've agreed that I am going to take
over custodianship of the MPC85XX platform, since it seems other people
do not have necessary interest or time and getting things done over
there takes too long.
Since I a
m still away from my boards but in few weeks I will
take a deeper look at this. I need to run some test to see
and understand how this is all implemented.
Thanks for all the work you do for P2020.
Regards
Sinan Akman
e manuals and verify that the
register that the code checks did not exist in P2020. In this case
I believe you can simple exclude this check with #ifdef P2020 or
something to this effect.
Thanks
Sinan Akman
Hi Pali
On 2022-04-05 1:17 p.m., Pali Rohár wrote:
On Tuesday 05 April 2022 13:03:15 Sinan Akman wrote:
Hi Pali
On 2022-04-05 9:12 a.m., Pali Rohár wrote:
[...]
Just a quick question here. Do you changes not apply to
P2041 ?
Hello! I looked at mpc85xx boards which have +0x1000 in
/P2020RDB-PC_NAND_defconfig | 6 +-
configs/P2020RDB-PC_SDCARD_defconfig | 4 +-
configs/P2020RDB-PC_SPIFLASH_defconfig | 4 +-
Just a quick question here. Do you changes not apply to
P2041 ?
Best regards
Sinan Akman
configs/T1024RDB_NAND_defconfig
Hi Priyanka
On 2021-06-08 4:07 a.m., Priyanka Jain wrote:
Add "Priyanka Jain " as
MAINTAINER for p2041rdb board.
Signed-off-by: Priyanka Jain
---
board/freescale/p2041rdb/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/p2041rdb/MAINTAINERS
Hi Tom
On 2021-05-14 9:34 p.m., Tom Rini wrote:
Drop the MPC837XERDB_SLAVE configuration.
Cc: Sinan Akman
Signed-off-by: Tom Rini
Acked-by: Sinan Akman
Thanks
-- sinan
---
configs/MPC837XERDB_SLAVE_defconfig | 140
1 file changed, 140
Hi Jehoon
On 2020-04-03 7:59 p.m., Jaehoon Chung wrote:
HI,
On 4/4/20 6:36 AM, si...@writeme.com wrote:
From: Sinan Akman
I'm not sure but its subject is strange.
It's not only the converting to DM_MMC. you're adding mpc8397.dtb device-tree.
I think you don't add
c83xx, and other orphan boards. In
2015, Sinan Akman offered to maintain mpc83xx. The discussion didn't
yield any result.
I'll see what mpc83xx boards I still have access to. I can then offer to
run some tests regularly if some of those boards stay maintained.
Re
rectly with your BDI questions if you prefer.
Hope this helps
Regards
Sinan Akman
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p1_p2_rdb_pc
unmodified. I thought this way you could continue developing
the support for older boards without changing anything in
the current version so the potential risk would be lower.
Just my two cents ;)
Regards
Sinan Akman
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Hi Stefan
Stefan Roese wrote:
On 17.12.2015 19:07, Sinan Akman wrote:
Hi Robert
On 17/12/15 03:21 AM, Robert P. J. Day wrote:
i CCed alleged MPC83xx maintainer kim.phill...@freescale.com
yesterday on my patch, but that CC bounced with "unknown user" error,
is the
IK at this time (Kim is no
longer with FSL). I have a set of mpc83xx boards that I could test
out new patches for. I am cc'ing to Stefan as we discussed something
similar briefly sometimes ago.
Regards
Sinan Akman
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patch.
I only expressed my opinion on your view for u-boot's assumption
on supporting two ports. Please don't take it personal.
Regards
Sinan Akman
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h SATA and PCIe would not be significant. It is just that the
current
implementation has this limitation and there is already some timeline
for removing
these limitations.
Regards
Sinan Akman
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http:
| 17 +
include/configs/ls2080aqds.h | 18 +
include/configs/ls2080ardb.h | 18 +
6 files changed, 131 insertions(+)
Thanks for the update.
Reviewed-by: Sinan Akman
Regards
Sinan Akman
, then at the board level if SATA is not enabled
we don't use it, if it is
enabled we use it and use the same register values across all boards
with this SoC. That's all.
Regards
Sinan Akman
The features to
enable file system and commands can stay in board file as well.
York
Hi Yuan
On 01/12/15 03:36 AM, Yuantian Tang wrote:
Hi Sinan Akman,
Please see my explanation inline.
-Original Message-
From: Sinan Akman [mailto:si...@writeme.com]
Sent: Tuesday, December 01, 2015 3:24 PM
To: Tang Yuantian-B29983 ; Sun York-R58495
Cc: u-boot@lists.denx.de
Hi Yuan
On 01/12/15 01:41 AM, Yuantian Tang wrote:
Hi Sinan Akman,
-Original Message-
From: Sinan Akman [mailto:si...@writeme.com]
Sent: Tuesday, December 01, 2015 2:29 PM
To: Tang Yuantian-B29983 ; Sun York-R58495
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH v4] arm: Add
Hi Yuan
On 01/12/15 01:16 AM, Yuantian Tang wrote:
Hi Sinan Akman,
Please see my explanation inline.
-Original Message-
From: Sinan Akman [mailto:si...@writeme.com]
Sent: Tuesday, December 01, 2015 1:28 AM
To: Tang Yuantian-B29983 ; Sun York-R58495
Cc: u-boot@lists.denx.de
YS_SCSI_MAX_LUN1
+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+ CONFIG_SYS_SCSI_MAX_LUN)
+
/*
* IFC Definitions
*/
Also, isn't there SATA support in ls1043ardb ?
Regards
Sinan Akman
___
ter naming.
Regards
Sinan Akman
@@ -14,6 +14,41 @@
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
+/*
+ * This erratum requires setting a value to eddrtqcr1 to
+ * optimal the DDR performance.
+ */
+static void erratum_a008336(void)
+{
+ u32
nce parameters for DDR Controller.
+* The bit 25 is used for disable priorities within DDR.
+* This is a workaround because of the DDR are connected backwards
+* on Rev2.0.
Would this cause any problem with Rev1.0 ?
If it does, should we check the revision here.
Regards
them) if this helps us to maintain MPC83xx further.
BTW, I think you bcc'ed to Kim so he won't receive this message.
Thanks
Sinan Akman
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Hi Yuan
On 19/10/15 05:21 AM, Yao Yuan wrote:
Hi Sinan Akman,
Yes, I mean the Rev 1.0 silicon.
Sorry, I can't guarantee that there aren't any boards with Rev1.0 silicon are
in user's hands.
Because we have also delivery very little board with Rev1.0 silicon to
customer o
ort rev1.0 because no one will or possibly to
use rev1.0.
Just to make this clear, the boards we bought all show :
CPU: Freescale LayerScape LS1021E, Version: 1.0, (0x87081110)
When you mention "rev1.0 haven't delivery to the customer" are
you not referring to Rev 1.0 silicon ?
motive temperature grade (-40C to 125C) at 38C
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C: ready
DRAM: 2 GiB
PMIC: PFUZE100 ID=0x10
Flash: 32 MiB
NAND:
(hangs here)
Any ideas?
Now, is this before or after our recent reset revert ?
Regards
Sinan
Hi Fabio
On 08/10/15 04:29 PM, Fabio Estevam wrote:
Hi Sinan,
On Thu, Oct 8, 2015 at 5:25 PM, Sinan Akman wrote:
Now, is this before or after our recent reset revert ?
We ended up not doing the reset revert. I sent a patch adding a
specific ls102x reset instead, but this one has not
On 02/10/15 10:34 AM, Fabio Estevam wrote:
On Fri, Oct 2, 2015 at 11:21 AM, Sinan Akman wrote:
Tested-by: Sinan Akman
Thanks a lot for your help, Sinan!
You are very welcome Fabio. Let's take a cleaner look
at this for 2016.01 to consider all the mixed endian type
perip
an accessors? This
cannot be right?
I don't know if you've seen my earlier e-mail on this but I was
suggesting
to bring watchdog to DM and then consider endian type from dts to implement
it properly. Would this not ultimately be the right solution ?
Regards
Sinan Akman
Best r
et hang, introduce a reset_cpu() implementation that
is specific for ls102x, which accesses the watchdog WCR register in big-endian
format. All that is required to reset LS102x is to clear the SRS bit.
Reported-by: Sinan Akman
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/armv7/ls102xa/cpu.c | 21 +
time
out value so this should be irrelevant.
All we need is to clear the SRS bit, no need to set WCR_WDE
and no / service sequence. I tested this earlier I know
it works. So a correct patch for reset_cpu() for LS102x could be
a single line SRS bit clear via _be32 which is all what we are intend
e on with this revert if you all agree with
this.
Fabio, I will send you the test-by to your commit
but we will have to clean up this mini mess soon after :)
Thanks
Sinan Akman
The kernel driver also does the full write to the WCR register(like we
used to have prior to 623d96e89aca6)
ht
On 01/10/15 03:45 PM, Fabio Estevam wrote:
Hi Sinan,
On Thu, Oct 1, 2015 at 4:39 PM, Sinan Akman wrote:
Hi Fabio, I just wanted to point out that with this revert we don't only
break imx again
We are not breaking imx by doing the revert. The reset still works.
623d96e89aca64c2 app
On 01/10/15 03:38 PM, Fabio Estevam wrote:
On Thu, Oct 1, 2015 at 4:33 PM, Sinan Akman wrote:
Otavio, please note that the watchdog changes that are committed that we
are referring
to broke ls102x. So if you revert those as you suggest here you would have
ls102x working
again but it
nlike i.MX, LS1021 uses big-endian ordering for the watchdog
controller, which means we cannot use the little endian accessors.
Reported-by: Sinan Akman
Signed-off-by: Fabio Estevam
---
drivers/watchdog/imx_watchdog.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/driver
On 01/10/15 03:17 PM, Otavio Salvador wrote:
On Thu, Oct 1, 2015 at 4:14 PM, Tom Rini wrote:
On Thu, Oct 01, 2015 at 04:09:46PM -0300, Fabio Estevam wrote:
On Thu, Oct 1, 2015 at 12:19 PM, Sinan Akman wrote:
I took a further look at this. I believe this won't work as readw
wil
On 01/10/15 03:14 PM, Tom Rini wrote:
On Thu, Oct 01, 2015 at 04:09:46PM -0300, Fabio Estevam wrote:
On Thu, Oct 1, 2015 at 12:19 PM, Sinan Akman wrote:
I took a further look at this. I believe this won't work as readw
will now return the data in the wrong endianness. I think Wol
ration of wdog_rst, this will reset immediately
with 0x00 default WT value.
- or program the timeout and enable WDE so the board
resets after a longer timeout value if desired
Does this make sense to everyone ?
Regards
Sinan Akman
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Fabio Estevam wrote:
On Wed, Sep 30, 2015 at 3:56 PM, Fabio Estevam wrote:
On Wed, Sep 30, 2015 at 3:33 PM, Sinan Akman wrote:
Nope, AFAICS it doesn't make any difference.
Ok, the issue is due to endianness: on LS1021 the watchdog is
big-endian, so that's why we can't use
;
- clrsetbits_le16(&wdog->wcr, 0, WCR_WDE);
+ setbits_le16(&wdog->wcr, WCR_WDE);
writew(0x, &wdog->wsr);
writew(0x, &wdog->wsr); /* load minimum 1/2 second timeout */
Nope, AFAICS it doesn't make any dif
On 30/09/15 01:22 PM, Sinan Akman wrote:
Hi York
The board maintainer will take a look. Unfortunately she is on holiday
vacation.
Let me try to find someone else familiar with this board.
No worries, I will also bisect and see what's going on.
Just wanted to make sure I don&#
care. I'll take a look at in the coming
days.
Regards
Sinan Akman
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C) 4.8.1
GNU ld (GNU Binutils) 2.23.2
=> reset
resetting ...
Is anyone else seeing this ?
Regards
Sinan Akman
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Marek Vasut wrote:
On Wednesday, September 02, 2015 at 08:59:57 PM, Marek Vasut wrote:
On Wednesday, September 02, 2015 at 08:57:52 PM, Sinan Akman wrote:
On 02/09/15 10:18 AM, Dinh Nguyen wrote:
On 9/2/15 3:18 AM, Marek Vasut wrote:
On Wednesday, September 02, 2015 at 12:41:52 AM,
dingu
c: no boot mode left to try
### ERROR ### Please RESET the board ###
Not sure what I have missed.
Regards
Sinan Akman
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to address: 157_020Ch.
+*/
+ out_be32(&scfg->eddrtqcfg, 0x63b20002);
Same here.
+
+ /*
* Enable snoop requests and DVM message requests for
* Slave insterface S4 (A7 core cluster)
*/
Regards
Sinan Akman
__
* Enable snoop requests and DVM message requests for
* Slave insterface S4 (A7 core cluster)
*/
Regards
Sinan Akman
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ry with the most recent mainline u-boot and
we might be able to help you debug the issue a bit better.
Regards
Sinan Akman
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,
document the steps and provide some more info on your target hw.
Regards
Sinan Akman
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d I will be taking up on two boards now and I can
help out with some others (particularly for quick tests etc.)
if this proves to be helpful.
Hope this helps everyone.
Regards
Sinan Akman
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I'll sure pay more attention.
Regards
Sinan Akman
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mpc8308rdb.
I can take the maintainership as the current maintainers
haven't responded for some time. Please see my other e-mail.
Thanks
Sinan Akman
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Hi Tom
On 02/03/2015 03:24 PM, Sinan Akman wrote:
Tom Rini wrote:
On 02/03/2015 02:31 PM, Sinan Akman wrote:
Hi Tom
As per our discussion with Kim at IRC, could you please
pick this for rc2 :
http://u-boot.10912.n7.nabble.com/PATCH-mpc837xerdb-fix-Calling-hwconfig-without-a-buffer
mpc8308rdb
and will provide generic board support. I'll also take over
the maintainership of those boards if there is no response from
current maintainers by then.
Please give me a week or so to have all set up.
Thanks
Sinan Akman
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Tom Rini wrote:
On 02/03/2015 02:31 PM, Sinan Akman wrote:
Hi Tom
As per our discussion with Kim at IRC, could you please
pick this for rc2 :
http://u-boot.10912.n7.nabble.com/PATCH-mpc837xerdb-fix-Calling-hwconfig-without-a-buffer-warning-tp202599.html
OK, I've assigned to myse
g Kim each time or if
those mpc83xx board related patches could go through your
tree after sitting for comments in the m-l sometime. This
would make things a bit faster/simpler.
Kim is cc'ed, perhaps he can chime in as well.
Thanks
Sinan Akman
The merge window is now closed. I'
If you still access to this board you can
perhaps quickly enable the generic board support
and once my board arrives I can help to keep an
eye on the board further.
Thanks
Sinan Akman
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t since we are accessing SCFG registers directly
in the board specific files ?
Regards
Sinan Akman
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Signed-off-by: Sinan Akman
---
board/freescale/mpc837xerdb/mpc837xerdb.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c
b/board/freescale/mpc837xerdb/mpc837xerdb.c
index e0a1031..565f815 100644
--- a/board/freescale
Signed-off-by: Sinan Akman
Cc: Tom Rini
---
board/freescale/mpc837xerdb/MAINTAINERS |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc837xerdb/MAINTAINERS
b/board/freescale/mpc837xerdb/MAINTAINERS
index 8592a2c..81b4eed 100644
--- a/board/freescale
Hi Tom
On 06/24/2014 01:34 PM, Tom Rini wrote:
On Tue, Jun 24, 2014 at 01:13:06AM -0400, Sinan Akman wrote:
Hi Masahiro
Masahiro Yamada wrote:
Hi Sinan,
[...]
+Orphan powerpc mpc83xx- freescale
mpc837xerdb MPC837XERDB
I have this board and I
Signed-off-by: Sinan Akman
Cc: kim.phill...@freescale.com
---
include/configs/MPC837XERDB.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 8ed0f7c..88d5be0 100644
--- a/include/configs/MPC837XERDB.h
board?
Sure I'd be bappy if I could. I don't know what it takes
exactly and not sure if I would qualify.
If I don't, I can also help perhaps to another e300 maintainer
to extend his/her maintainership to this board.
Either way, I'd be happy to help.
27;ll continue to
be maintained. I just tested the ToT and it seems other than some minor
warnings and request to use generic-board it is not in a bad shape.
I can continue testing at each release and after there are related
patches. Would that help to have this board to be unorphaned ?
Thanks
On 06/29/2013 12:11 AM, Timur Tabi wrote:
On Fri, Jun 28, 2013 at 4:47 PM, Andy Fleming wrote:
Well, he hasn't been at Freescale for years, now, so that's not surprising.
It's not entirely clear to me whether that board is one we actively
support, but I suspect we can get away with maintenance
above.
Regards
Sinan Akman
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On 01/11/2013 02:41 AM, Waibel Georg wrote:
Hello,
i'm not sure if this is the right place for this question...however, here it is:
i'm using a BDI3000 to program uboot to the flash (Spansion S29GL512P) on a
MPC5200B base board. Erasing / Programming works fine as long as the flash
sectors ar
On 11/22/2012 08:33 PM, Fabio Estevam wrote:
Hi Sinan,
On Thu, Nov 22, 2012 at 7:43 PM, Sinan Akman wrote:
Hi Fabio
I just tried spi nor on fsl m28evk and see :
MX28EVK U-Boot > sf probe
SF: Unsupported manufacturer ff
Failed to initialize SPI flash at 2:0
This is wit
Hi Fabio
I just tried spi nor on fsl m28evk and see :
MX28EVK U-Boot > sf probe
SF: Unsupported manufacturer ff
Failed to initialize SPI flash at 2:0
This is with U-Boot 2012.10 and I included
#define CONFIG_SPI_FLASH_WINBOND in mx28evk.h.
I thought that used to work. I am not s
On 10/04/2012 03:49 PM, Eric Nelson wrote:
[..]
+
+static void setup_iomux_enet(void)
+{
+ gpio_direction_output(IMX_GPIO_NR(3, 23), 0);
+ gpio_direction_output(IMX_GPIO_NR(6, 30), 1);
+ gpio_direction_output(IMX_GPIO_NR(6, 25), 1);
+ gpio_direction_output(IMX_GPIO_NR(6, 2
On 10/04/2012 05:42 PM, Sinan Akman wrote:
On 10/04/2012 03:49 PM, Eric Nelson wrote:
[..]
+gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
+
+/* Need delay 10ms according to KSZ9021 spec */
+udelay(1000 * 10);
+gpio_set_value(IMX_GPIO_NR(3, 23), 1);
Don't you n
Hi Marek
On 09/24/2012 11:03 PM, Marek Vasut wrote:
That's because these ancient (and crap ... everything between 4.2 and 4.6 was
quite crap on arm) toolchains don't generate unaligned string starts in .rodata
. New toolchains do, yet I have no idea how to fix it ... probably Albert might
kno
On 09/24/2012 08:42 PM, Eric Nelson wrote:
On 09/24/2012 05:22 PM, Tom Rini wrote:
On Mon, Sep 24, 2012 at 09:03:27PM -0300, Fabio Estevam wrote:
On Wed, Sep 19, 2012 at 5:20 PM, Tom Rini wrote:
I lmgtfy.com'd Marek, but for everyone,
http://lists.denx.de/pipermail/u-boot/2012-July/127260.ht
Sharath Kurudi wrote:
> HI,
> I am new to U boot. I am trying to port a custom board with 8308
> processor, Uboot code is stored on a NOR flash. I am able to program the NOR
> flash. I am using a BDI programmer to program the UBOOT.
Can you send all what you see in the BDI telnet command li
Charles Krinke wrote:
> I have inherited a MPC8323ERDB project and when I connect my BDI to it, I
> get to this point when the target is turned on.
>
> CPU: e300c2, MPC8323E, Rev: 1.1 at 333.333 MHz, CSB: 133.333 MHz
> Econolite Control Products ASC/4I2C: ready
> DRAM: 64 MB
> FLASH: 16 MB
Fischer, Sven wrote:
> Hi,
>
> I'm trying to get the NAND-Boot working.
Are you doing this MPC8536RDK (aka csb1880)
or for your custom design (or referring to
current implementation in MPC8536DS) ?
-- sinan
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