Hi,
> In message <[EMAIL PROTECTED]> you wrote:
>>
>> Interestingly enough, dcbst is a *data* cache store, run in the *icache*
>> flush routine. I assume this is intended to flush out any instructions
>> that are stuck in the dcache due to writes (self modifying code and/or
>> loaded/copied code)
Hi,
>From your experience, can some incomplete/incorrect U-Boot configuration
lead to MMU init failures inside Linux ?
Particularly, my Linux kernel fails during the first Data Cache Block Store
instruction (dcbst) of the MMU init and I ask myself if this cannot be linked
to my cache initializati
ot, you may get more help
with it.
I hope that this could help you. If not, just ignore, I just try to
give back the help I got there.
Good luck,
Rémi
On Tue, Sep 23, 2008 at 10:16 PM, Remi Lefevre <[EMAIL PROTECTED]> wrote:
> Hi Mike,
>
> I'm very new to Powerpc so take my words
> That is the critical issue: the PSDMR values. If all else fails, read the
> part number off a chip that is on your board and download the datasheet for
> *that* *exact* part number. Sometimes manufacturers upgrade their parts or
> hardware makes a "compatible" substitution and the timing is dif
Thank you very much for your clues as I'm stuck on this for almost a week.
[snip]
> Is this DIMM memory sticks with using SPD configuration or are the SDRAM
> chips soldered to the board?
They are soldered.
> Did you verify the SDRAM databook timing vs. what you configured your SDRAM
> controlle
Hello,
I ported U-Boot on my custom MPC8270 board.
Everything seems to go well but my ARP packets are malformed:
=> ping 192.168.0.1
Trying FCC1 ETHERNET
Using FCC1 ETHERNET device
sending ARP for c0a80001
ARP broadcast 1
cycles: 25 status: 6c00
ARP broadcast 2
cycles: 20 status: 6c00
ping failed
[sorry, message has been cut]
Could this be a timing issue ? I don't see much timing in ep82xxm code for
example. Or perhaps the MRW configuration is not enough to correctly
configure burst mode ? (Of course I'm also new in SDRAM init...)
Thanks for ELDK and U-Boot, they are really great.
Best
U-Boot 1.3.4 (Sep 12 2008 - 19:16:33)
MPC8270 Reset Status: External Soft, External Hard
MPC8270 Clock Configuration
- Bus-to-Core Mult 5x, VCO Div 2, 60x Bus Freq 20-60 , Core Freq 100-300
- dfbrg 0, corecnf 0x1b, busdf 6, cpmdf 1, plldf 0, pllmf 6, pcidf 3
- vco_out 583331000, s
x27;m missing ?
- Also, if you see obvious incompatibility between my mapping and
the Linux kernel, I would be glad to know it.
Best regards,
Rémi Lefevre
On Wed, Sep 10, 2008 at 9:20 PM, Remi Lefevre <[EMAIL PROTECTED]> wrote:
>
> My board has the following main characteristics:
> - 128 MB
Hi,
I try to port U-Boot 1.3.4 on a custom MPC8270 card.
I'm very new to PowerPC and U-Boot, I'm therefore a little
lost in the huge set of documentation and most likely have
silly questions.
My board has the following main characteristics:
- 128 MB SDRAM
- 32 MB Flash (4xAM29LV641) mapped at 0xF
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