> -Original Message-
> From: York Sun
> Sent: Tuesday, October 31, 2017 2:45 AM
> To: Mingkai Hu
> Cc: Shengzhou Liu ; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH 1/4] arm64: ls1043ardb: Add sd_bootcmd for
> distro fallback in case of sdboot
>
> On 10
> -Original Message-
> From: York Sun
> Sent: Tuesday, October 03, 2017 11:32 PM
> To: Xiaowei Bao ; Mingkai Hu
>
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH] Powerpc: Make pcie link state judge more specific
>
> On 09/24/2017 08:44 PM, Bao Xiaowei
> -Original Message-
> From: Bao Xiaowei [mailto:xiaowei@nxp.com]
> Sent: Monday, September 25, 2017 11:27 AM
> To: M.h. Lian ; Z.q. Hou ;
> Mingkai Hu ; York Sun ;
> hamish.mar...@alliedtelesis.co.nz; w...@denx.de;
> tony.obr...@alliedtelesis.co.nz; u-bo
> -Original Message-
> From: York Sun
> Sent: Friday, September 15, 2017 5:15 AM
> To: Joakim Tjernlund ; Mingkai Hu
> ; u-boot @ lists . denx . de ;
> Roy Zang
> Subject: Re: [PATCH] FSL PCI: Configure PCIe reference ratio
>
> On 09/12/2017 10:56 AM, Joaki
> -Original Message-
> From: York Sun
> Sent: Wednesday, September 06, 2017 11:37 PM
> To: Joakim Tjernlund ; Mingkai Hu
>
> Cc: Xiaowei Bao ; u-boot@lists.denx.de
> Subject: Re: FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up
>
> On 09/05/2017 04:08 AM,
> -Original Message-
> From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com]
> Sent: Thursday, September 07, 2017 2:55 PM
> To: Mingkai Hu ; Roy Zang ;
> York Sun
> Cc: u-boot@lists.denx.de
> Subject: Re: setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?
> -Original Message-
> From: Mingkai Hu
> Sent: Wednesday, September 06, 2017 5:37 PM
> To: 'Joakim Tjernlund' ; Roy Zang
> ; York Sun
> Cc: u-boot@lists.denx.de
> Subject: RE: setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?
>
>
>
> &g
> -Original Message-
> From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com]
> Sent: Tuesday, September 05, 2017 8:45 PM
> To: Mingkai Hu ; Roy Zang ;
> York Sun
> Cc: u-boot@lists.denx.de
> Subject: Re: setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Tuesday, April 25, 2017 11:40 PM
> To: u-boot@lists.denx.de
> Cc: Mingkai Hu ; york sun
> Subject: [PATCH 1/2] armv8: ls1046ardb: Make NET independent of FMan
>
> This allows using PCIe N
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Tuesday, April 25, 2017 11:40 PM
> To: u-boot@lists.denx.de
> Cc: Mingkai Hu ; york sun
> Subject: [PATCH 2/2] armv8: ls1043ardb: Make NET independent of FMan
>
> This allows using PCIe N
>
> -Original Message-
> From: york sun
> Sent: Wednesday, March 22, 2017 3:13 AM
> To: Mingkai Hu
> Cc: Prabhakar Kushwaha ; u-
> b...@lists.denx.de
> Subject: Please separated FMan from generate NET config
>
> Mingkai,
>
> I noticed during recen
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: Tuesday, March 28, 2017 1:57 AM
> To: york sun
> Cc: Jagan Teki ; u-boot@lists.denx.de; Mingkai Hu
>
> Subject: Re: [U-Boot] sf: Remove spansion_s25fss_disable_4KB_erase
>
> On
> -Original Message-
> From: york sun
> Sent: Friday, December 02, 2016 1:24 AM
> To: Mingkai Hu
> Cc: Chris Packham ; Tony O'Brien
> ; u-boot
> Subject: Re: [U-Boot] [PATCH] mpc85xx: pci: Implement workaround for
> Erratum A007815
>
> On 11/30
> -Original Message-
> From: york sun
> Sent: Tuesday, October 25, 2016 12:15 AM
> To: Prabhakar Kushwaha ; Pratiyush
> Srivastava ; u-boot@lists.denx.de; Mingkai
> Hu
> Cc: Hou Zhiqiang
> Subject: Re: [PATCH] armv8/ls1043a: Add the OCRAM initialization
>
> -Original Message-
> From: york sun
> Sent: Saturday, September 17, 2016 4:14 AM
> To: Q.Y. Gong ; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Mingkai Hu
> ; S.H. Xie ; Z.Q. Hou
> ; Wenbin Song ;
> Shengzhou Liu
> Subject: Re: [Patch v6 8/9] armv8: ls104
> -Original Message-
> From: york sun
> Sent: Friday, August 26, 2016 11:00 PM
> To: Qianyu Gong ; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Mingkai Hu
> ; Shaohui Xie ; Zhiqiang Hou
> ; Wenbin Song
> Subject: Re: [PATCH 1/8] drivers/ddr/fsl: add DEBUG_38
> -Original Message-
> From: york sun
> Sent: Friday, August 26, 2016 11:01 PM
> To: Qianyu Gong ; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Mingkai Hu
> ; Shaohui Xie ; Zhiqiang Hou
> ; Wenbin Song
> Subject: Re: [PATCH 3/8] armv8: fsl-layerscape: Incr
> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Friday, August 26, 2016 7:29 PM
> To: u-boot@lists.denx.de; york sun
> Cc: Prabhakar Kushwaha ; Mingkai Hu
> ; Shaohui Xie ; Zhiqiang Hou
> ; Wenbin Song ; Mingkai
> Hu ; Qianyu Gon
> -Original Message-
> From: Shengzhou Liu
> Sent: Monday, August 29, 2016 6:53 PM
> To: Qianyu Gong ; u-boot@lists.denx.de; york sun
>
> Cc: Prabhakar Kushwaha ; Mingkai Hu
> ; Shaohui Xie ; Zhiqiang Hou
> ; Wenbin Song ; Qianyu
> Gong
> Subject: RE: [PAT
> -Original Message-
> From: Shaohui Xie
> Sent: Monday, August 29, 2016 12:45 PM
> To: york sun ; Qianyu Gong ;
> u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Mingkai Hu
> ; Zhiqiang Hou ; Wenbin
> Song
> Subject: RE: [PATCH 7/8] armv8: ls1046
> -Original Message-
> From: Edward L Swarthout
> Sent: Saturday, July 02, 2016 5:44 AM
> To: Prabhakar Kushwaha; york sun; Qianyu Gong; albert.u.b...@aribaud.net;
> u-boot@lists.denx.de; s.temerkha...@gmail.com;
> yamada.masah...@socionext.com
> Cc: Mingkai Hu
&
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: Friday, July 01, 2016 7:55 AM
> To: york sun; Qianyu Gong; albert.u.b...@aribaud.net; u-boot@lists.denx.de;
> s.temerkha...@gmail.com; yamada.masah...@socionext.com
> Cc: Mingkai Hu
> Subject: RE: [U-Boot]
From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
Sent: Thursday, June 30, 2016 2:50 PM
To: Qianyu Gong
Cc: Mingkai Hu; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
Subject: Re: [U-Boot] [PATCH] sf: set the Uniform Sector to CR3NV instead of
CR3V
Hi
On Jun 30, 2016 08:47
> -Original Message-
> From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> Sent: Thursday, June 30, 2016 3:47 PM
> To: Mingkai Hu
> Cc: Qianyu Gong; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
> Subject: Re: [U-Boot] [PATCH] sf: set the Unifo
> -Original Message-
> From: Michael Trimarchi [mailto:mich...@amarulasolutions.com]
> Sent: Thursday, June 30, 2016 3:33 PM
> To: Mingkai Hu
> Cc: Qianyu Gong; u-boot@lists.denx.de; Yunhui Cui; jt...@openedev.com
> Subject: Re: [U-Boot] [PATCH] sf: set the Unifo
> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Thursday, April 28, 2016 2:05 PM
> To: u-boot@lists.denx.de; york sun; o...@buserror.net
> Cc: Mingkai Hu; Qianyu Gong
> Subject: [Patch v2] fsl-layerscape: fdt: add IFC fixup if no IFC is a
Qianyu,
The reset command is used to boot from the location set in the hardware switch.
Regards,
Mingkai
> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Monday, April 25, 2016 4:39 PM
> To: u-boot@lists.denx.de; york sun; Mingkai Hu
>
From: Mingkai Hu
Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performance.
Signed-off-by: Mingkai Hu
---
v3:
- Move the macro check to soc.c.
v2:
- Add a check to make sure A009660 and A008514 is are
From: Mingkai Hu
Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performance.
Signed-off-by: Mingkai Hu
---
v2:
- Add a check to make sure A009660 and A008514 is are not both enabled.
- Add comment for the
> -Original Message-
> From: Zhao Qiang [mailto:qiang.z...@nxp.com]
> Sent: Friday, January 29, 2016 12:28 PM
> To: Mingkai Hu
> Cc: tr...@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao
> Subject: [PATCH v4 3/4] ls1043rdb: move USB mux config to
> config_bo
> -Original Message-
> From: Zhao Qiang [mailto:qiang.z...@nxp.com]
> Sent: Friday, January 29, 2016 12:28 PM
> To: Mingkai Hu
> Cc: tr...@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao
> Subject: [PATCH v4 4/4] qe: assgin pins to qe-hdlc
>
> qe-hdlc an
> -Original Message-
> From: Zhao Qiang [mailto:qiang.z...@nxp.com]
> Sent: Friday, January 29, 2016 12:28 PM
> To: Mingkai Hu
> Cc: tr...@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao
> Subject: [PATCH v4 2/4] QE: add QE support on ls1043ardb
>
>
> -Original Message-
> From: york sun
> Sent: Saturday, January 30, 2016 4:40 AM
> To: Mingkai Hu; u-boot@lists.denx.de
> Subject: Re: [PATCH] armv8/ls1043a: Implement workaround for erratum
> A009660
>
> On 01/25/2016 10:12 PM, Mingkai Hu wrote:
> >
> -Original Message-
> From: Zhao Qiang [mailto:qiang.z...@nxp.com]
> Sent: Friday, January 29, 2016 10:51 AM
> To: Mingkai Hu
> Cc: tr...@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao
> Subject: [PATCH v3 4/4] qe: assgin pins to qe-hdlc
>
> qe-hdlc an
> -Original Message-
> From: york sun
> Sent: Saturday, January 23, 2016 1:44 AM
> To: Mingkai Hu; Mingkai Hu; u-boot@lists.denx.de
> Subject: Re: [PATCH] armv8/ls1043a: Implement workaround for erratum
> A009660
>
> On 01/21/2016 11:50 PM, Mingkai Hu wrote:
&g
> -Original Message-
> From: Zhao Qiang [mailto:qiang.z...@nxp.com]
> Sent: Tuesday, January 26, 2016 9:20 AM
> To: Mingkai Hu
> Cc: tr...@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao
> Subject: [PATCH v2 3/3] QE: assgin pins to QE-HDLC
>
> qe-hdlc an
> -Original Message-
> From: Mingkai Hu
> Sent: Thursday, January 21, 2016 11:18 AM
> To: york sun; Mingkai Hu; u-boot@lists.denx.de
> Subject: RE: [PATCH] armv8/ls1043a: Implement workaround for erratum
> A009660
>
>
>
> > -Original Message
> -Original Message-
> From: york sun
> Sent: Thursday, January 21, 2016 12:21 AM
> To: Mingkai Hu; u-boot@lists.denx.de
> Cc: Mingkai Hu
> Subject: Re: [PATCH] armv8/ls1043a: Implement workaround for erratum
> A009660
>
> On 01/19/2016 10:44 PM, Mingkai Hu
From: Mingkai Hu
Memory controller performance is not optimal with default internal
target queue register value, write required value for optimal DDR
performance.
Signed-off-by: Mingkai Hu
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 13 +
arch/arm/include/asm/arch-fsl
> -Original Message-
> From: Wenbin Song [mailto:wenbin.s...@nxp.com]
> Sent: Tuesday, January 19, 2016 2:48 PM
> To: york...@freescale.com; Mingkai Hu; Qianyu Gong; Shaohui Xie; Wenbin
> Song; u-boot@lists.denx.de
> Cc: songwenbin
> Subject: [PATCH 3/4]
> -Original Message-
> From: Wenbin Song [mailto:wenbin.s...@nxp.com]
> Sent: Tuesday, January 19, 2016 2:48 PM
> To: york...@freescale.com; Mingkai Hu; Qianyu Gong; Shaohui Xie; Wenbin
> Song; u-boot@lists.denx.de
> Subject: [PATCH 1/4] armv8/ls1043aqds: added lpuart
For SD boot and NAND boot.
Signed-off-by: Mingkai Hu
---
board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg | 4 ++--
board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg
b
Signed-off-by: Mingkai Hu
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 83caa91..3869177 100644
Signed-off-by: Mingkai Hu
---
drivers/net/fm/ls1043.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c
index cf2cc95..93ba318 100644
--- a/drivers/net/fm/ls1043.c
+++ b/drivers/net/fm/ls1043.c
@@ -54,11 +54,8
Consecutive write transactions from core to PCI express outbound
path hangs after 25 to 30 transactions depending on core freq.
This erratum enable the mbist clock through COP register setting.
Signed-off-by: Mingkai Hu
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c| 16
For SD boot and NAND boot.
Signed-off-by: Mingkai Hu
---
board/freescale/ls1043aqds/ls1043aqds_rcw_nand.cfg | 4 ++--
board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/freescale/ls1043aqds
From: Shaohui Xie
This patch also expose the complete DDR region(s) to Linux.
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
---
arch/arm/include/asm/arch-fsl-layerscape/config.h | 4 ++--
board/freescale/ls1043ardb/ddr.c | 9 -
board/freescale/ls1043ardb
Signed-off-by: Mingkai Hu
---
drivers/net/e1000.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index d5d48b1..e816410 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -4980,8 +4980,8 @@ e1000_configure_tx
From: Po Liu
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu
Signed-off-by: Mingkai.Hu
---
board/freescale/c29xpcie/MAINTAINERS| 2 ++
configs/C29XPCIE_NOR_SECBOOT_defconfig | 4
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4
include
From: Po Liu
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu
Signed-off-by: Mingkai.Hu
---
configs/C29XPCIE_NOR_SECBOOT_defconfig | 4
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4
include/configs/C29XPCIE.h | 2 ++
3 files
From: Po Liu
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu
Signed-off-by: Mingkai.Hu
---
boards.cfg | 2 ++
include/configs/C29XPCIE.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/boards.cfg b/boards.cfg
index 853446c..b2328ec 100
From: Mingkai Hu
Enter 3 Byte address mode at first, because it may change to 4 Byte
address mode in kernel driver and not reset to 3 Byte address mode
after reboot.
Add clear flag status register operation that some Micron SPI flash
chips required after reading the flag status register to
From: Mingkai Hu
Enter 3 Byte address mode at first, because it may change to 4 Byte
address mode in kernel driver and not reset to 3 Byte address mode
after reboot.
Add clear flag status register operation that some Micron SPI flash
chips required after reading the flag status register to
From: Mingkai Hu
Calculate reserved fields according to IFC bank count
1. Move csor_ext register behind csor register and fix res offset
2. Move ifc bank count to config_mpc85xx.h to support 8 bank count
3. Guard fsl_ifc.h with CONFIG_FSL_IFC macro to eliminate the compile
error on some
To avoid sign extension problem, use explicit casting to cast
the SDRAM size to type phys_size_t, or else, if the SDRAM size
is 2G(0x8000), it will be extended to 0x8000
when phys_size_t is type 'unsigned long long'.
Signed-off-by: Mingkai Hu
---
Based on master bra
To avoid sign extension problem, use explicit casting to cast
the SDRAM size to type phys_size_t, or else, if the SDRAM size
is 2G(0x8000), it will be extended to 0x8000
when phys_size_t is type 'unsigned long long'.
Signed-off-by: Mingkai Hu
---
Based on master bra
, Or else,
the parameters of phys_addr_t type will be passed wrongly when
CONFIG_PHYS_64BIT is defined.
Signed-off-by: Mingkai Hu
---
Based on master branch of git://git.denx.de/u-boot.git
Also can apply direcly to git://www.denx.de/git/u-boot-mpc85xx.git
Tested on P2041RDB board.
common/cmd_sf.c
LAN8720 PHY is used on Freescale C2X0QDS board.
Signed-off-by: Mingkai Hu
diff --git a/include/config_phylib_all_drivers.h
b/include/config_phylib_all_drivers.h
index 1db7cec..12828c6 100644
--- a/include/config_phylib_all_drivers.h
+++ b/include/config_phylib_all_drivers.h
@@ -23,6 +23,7
Signed-off-by: Mingkai Hu
---
include/configs/P2041RDB.h | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 63c8123..918f1b9 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs
module
* I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu
---
v2:
- Fix some warning of checkpatch.pl, such as "line over 80 characters".
board/freescale/p2040rdb/Makefile | 56
board
module
* I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu
---
Based on
http://git.denx.de/?p=u-boot/u-boot-mpc85xx.git;a=shortlog;h=refs/heads/next
board/freescale/p2040rdb/Makefile | 56
board
Port from tsec.c file to add support for bcm5461, bcm5464, bcm5482s.
Signed-off-by: Mingkai Hu
---
drivers/net/fsl_phy.c | 245 +
drivers/net/fsl_phy.h | 22 +
2 files changed, 267 insertions(+), 0 deletions(-)
diff --git a/drivers/net
Port from tsec.c file to add support for vsc8221, vsc8211, vsc8601, vsc8641.
Signed-off-by: Mingkai Hu
---
drivers/net/fsl_phy.c | 119 +
drivers/net/fsl_phy.h | 21 +
2 files changed, 140 insertions(+), 0 deletions(-)
diff --git a
Also remove the PHY code which will be added by the
following patches.
Signed-off-by: Mingkai Hu
---
drivers/net/Makefile |2 +-
drivers/net/tsec.c | 1483 +++---
include/tsec.h | 246 +-
3 files changed, 70 insertions(+), 1661
Port from tsec.c file to add support for cis8201, cis8204, dm9161,
dp83865, ksz804, lxt971, rtl8211b.
Signed-off-by: Mingkai Hu
---
drivers/net/fsl_phy.c | 356 -
drivers/net/fsl_phy.h | 57
drivers/net/tsec.c| 24
3 files
Port from tsec.c file to add support for m88e1011s, m88es, m88e1118,
m88e1121r, m88e1145, m88e1149s.
Signed-off-by: Mingkai Hu
---
drivers/net/fsl_phy.c | 299 +
drivers/net/fsl_phy.h | 36 ++
2 files changed, 335 insertions(+), 0
This will pave the way to move the PHY code to fsl_phy.c which
will be reused by all other code.
Signed-off-by: Mingkai Hu
---
drivers/net/tsec.c | 10 +-
include/tsec.h | 35 +++
2 files changed, 16 insertions(+), 29 deletions(-)
diff --git a
Signed-off-by: Mingkai Hu
---
drivers/net/tsec.c | 857 +---
1 files changed, 416 insertions(+), 441 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 910cf9e..40f1c76 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
Signed-off-by: Mingkai Hu
---
drivers/net/tsec.c | 232 ++-
include/tsec.h |6 +-
2 files changed, 121 insertions(+), 117 deletions(-)
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 9c8fe62..910cf9e 100644
--- a/drivers/net
From: Kumar Gala
Add VSC8244 and VSC8234 phy support, this will be reused
by etsec code.
Signed-off-by: Kumar Gala
Signed-off-by: Mingkai Hu
---
arch/powerpc/include/asm/fsl_enet.h | 10 +
drivers/net/fsl_phy.c | 353 +++
drivers/net/fsl_phy.h
From: Kumar Gala
Signed-off-by: Kumar Gala
Signed-off-by: Mingkai Hu
---
board/freescale/corenet_ds/Makefile |1 +
board/freescale/corenet_ds/corenet_ds.c | 11 +-
board/freescale/corenet_ds/eth_p4080.c | 352 +++
3 files changed, 359 insertions(+), 5
From: Kumar Gala
Signed-off-by: Kumar Gala
Signed-off-by: Mingkai Hu
---
drivers/net/fm/tgec.c | 104
drivers/net/fm/tgec.h | 230 +
drivers/net/fm/tgec_phy.c | 155 ++
3 files changed, 489
From: Kumar Gala
Signed-off-by: Kumar Gala
Signed-off-by: Mingkai Hu
---
arch/powerpc/include/asm/fsl_enet.h | 12 ++
drivers/net/fm/dtsec.c | 168 +++
drivers/net/fm/dtsec.h | 251 +++
3 files changed, 431
From: Kumar Gala
Also rename serdes_get_bank() to serdes_get_bank_by_lane().
Signed-off-by: Emil Medve
Signed-off-by: Kumar Gala
Signed-off-by: Mingkai Hu
---
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 33 +++-
arch/powerpc/include/asm/fsl_serdes.h |4
This patchset add support for the P4080's datapath accelation architecture
in independent mode, and do some code refactor of the file tsec.c.
1. Add the releated MAC controller support, includeing dTSEC and 10GEC
2. Add support for FMan ethernet in Independent mode
3. Add PHY support (VSC8244 and
The default value of the prescaler of eSDHC clock frequency
is 0x80, so we need to mask the MSB to set a different clock,
or else it maybe make the behavior of this prescaler undefined.
Signed-off-by: Mingkai Hu
---
include/fsl_esdhc.h |2 +-
1 files changed, 1 insertions(+), 1 deletions
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.
Signed-off-by: Mingkai Hu
---
board/freescale/mpc8536ds/mpc8536ds.c | 252 +
1 files changed, 64 insertions(+), 188
Take advantage of the latest full relocation commit of PPC platform
for boot from NAND.
Signed-off-by: Mingkai Hu
---
Changelog:
- according to Scott's comments to seperate this patch.
cpu/mpc85xx/u-boot-nand.lds |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git
The commit 66372fe2 manually relocated the bbt pattern pointer,
which can be removed by using full relocation.
Signed-off-by: Mingkai Hu
---
drivers/mtd/nand/fsl_elbc_nand.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers
Add boot from NAND/eSDHC/eSPI description
Signed-off-by: Mingkai Hu
---
No change over v3.
doc/README.mpc8536ds | 127 ++
1 files changed, 127 insertions(+), 0 deletions(-)
create mode 100644 doc/README.mpc8536ds
diff --git a/doc
image need to switch to Address space 1
to disable this mapping and map the address space again.
This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.
Signed-off-by: Mingkai Hu
---
Change over v3:
- Aligned owing to
that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: Mingkai Hu
---
Change over v3:
- Intergrated Scott's comments.
- Intergrated Wolfgang's comments.
MAKEALL
Signed-off-by: Mingkai Hu
---
Changelog:
According to Woflgang's comments, fixed the line length of
the board config file.
include/configs/MPC8536DS.h | 147 +++
1 files changed, 79 insertions(+), 68 deletions(-)
diff --git a/include/co
Signed-off-by: Mingkai Hu
---
include/asm-ppc/immap_85xx.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index e7d412d..39fdb8e 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
When boot from NAND, the NAND flash must be connected to br/or0.
Also init RAM(L2 SRAM or DDR SDRAM) for load the second image to
it.
Signed-off-by: Mingkai Hu
---
ChangeLog:
- move the board specific config for br/or to board init file, i.e.
nand_spl/board/freescale/mpc8536ds/nand_boot.c
The first stage 4K image uses a seperate ld script file to
generate 4K image. This patch moves it to the cpu/mpc85xx/*
to make it avaliable for 85xx platform.
Signed-off-by: Mingkai Hu
---
ChangeLog:
- move from board specific directory to cpu/mpc85xx/*,
make it avalible for 85xx platform
Signed-off-by: Mingkai Hu
---
Sorry for the spam, ingnor the [PATCH] mpc8536: simplify the top makefile for
36-bit config,
this is the new version.
Makefile|4 +---
include/configs/MPC8536DS.h |2 +-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a
Signed-off-by: Mingkai Hu
---
Makefile|4 +---
include/configs/MPC8536DS.h |2 +-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/Makefile b/Makefile
index 0b61d05..99837a3 100644
--- a/Makefile
+++ b/Makefile
@@ -2448,9 +2448,7 @@ ATUM8548_config
Add boot from NAND/eSDHC/eSPI description
Signed-off-by: Mingkai Hu
---
No change over v2, it comes here for the pick up convience.
doc/README.mpc8536ds | 127 ++
1 files changed, 127 insertions(+), 0 deletions(-)
create mode 100644 doc
that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: Mingkai Hu
---
Change over v2:
- Intergrated Kumar's comments.
- Aligned to the leatest git tree
MAKEALL
image need to switch to Address space 1
to disable this mapping and map the address space again.
This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.
Signed-off-by: Mingkai Hu
---
Change over v2:
- Intergrated
that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: Mingkai Hu
---
Makefile |1 +
board/freescale/mpc8536ds/config.mk|7 ++
board/freescale/mpc8536ds/
file when one of the bootup methods above is selected.
Signed-off-by: Mingkai Hu
---
- Move u-boot-nand.lds from board directory to cpu/mpc85xx, which make it
avalible for 85xx platform
- Some modification on u-boot-nand.lds accoring to u-boot.lds
cpu/mpc85xx/cpu_init.c | 19 ++
If the environment variables are saved on the MMC/SD card,
env_relocat can't relocate env from MMC/SD card without mmc init.
Signed-off-by: Mingkai Hu
---
lib_ppc/board.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
Whether booting from MMC/SD card or not, the environment variables
can be saved on it, this patch add the operation support.
Signed-off-by: Mingkai Hu
---
common/Makefile |1 +
common/cmd_nvedit.c |3 +-
common/env_sdcard.c | 135
[PATCH v1 1/3] Make mmc init come before env_relocate
[PATCH v1 2/3] Add support for save environment variable to MMC/SD card
[PATCH v1 3/3] mpc8536: Get the address of env on the SDCard
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/ma
Both the save env and load env operation will call this function
to get the address of env on the SDCard, so the user can control
where to put the env freely.
Also enable the functionlity of saving env variable to SDCard on
mpc8536
Signed-off-by: Mingkai Hu
---
board/freescale/mpc8536ds
file when one of the bootup methods above is selected.
Signed-off-by: Mingkai Hu
---
cpu/mpc85xx/cpu_init.c | 19 +++
cpu/mpc85xx/start.S| 23 ++-
cpu/mpc85xx/tlb.c |6 ++
drivers/misc/fsl_law.c |2 ++
4 files changed, 49 insertions(+),
Add boot from NAND/eSDHC/eSPI description
Signed-off-by: Mingkai Hu
---
doc/README.mpc8536ds | 127 ++
1 files changed, 127 insertions(+), 0 deletions(-)
create mode 100644 doc/README.mpc8536ds
diff --git a/doc/README.mpc8536ds b/doc
that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: Mingkai Hu
---
Makefile |1 +
board/freescale/mpc8536ds/config.mk|7 +
board/freescale/mpc8536ds/
1 - 100 of 131 matches
Mail list logo
