Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen
---
drivers/phy/starfive/phy-jh7110-pcie.c | 2 +-
drivers/usb/cdns3/core.c | 3 +++
2 files
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.
Signed-off-by: Minda Chen
Tested-by: E Shattow
---
arch/riscv/include/asm/arch-jh7110/gpio.h | 5 +
board/starfive
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index c3f2142ae1b..c2be9ffae27 100644
--- a/configs
Add Starfive cdns USB3 wrapper driver.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile | 1 +
drivers/usb/cdns3/cdns3-starfive.c | 182 +
3 files changed, 190 insertions(+)
create mode 100644 drivers
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 7 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 239
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
Reviewed-by: Roger Quadros
---
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 14
ock in PHY init function.
- Add new patch5.
Minda Chen (8):
usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()
phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
usb: cdns: starfive: Get dr mode from wrapper device dts
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
drivers/usb/cdns3/drd.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers
>
>
>
> On 10/11/24 20:34, Marek Vasut wrote:
> > On 10/12/24 5:13 AM, Minda Chen wrote:
> >> Add cdns USB3 wrapper driver. And cdns core driver also get dr mode
> >> from wrapper devcie dts node to make it is same with Starfive cdns
> >>
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 174ac24dc74..4329c8705ec 100644
--- a/configs
Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 ++
arch/riscv/dts/jh7110.dtsi| 53 +++
2 files changed, 58 insertions(+)
diff --git a/arch/riscv
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.
Signed-off-by: Minda Chen
---
arch/riscv/include/asm/arch-jh7110/gpio.h | 5 +
board/starfive/visionfive2/spl.c
Add cdns USB3 wrapper driver. And cdns core driver also get
dr mode from wrapper devcie dts node to make it is same with
Starfive cdns USB Linux kernel driver, preparing for enable
OF_UPSTREAM.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile
e format.(follow Rogers's comments.)
- patch 3 using regmap_field.
v2:
- patch 1 Move the added code to cdns3_core_init_role(). Must
set PHY mode before calling cdns3 role start function.
- patch 1-4 correct the code format.(follow Marek's commen
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
Reviewed-by: Roger Quadros
---
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 14
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 7 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 239
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
drivers/usb/cdns3/drd.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers
>
> Hi Minda,
>
> On Wed, Aug 28, 2024 at 6:31 PM Minda Chen
> wrote:
> >
> > Setup star64 USB fdt fixup function. Set dr_mode to host, and add vbus
> > pin (GPIO25), and set USB 3.0 mode.
> > the functions can be used by other 7110 board like Milk-V b
>
> On 8/29/24 3:30 AM, Minda Chen wrote:
>
> [...]
>
> > +menu "Starfive PHY driver"
> > +
> > +config PHY_STARFIVE_JH7110_USB2
> > + bool "Starfive JH7110 USB 2.0 PHY driver"
> > + select PHY
>
> Can this PHY_STARF
>
> On Wed, Aug 28, 2024 at 9:47 PM Sumit Garg wrote:
> >
> > Hi,
> >
> > On Thu, 29 Aug 2024 at 07:01, Minda Chen
> wrote:
> > >
> > > Add Jh7110 Cadence USB dts node, Visionfive2 default setting is USB
> > > 2.0 device.
> >
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index
Setup star64 USB fdt fixup function. Set dr_mode to host,
and add vbus pin (GPIO25), and set USB 3.0 mode.
the functions can be used by other 7110 board like Milk-V
board.
Signed-off-by: Minda Chen
---
board/starfive/visionfive2/spl.c | 66
1 file changed, 66
Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 ++
arch/riscv/dts/jh7110.dtsi| 53 +++
2 files changed, 58 insertions(+)
diff --git a/arch/riscv
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 174ac24dc7..35137eec59 100644
--- a/configs
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.
Signed-off-by: Minda Chen
---
arch/riscv/include/asm/arch-jh7110/gpio.h | 5 +
board/starfive/visionfive2/spl.c
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 7 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 237
Add cdns USB3 wrapper driver.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile | 2 +
drivers/usb/cdns3/cdns3-starfive.c | 191 +
3 files changed, 200 insertions(+)
create mode 100644 drivers/usb/cdns3
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
Reviewed-by: Roger Quadros
---
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 14 +++
drivers/phy/starfive
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/drd.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/usb/cdns3/drd.c b/drivers
start function.
- patch 1-4 correct the code format.(follow Marek's comments.)
- patch 2 Add set 125M clock in PHY init function.
- Add new patch5.
Minda Chen (9):
usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()
phy: starfive: Add Starfive JH7110 USB 2.0 PHY dr
>
> USB PHY maybe need to set PHY mode in different USB dr mode. So translate
> USB PHY mode to generic PHY mode and call generic_phy_set_mode().
>
> Signed-off-by: Minda Chen
> ---
> drivers/usb/cdns3/drd.c | 14 ++
> 1 file changed, 14 insertions(+)
&
>
> For some JH7110 boards, USB host overcurent pin is not reserved, To make USB
> host work, overcurrent pin must be disabled. So set the pin default disabled.
>
> Signed-off-by: Minda Chen
> ---
> drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +--
> -邮件原件-
> 发件人: E Shattow
> 发送时间: 2024年7月23日 21:06
> 收件人: Minda Chen
> 抄送: Marek Vasut ; Tom Rini ; Roger
> Quadros ; Neil Armstrong ;
> Alexey Romanov ; Sumit Garg
> ; Mark Kettenis ; Nishanth
> Menon ; Rick Chen ; Leo Yu-Chi Liang
> ; u-boot@list
>
> On Mon, Jul 22, 2024 at 6:29 PM Minda Chen
> wrote:
> >
> >
> >
> > >
> > > On Sat, Jul 20, 2024 at 6:47 PM E Shattow wrote:
> > > >
> > > > Hi, I am testing on Milk-V Mars CM Lite, and I add to these
> > >
>
> On Sat, Jul 20, 2024 at 6:47 PM E Shattow wrote:
> >
> > Hi, I am testing on Milk-V Mars CM Lite, and I add to these devicetree
> > changes at runtime from board/starfive/visionfive2/spl.c
> >
> > On Thu, Jul 18, 2024 at 6:38 PM Minda Chen
> wrote:
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 174ac24dc7..35137eec59 100644
--- a/configs
Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 ++
arch/riscv/dts/jh7110.dtsi| 52 +++
2 files changed, 57 insertions(+)
diff --git a/arch/riscv
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled.
Signed-off-by: Minda Chen
---
drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions
Add cdns USB3 wrapper driver.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile | 2 +
drivers/usb/cdns3/cdns3-starfive.c | 191 +
3 files changed, 200 insertions(+)
create mode 100644 drivers/usb/cdns3
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 7 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 237
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
Reviewed-by: Roger Quadros
---
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 14 +++
drivers/phy/starfive
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/drd.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/usb/cdns3/drd.c b/drivers
ling cdns3 role start function.
- patch 1-4 correct the code format.(follow Marek's comments.)
- patch 2 Add set 125M clock in PHY init function.
- Add new patch5.
Minda Chen (8):
usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()
phy: starfive: Add Starfi
>
> On 7/4/24 07:50, Minda Chen wrote:
> > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > So the codes can be used in visionfive2 and star64 7110 board.
> >
> > The driver is almost the same with kernel driver.
> >
> > Test with
>
>
>
> On 04/07/2024 08:50, Minda Chen wrote:
> > Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic PHY driver
> > and can be used as USB 3.0 driver.
> >
> > Signed-off-by: Minda Chen
> > ---
> > drivers/phy/starfive/Kconfig
>
> Hi,
>
> On 04/07/2024 08:50, Minda Chen wrote:
> > USB PHY maybe need to set PHY mode in different USB dr mode. So
> > translate to generic PHY mode and call generic_phy_set_mode().
> >
> > Signed-off-by: Minda Chen
> &
>
> On Thu, Jul 4, 2024 at 6:25 AM Heinrich Schuchardt
> wrote:
> >
> > On 7/4/24 07:50, Minda Chen wrote:
> > > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > > So the codes can be used in visionfive2 and star64 7110 board.
> &g
Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 ++
arch/riscv/dts/jh7110.dtsi| 52 +++
2 files changed, 57 insertions(+)
diff --git a/arch/riscv
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
---
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 14 +++
drivers/phy/starfive/Makefile | 6
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
Reviewed-by: Marek Vasut
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 174ac24dc7..35137eec59 100644
--- a/configs
Add cdns USB3 wrapper driver.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile | 2 +
drivers/usb/cdns3/cdns3-starfive.c | 183 +
3 files changed, 192 insertions(+)
create mode 100644 drivers/usb/cdns3
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled.
Signed-off-by: Minda Chen
---
drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 7 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 202
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate to generic PHY mode and call
generic_phy_set_mode().
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/core.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/usb/cdns3/core.c b/drivers
set PHY mode before calling cdns3 role start function.
- patch 1-4 correct the code format.(follow Marek's comments.)
- patch 2 Add set 125M clock in PHY init function.
- Add new patch5.
Minda Chen (8):
usb: cdns3: Set USB PHY mode in cdns3_core_init_role(
>
> Hi,
>
> On Sun, Jun 23, 2024 at 6:28 PM Minda Chen
> wrote:
> >
> >
> >
> > >
> > > Minda, can you test USB Host function on VisionFive2? I guess that
> > > it is connected to the USB-C port. For the boards with JH7110 and
>
en "usb
reset" to
scan usb devices. If you have any issue about this. Also reply it in this.
Thanks.
> On Sun, May 19, 2024 at 11:20 PM Minda Chen
> wrote:
> >
> >
> >
> > >
> > > Hi, there is a compile warning. I don't know why.
> >
>
> Hey,
>
> After going from Vendor SPL/OpenSBI/U-Boot to OpenSBI v1.4++ plus
> v2024.07-rc4 SPL/U-Boot I ran into a boot loop problem relating to
> PCI:
> U-Boot 2024.07-rc4 (Jun 13 2024 - 15:09:34 +0100)
>
> CPU: sifive,u74-mc
> Model: StarFive VisionFive 2 v1.2A
>
> -邮件原件-
> 发件人: E Shattow
> 发送时间: 2024年5月20日 13:06
> 收件人: Minda Chen
> 抄送: Marek Vasut ; Tom Rini ; Roger
> Quadros ; Neil Armstrong ;
> Alexey Romanov ; Sumit Garg
> ; Mark Kettenis ; Nishanth
> Menon ; Rick Chen ; Leo Yu-Chi Liang
> ; u-boot@list
>
> On 5/4/24 5:03 PM, Minda Chen wrote:
> > Add USB related files to Starfive visionfive2 MAINTAINERS.
> >
> > Signed-off-by: Minda Chen
> > ---
> > board/starfive/visionfive2/MAINTAINERS | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> &g
>
> On 30.04.24 11:59, E Shattow wrote:
> > On Tue, Apr 30, 2024 at 12:18 AM Heinrich Schuchardt
> > wrote:
> >>
> >> On 30.04.24 00:46, E Shattow wrote:
> >>> On Sun, Apr 28, 2024 at 9:13 AM Emil Renner Berthing
> >>> wrote:
>
> Heinrich Schuchardt wrote:
> > We already support
Add USB related files to Starfive visionfive2 MAINTAINERS.
Signed-off-by: Minda Chen
---
board/starfive/visionfive2/MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index d7f638f9b4..1faf83f581
Add Jh7110 Cadence USB dts node, Visionfive2 default setting
is USB 2.0 device.
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 5 ++
arch/riscv/dts/jh7110.dtsi| 52 +++
2 files changed, 57 insertions(+)
diff --git a/arch/riscv
Add cadence USB confiuration.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index 3bbd1dbd67..444ddd508d 100644
--- a/configs
Add cdns USB3 wrapper driver.
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/Kconfig | 7 ++
drivers/usb/cdns3/Makefile | 2 +
drivers/usb/cdns3/cdns3-starfive.c | 184 +
3 files changed, 193 insertions(+)
create mode 100644 drivers/usb/cdns3
Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen
---
drivers/phy/starfive/Kconfig | 6 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-pcie.c | 211
Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen
---
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile | 1 +
drivers/phy/starfive/Kconfig | 13 +++
drivers/phy/starfive/Makefile | 6
USB PHY maybe need to set PHY mode in different USB
dr mode. So translate to generic PHY mode and call
generic_phy_set_mode().
Signed-off-by: Minda Chen
---
drivers/usb/cdns3/core.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb
(usb 3.0) PHY drivier
patch4: Cadence USB wrapper driver.
patch5-7 dts, config and maintainers update.
Minda Chen (7):
usb: cdns3: Set USB PHY mode in cdns3_probe()
phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
usb: cdns: starfive
>
> On 4/1/24 17:28, Aurelien Jarno wrote:
> > On 2024-03-28 17:01, Heinrich Schuchardt wrote:
> >> On 24.03.24 16:00, Aurelien Jarno wrote:
> >>> On 2024-03-21 19:11, Heinrich Schuchardt wrote:
> The differences between the Milk-V Mars board and the VisionFive 2
> board are small enough
rfive-visionfive-2.dtsi
> @@ -298,7 +298,7 @@
> pinctrl-0 = <&mmc1_pins>;
> no-sdio;
> no-mmc;
> - broken-cd;
> + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
> cap-sd-highspeed;
> post-power-on-delay-ms = <200>;
> status = "okay";
> --
> 2.43.0
Acked-by: Minda Chen
>
> The Milk-V Mars board is technically very close to the StarFive VisionFive 2
> board.
>
> With this patch series the VisionFive 2 U-Boot SPL will detect that it is
> running on
> a Milk-V board and patch the device-tree accordingly.
> This is the same approach that has been taken to handle
Add PCIe driver file to visionfive2 board MAINTAINERS list.
Signed-off-by: Minda Chen
---
board/starfive/visionfive2/MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index 5056e9c713..d7f638f9b4
Update the maintainer of Starfive VisionFive v2 board.
Signed-off-by: Minda Chen
---
board/starfive/visionfive2/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/starfive/visionfive2/MAINTAINERS
b/board/starfive/visionfive2/MAINTAINERS
index 600ff9575b
On 2023/10/18 18:55, Marek Vasut wrote:
> On 10/18/23 12:16, Minda Chen wrote:
>>
>>
>> On 2023/10/18 18:11, Marek Vasut wrote:
>>> On 10/18/23 05:46, Minda Chen wrote:
>>>>
>>>>
>>>> On 2023/10/18 10:35, Marek Vasut wrote:
>&
On 2023/10/18 18:11, Marek Vasut wrote:
> On 10/18/23 05:46, Minda Chen wrote:
>>
>>
>> On 2023/10/18 10:35, Marek Vasut wrote:
>>> On 10/18/23 03:22, Minda Chen wrote:
>>>>
>>>>
>>>> On 2023/10/17 19:20, Marek Vasut wrote:
>
On 2023/10/18 10:35, Marek Vasut wrote:
> On 10/18/23 03:22, Minda Chen wrote:
>>
>>
>> On 2023/10/17 19:20, Marek Vasut wrote:
>>> On 10/17/23 08:20, Minda Chen wrote:
>>>> xhci_wait_for_event() waiting TRB_TRANSFER event may return
>>&
On 2023/10/17 19:20, Marek Vasut wrote:
> On 10/17/23 08:20, Minda Chen wrote:
>> xhci_wait_for_event() waiting TRB_TRANSFER event may return
>> NULL. Checking the return value to avoid crash.
>>
>> Signed-off-by: Minda Chen
>
> How did you trigger this error
xhci_wait_for_event() waiting TRB_TRANSFER event may return
NULL. Checking the return value to avoid crash.
Signed-off-by: Minda Chen
---
drivers/usb/host/xhci-ring.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index
In StarFive VF2 board. pcie0 connect to VTI usb controller.
Enable it to support usb host.
Signed-off-by: Minda Chen
---
arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
b/arch
Some device driver need SYS_CACHELINE_SIZE macro. Add StarFive
SYS_CACHE_SHIFT_6 to enable it.
Signed-off-by: Minda Chen
---
arch/riscv/cpu/jh7110/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig
index 4d9581165b
Add XHCI_PCI to enable usb3-host functions.
Also add usb command and keyboard config.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
StarFive VF2 VLI usb-host controller connect to pcie0 RC.
Enable pcie0 first the enable USB function.
patch1 is Get the correct ECAM offset in multiple PCIe RC.
patch2 is enable pcie0 dts node.
patch3 is enable SYS_CACHELINE_SIZE
patch4 is Add VF2 USB related configuration.
Minda Chen (4):
pci
Get the correct ECAM offset and record the secondary bus
number in Multiple RC case.
Signed-off-by: Minda Chen
---
drivers/pci/pcie_plda_common.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie_plda_common.c b/drivers/pci/pcie_plda_common.c
index
On 2023/8/3 12:49, Bin Meng wrote:
> On Thu, Aug 3, 2023 at 11:22 AM Minda Chen
> wrote:
>>
>> Some devices need SYS_CACHE_LINE_SIZE macro. Add StarFive
>> SYS_CACHE_SHIFT_6 to enable it.
>>
>> Signed-off-by: Minda Chen
>> ---
>> arch/ris
StarFive VF2 VTI usb-host controller connect to pcie0 RC.
Enable pcie0 first the enable USB function.
patch1 is Get the correct ECAM offset in multiple PCIe RC.
patch2 is enable pcie0 dts node.
patch3 is enable SYS_CACHE_LINE_SIZE
patch4 is Add VF2 USB related configuration.
Minda Chen (4
Add PCI_XHCI support to enable usb3-host functions.
Also add usb command and keyboard config.
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
Some devices need SYS_CACHE_LINE_SIZE macro. Add StarFive
SYS_CACHE_SHIFT_6 to enable it.
Signed-off-by: Minda Chen
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 867cbcbe74..15da2a8559 100644
--- a/arch/riscv/Kconfig
Get the correct ECAM offset and record the secondary bus
number in Multiple RC case.
Signed-off-by: Minda Chen
---
drivers/pci/pcie_plda_common.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pcie_plda_common.c b/drivers/pci/pcie_plda_common.c
index
In StarFive VF2 board. pcie0 connect to VTI usb controller.
Enable it to support usb host.
Signed-off-by: Minda Chen
---
arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
b/arch
--
>> >
>> > Heinrich Schuchardt (2):
>> > riscv: sifive: initialize PCI on Unmatched
>> > acpi: Add missing RISC-V acpi_table header
>> >
>> > Mason Huo (3):
>> > starfive: pci: Add StarFive JH7110 pcie driver
>&g
On 2023/7/26 11:07, Leo Liang wrote:
> On Tue, Jul 25, 2023 at 05:46:47PM +0800, Minda Chen wrote:
>> As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
>> JH7110) contain Designware i2c and PCI but do not use ACPI,
>> This file will be can't be comp
host driver
riscv: dts: starfive: Enable PCIe host controller
Minda Chen (1):
i2c: designware: Add Kconfig for designware_i2c_pci.c
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +
arch/riscv/dts/jh7110.dtsi| 74
configs/starfive_visionfive2_defconfig
As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
JH7110) contain Designware i2c and PCI but do not use ACPI,
This file will be can't be compiled. So add a new Kconfig for
designware_i2c_pci.c, which depends on ACPIGEN
Signed-off-by: Minda Chen
---
drivers/i2c/Kconfig
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Reviewed-by: Leo Yu-Chi Liang
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 74
From: Mason Huo
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Acked-by: Pali Rohár
Reviewed-by: Leo Yu-Chi Liang
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