On 7/22/25 10:47 PM, Alice Guo (OSS) wrote:
From: Alice Guo
This patch is used to restore support for i.MX95 A0 silicon. The usage
is updated in imx95_evk.rst.
Fixes: 9936724aa9b ("imx95_evk: Add i.MX95 B0 support")
Signed-off-by: Alice Guo
---
arch/arm/mach-imx/imx9/Kconfig|
On 7/29/25 4:51 PM, Lucien.Jheng wrote:
[...]
+int request_firmware_into_buf_via_script(void **buf, size_t max_size,
+ const char *script_name)
+{
[...]
+ *buf = (void *)memdup((void *)addr, size);
+ if (!*buf) {
+ log_err("Fail
On 6/29/25 9:08 PM, Marek Vasut wrote:
Hi,
diff --git a/arch/arm/mach-stm32mp/Kconfig.13x b/arch/arm/mach-
stm32mp/Kconfig.13x
index bc8b3f8cf77..cecf9e3b8c7 100644
--- a/arch/arm/mach-stm32mp/Kconfig.13x
+++ b/arch/arm/mach-stm32mp/Kconfig.13x
@@ -20,7 +20,8 @@ config TARGET_ST_STM32MP13X
eviewed-by: Patrice Chotard
Thanks
Patrice
I double checked, in fact for AARCH64, i am using aarch64-none-elf-gcc (GNU
Toolchain for the A-profile Architecture 10.3-2021.07 (arm-10.29)) 10.3.1
20210621 which is out of date.
2025.10-rc1 is now out, this is still broken.
--
Best regards,
Marek Vasut
Enable SoC pull up for USB OTG ID pin in SPL. There is no dedicated pull up
resistor on the SoM itself, and the pull up is mandatory for correct USB OTG
ID pin detection. U-Boot proper already configures the USB OTG ID pin pull
up via DT pinctrl node entry.
Signed-off-by: Marek Vasut
---
Cc
On 7/28/25 8:08 PM, Frank Wunderlich wrote:
Am 28. Juli 2025 18:34:01 MESZ schrieb "Lucien.Jheng" :
Marek Vasut 於 2025/7/27 下午 10:46 寫道:
On 7/27/25 4:16 PM, Lucien.Jheng wrote:
This commit introduces a new API, request_firmware_into_buf_via_script(),
to the fs_loader framework.
Thi
On 7/27/25 4:16 PM, Lucien.Jheng wrote:
This commit introduces a new API, request_firmware_into_buf_via_script(),
to the fs_loader framework.
This function allows firmware to be loaded into memory
using a user-defined U-Boot script,
providing greater flexibility for firmware loading scenarios tha
alue as an int so the code can behave as
expected. Also remove initial values from 'value' and 'div' as they are
not needed.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody
Reviewed-by: Marek Vasut
Thanks !
On 7/22/25 11:20 AM, Tudor Ambarus wrote:
On 7/20/25 8:58 PM, Marek Vasut wrote:
Add IDs for Winbond W77Q51NW, 512M-bit Secure Serial Flash Memory
with Post-Quantum Cryptography, Dual/Quad SPI, QPI and DTR . The
flash part is similar to W25Q512NWM .
Signed-off-by: Marek Vasut
---
Cc: Jagan
On 7/22/25 8:05 AM, Siddharth Vadapalli wrote:
The Auto Negotiation procedure between two Ethernet PHYs consists of
determining the best commonly supported parameters among Speed,
Duplex Mode and Flow Control.
The time taken for this procedure is not only dependent on the local
PHY used, but als
On 1/29/25 6:51 PM, Quentin Schulz wrote:
This would need to be added to the ITS spec, c.f. https://
fitspec.osfw.foundation/
Where does one do that ?
https://github.com/open-source-firmware/flat-image-tree I guess?
Thank you for adding the entry.
On 7/21/25 5:26 PM, fran...@public-files.de wrote:
Hi
Gesendet: Sonntag, 20. Juli 2025 um 14:28
Von: "Lucien.Jheng"
Betreff: [U-Boot, v3, 1/1]net: phy: Add the Airoha EN8811H PHY driver
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
100/1000/2500 Mbps with auto negoti
On 7/21/25 2:03 PM, Prasanth Mantena wrote:
Hi,
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index e7e97780d7c..0383175beb5 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -591,6 +591,7 @@ const struct flash_info spi_nor_ids[] = {
On 7/11/25 9:35 AM, Magnus Damm wrote:
Hello Magnus,
sorry for the late reply.
Here's a hack that adds SDRAM setup code to the r7s72100 Genmai board.
Might be useful in case someone wants to boot Linux on the Genmai board.
Before merge a few unclear points remain:
- How to make best use of
On 7/11/25 2:39 PM, Magnus Damm wrote:
Hello Magnus,
sorry for the late reply.
Would it be possible to split this change into multiple easier-to-review
patches ?
--- 0004/drivers/net/sh_eth.c
+++ work/drivers/net/sh_eth.c 2025-07-11 20:31:22.438699670 +0900
@@ -29,6 +29,8 @@
#include
On 7/17/25 12:52 PM, Prabhakar wrote:
From: Lad Prabhakar
The Renesas board defconfigs explicitly set CONFIG_TEXT_BASE=0x5000,
however U-Boot's POSITION_INDEPENDENT=y build default already places text
at 0x0. These hardcoded overrides are therefore unnecessary and will be
pruned automatical
On 7/20/25 5:04 PM, Lucien.Jheng wrote:
This commit adds request_firmware_into_buf_via_env() to the fs_loader driver,
enabling firmware loading into a buffer
using environment variables for path and size.
It supports multiple entries via indexed variable names
(e.g., "fw_dir0", "fw_size0").
This
On 7/7/25 7:03 PM, Magnus Damm wrote:
Hello Magnus,
I'm sorry for the late reply.
+++ work/drivers/net/sh_eth.c 2025-07-05 17:45:07.333754799 +0900
@@ -144,10 +144,10 @@ static int sh_eth_reset(struct sh_eth_in
{
#if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_RZ)
int ret =
Retronix R-Car V4H Sparrow Hawk EVTA1 is populated with Spansion S25FS512S,
EVTB1 is populated with Winbond W77Q51NW. Describe the SPI NOR using generic
"spi-flash" compatible, because both flashes can be auto-detected based on
their built-in IDs.
Signed-off-by: Marek Vasut
---
Cc
Enable support for Winbond SPI NOR on Retronix R-Car V4H Sparrow Hawk board,
this is required to support W77Q51NW on new board revision EVTB1 operational.
Signed-off-by: Marek Vasut
---
Cc: Nobuhiro Iwamatsu
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
configs/r8a779g3_sparrowhawk_defconfig | 1
Add IDs for Winbond W77Q51NW, 512M-bit Secure Serial Flash Memory
with Post-Quantum Cryptography, Dual/Quad SPI, QPI and DTR . The
flash part is similar to W25Q512NWM .
Signed-off-by: Marek Vasut
---
Cc: Jagan Teki
Cc: Nobuhiro Iwamatsu
Cc: Takahiro Kuwano
Cc: Tom Rini
Cc: Tudor Ambarus
Cc
On 7/20/25 5:31 PM, Heinrich Schuchardt wrote:
Am 20. Juli 2025 17:04:04 MESZ schrieb "Lucien.Jheng" :
This commit adds request_firmware_into_buf_via_env() to the fs_loader driver,
enabling firmware loading into a buffer
using environment variables for path and size.
It supports multiple entries
On 7/15/25 4:49 PM, Lad, Prabhakar wrote:
Hi Tom,
On Tue, Jul 15, 2025 at 3:31 PM Tom Rini wrote:
On Tue, Jul 15, 2025 at 12:11:03PM +0100, Prabhakar wrote:
From: Lad Prabhakar
For Renesas R-Car Gen3 platforms with CONFIG_POSITION_INDEPENDENT enabled,
override CONFIG_TEXT_BASE to 0x0 in ea
+0200)
Magnus Damm (2):
ARM: renesas: Put common r7s72100 code in board/renesas/common
ARM: renesas: Add support for the r7s72100 Genmai board
Marek Vasut (14):
arm64: renesas: Convert SCIF SREC from u-boot-spl.bin
patch please .
libs-y += boot/
libs-$(CONFIG_CMDLINE) += cmd/
libs-y += common/
[...]
--
Best regards,
Marek Vasut
Please add symbolic names (introduce macros) for those registers here.
+ return 0;
+}
[...]
--
Best regards,
Marek Vasut
On 7/6/25 1:29 PM, Magnus Damm wrote:
+++ work/drivers/net/sh_eth.c 2025-07-05 17:45:07.333754799 +0900
@@ -144,10 +144,10 @@ static int sh_eth_reset(struct sh_eth_in
{
#if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_RZ)
int ret = 0, i;
-
Does something like this ...
if (
On 7/6/25 1:29 PM, Magnus Damm wrote:
+++ work/drivers/spi/Kconfig2025-07-05 03:07:38.660458220 +0900
@@ -432,12 +432,12 @@ config SPI_QUP
config RENESAS_RPC_SPI
bool "Renesas RPC SPI driver"
- depends on RCAR_64 || RZA1
+ depends on RCAR_64 || RZA1 || RZA2
Burst ON, Length=2, Flush cache
*/
+
+ /* Enable all internal RAM */
+ write8 SYSCR1, 0xFF
+ write8 SYSCR2, 0xFF
+ write8 SYSCR3, 0x0F
+ dummy_read8 SYSCR3
Can any of this be converted into s_init() (early init) C code ?
--
Best regards,
Marek Vasut
On 7/2/25 7:13 PM, Magnus Damm wrote:
Initial r7s72100 Genmai board support (V2)
[PATCH v2 1/2] ARM: renesas: Put common r7s72100 code in board/renesas/common
[PATCH v2 2/2] ARM: renesas: Add support for the r7s72100 Genmai board
These two patches for U-Boot aim at adding initial support for th
+DECLARE_GLOBAL_DATA_PTR;
See comment in r7s9210_pfc_set_state() below.
+struct r7s9210_pfc_plat {
+ void __iomem*base;
+};
+
+static void r7s9210_pfc_set_function(struct udevice *dev, u8 port, u8 pin, u8
func)
+{
+ struct r7s9210_pfc_plat *plat = dev_get_plat(dev);
+ u1
On 7/1/25 8:16 AM, Magnus Damm wrote:
From: Magnus Damm
Add SCIF support for RZ/A2 r7s9210 including a work around to prevent
the driver from hanging on boot due to TEND flag handling.
Signed-off-by: Magnus Damm
Reviewed-by: Marek Vasut
Thank you
On 7/2/25 3:11 PM, Magnus Damm wrote:
Hi Marek,
On Mon, Jun 30, 2025 at 8:52 PM Marek Vasut
wrote:
Split the RZ/A1 GR-PEACH defconfig into board-specific defconfig
and common RZ/A1 SoC defconfig. This is a preparatory patch for
new RZ/A1 boards, no functional change.
Signed-off-by: Marek
Split the RZ/A1 GR-PEACH defconfig into board-specific defconfig
and common RZ/A1 SoC defconfig. This is a preparatory patch for
new RZ/A1 boards, no functional change.
Signed-off-by: Marek Vasut
---
Cc: Magnus Damm
Cc: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Paul Barker
Cc: Tom Rini
Cc: u
On 7/2/25 3:34 PM, Magnus Damm wrote:
From: Magnus Damm
Remove the .binman_stamp file during distclean
Signed-off-by: Magnus Damm
---
On top of cbb5672790d400e9ec6e9fceaf89ece2660c0117 (origin/next)
Makefile |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/Makefile
++
and patch [2] , so u-boot/next with [1] and [2]
applied would be ideal.
Thank you
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=463012
[2] https://patchwork.ozlabs.org/project/uboot/list/?series=463013
--
Best regards,
Marek Vasut
Split the RZ/A1 GR-PEACH defconfig into board-specific defconfig
and common RZ/A1 SoC defconfig. This is a preparatory patch for
new RZ/A1 boards, no functional change.
Signed-off-by: Marek Vasut
---
Cc: Magnus Damm
Cc: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Paul Barker
Cc: Tom Rini
Cc: u
Remove various deprecated code comments, no functional change.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc: Nobuhiro Iwamatsu
Cc: Ramon Fried
Cc: Simon Glass
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
include/configs/alt.h | 2
Drop CFG_SH_ETHER_PHY_MODE from configuration files, this value
is never used. No functional change intended.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc: Nobuhiro Iwamatsu
Cc: Ramon Fried
Cc: Simon Glass
Cc: Tom Rini
Cc: u-boot
Drop CFG_SH_ETHER_PHY_ADDR from README and configuration files, this
value is never used, PHY address is extracted from control DT instead.
No functional change intended.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc: Nobuhiro Iwamatsu
.
CFG_SH_ETHER_ALIGNE_SIZE now set as SH_ETHER_ALIGN_SIZE in sh_eth.h
based on architecture and no longer configured on board level.
Remove CFG_SH_ETHER_CACHE_WRITEBACK configuration option from README.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc
driver is only used on 32bit and 64bit ARM, which both have those operations.
The CFG_SH_ETHER_ALIGNE_SIZE is converted to SH_ETHER_ALIGN_SIZE and defined
as either 64 on ARM or 16 on SH.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc
Drop unused struct sh_eth_info *port_info .phy_addr member assignment.
PHY address is extracted from control DT. No functional change intended.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc: Nobuhiro Iwamatsu
Cc: Ramon Fried
Cc: Simon
sh_eth_dev entirely. Handling of multiple ports should be done
by U-Boot DM and multiple per-driver-instance private data.
No functional change intended.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc: Nobuhiro Iwamatsu
Cc: Ramon Fried
Cc
The CFG_SH_ETHER_USE_PORT configuration option is a remnant from
before U-Boot DM existed and SH Ethernet made full use of it, and
is no longer used, remove it.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Joe Hershberger
Cc: Masakazu Mochizuki
Cc: Nobuhiro Iwamatsu
Cc: Ramon
On 6/30/25 4:30 PM, Jerome Forissier wrote:
Hi,
On 6/30/25 02:08, Marek Vasut wrote:
Add support for jumping to Linux kernel through OpTee-OS on ARMv7a to SPL.
Nitpicking: OP-TEE OS
Is this the official spelling ? I was always under the impression it was
OpTee-OS . but maybe I am wrong .
On 6/30/25 8:17 AM, Patrice CHOTARD wrote:
diff --git a/drivers/reset/stm32/stm32-reset.c
b/drivers/reset/stm32/stm32-reset.c
index 975f67f712a..918e81e588f 100644
--- a/drivers/reset/stm32/stm32-reset.c
+++ b/drivers/reset/stm32/stm32-reset.c
@@ -5,7 +5,7 @@
*/
#include
-#include
+#
having to rely on PSCI call.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Cc: Gatien Chevallier
Cc: Lionel Debieve
Cc: Pascal Zimmermann
Cc: Patrice Chotard
Cc: Patrick Delaunay
Cc: Simon Glass
Cc: Sughosh Ganu
Cc: Tom Rini
Cc: u-b
to prevent interference from TFABOOT
specific configuration, and RCC configuration to define clock tree
configuration used by this platform.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Cc: Gatien Chevallier
Cc: Lionel Debieve
Cc: Pascal
Add DRAM settings for 512 MiB of DRAM variant of DH STM32MP13xx DHCOR DHSBC.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Cc: Gatien Chevallier
Cc: Lionel Debieve
Cc: Pascal Zimmermann
Cc: Patrice Chotard
Cc: Patrick Delaunay
Cc: Simon
STM32MP15xx DHSOM defconfigs. Changes to STM32MP13xx DHCOR
defconfig then enable SPL support, CCF in SPL to configure clock, pin
configuration support in SPL, and OpTee OS start support in U-Boot.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Factor out common parts of STM32MP15xx DRAM controller configuration DT
description into stm32mp1-ddr.dtsi and introduce stm32mp13-ddr.dtsi which
describes STM32MP13xx DRAM controller configuration in DT.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice
Add default STM32MP13xx debug UART initialization. This is similar
to STM32MP15xx debug UART initialization, except the RCC registers
are at different offsets and the UART pinmux pins are different.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
---
Cc
-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Cc: Gatien Chevallier
Cc: Lionel Debieve
Cc: Pascal Zimmermann
Cc: Patrice Chotard
Cc: Patrick Delaunay
Cc: Simon Glass
Cc: Sughosh Ganu
Cc: Tom Rini
Cc: u-b...@dh-electronics.com
Cc: u-boot@lists.denx.de
Cc: uboot-st...@st-md
The STM32MP13xx PMIC initialization for DDR3 DRAM type is similar
to the STM32MP15xx PMIC initialization, except the VTT rail is not
enabled. Fill in the STM32MP13xx support.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Cc: Gatien
Add hardware initialization for the STM32MP13xx in SPL. This is
similar to STM32MP15xx except the code has to enable MCE to bring
DRAM controller up later.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Cc: Gatien Chevallier
Cc: Lionel
Introduce Kconfig options used by SPL on STM32MP13xx and isolate
the Kconfig options only used in case TFA BL2 is used as a SPL
behind CONFIG_TFABOOT dependency.
Reviewed-by: Patrice Chotard
Signed-off-by: Marek Vasut
---
Cc: Cheick Traore
Cc: Fabrice Gasnier
Cc: Gatien Chevallier
Cc: Lionel
The stm32-reset-core.h is located in drivers/reset/stm32/ , it has to
be included using "stm32-reset-core.h" and not ,
otherwise the build fails. Fix it.
Fixes: 0994a627c278 ("reset: stm32mp25: add stm32mp25 reset driver")
Signed-off-by: Marek Vasut
---
Cc: Gabriel Fe
-Boot fitImage jump code to start OpTee-OS first and jump to Linux next.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Ilias Apalodimas
Cc: Janne Grunau
Cc: Mattijs Korpershoek
Cc: Patrick Rudolph
Cc: Sam Edwards
Cc: Simon Glass
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
V2
().
The boot_jump_linux_via_optee() also includes STM32MP13xx late TZC
configuration write, this cannot be moved easily, hence the ifdef.
Signed-off-by: Marek Vasut
---
Cc: Heinrich Schuchardt
Cc: Ilias Apalodimas
Cc: Janne Grunau
Cc: Mattijs Korpershoek
Cc: Patrick Rudolph
Cc: Sam Edwards
Cc
On 6/29/25 6:10 PM, Lucien.Jheng wrote:
Hi,
I'm sorry for my abysmally slow response.
+config PHY_AIROHA_FW_IN_MMC
+ bool "Airoha firmware in MMC partition"
+ help
+ Airoha PHYs use firmware which can be loaded automatically
+ from storage directly attached to the PHY, and then
On 6/3/25 4:36 PM, Patrick DELAUNAY wrote:
Hi,
+&etzpc {
+ compatible = "simple-bus";
+};
+
change the compatible is not not needed I think
if the ETZPC driver was not compiled for SPL
today it is compiled
./arch/arm/mach-stm32mp/stm32mp1/etzpc.c
./arch/arm/mach-stm32mp/stm32mp1/Make
On 6/3/25 4:00 PM, Patrick DELAUNAY wrote:
Hi,
diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
index 45c2bb5bcea..b46f89dacb9 100644
--- a/board/st/common/stpmic1.c
+++ b/board/st/common/stpmic1.c
@@ -14,8 +14,19 @@
#include
#include
+static bool is_stm32mp13xx(void)
+{
On 6/3/25 4:22 PM, Patrick DELAUNAY wrote:
Hi,
+++ b/arch/arm/dts/stm32mp13-ddr.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
For new STM32MP file avoids to use the Deprecated License Identifiers
(GPL-2.0+ / GPL-2.0)
reference=
+https://spdx.dev/learn/handli
On 6/3/25 3:37 PM, Patrick DELAUNAY wrote:
Hi,
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-
stm32mp/stm32mp1/cpu.c
index 9ab5a3ede52..1ae82489a4b 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -28,7 +28,9 @@
* early TLB
On 6/3/25 3:26 PM, Patrick DELAUNAY wrote:
Hi,
diff --git a/arch/arm/mach-stm32mp/Kconfig.13x b/arch/arm/mach-
stm32mp/Kconfig.13x
index bc8b3f8cf77..cecf9e3b8c7 100644
--- a/arch/arm/mach-stm32mp/Kconfig.13x
+++ b/arch/arm/mach-stm32mp/Kconfig.13x
@@ -20,7 +20,8 @@ config TARGET_ST_STM32MP13X
On 6/28/25 10:36 AM, Magnus Damm wrote:
From: Magnus Damm
Break out SoC specific code from the GR-Peach board and put it into the
board/renesas/common directory so it can be easily shared between the
GR-Peach and Genmai boards.
I've pushed an SH Ethernet clean up patchset , defconfig split patc
On 6/15/25 3:12 PM, Lucien.Jheng wrote:
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
100/1000/2500 Mbps with auto negotiation only.
The driver uses two firmware files, for which updated versions are added to
linux-firmware already.
Locating the AIROHA FW within the fi
stodians/u-boot-sh.git next
for you to fetch changes up to b1d017afda2bf5b88736528ee54d32f6e51b7bf2:
renesas: Renesas R-Car Gen4 watchdog driver (2025-06-18 17:18:47 +0200)
--------
Marek Vasut (1):
ARM: dts: renesas: Drop most
oot-sh.git master
for you to fetch changes up to 668b2d791d94d4fd6a4be6d7dfa822b072017378:
arm64: renesas: Move early SPL stack into System RAM SRAM on R-Car V4H boards
(2025-06-18 17:18:43 +0200)
--------
Marek Vasut (1):
arm64: ren
Add dw_pcie_link_set_max_link_width() implementation ported from Linux kernel
as of commit 89db0793c9f2 ("PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling").
This is common code which is already duplicated in multiple drivers.
Signed-off-by: Marek Vasut
---
Cc: Casey Connolly
Cc:
kernel behavior.
Signed-off-by: Marek Vasut
---
Cc: Casey Connolly
Cc: Christian Marangi
Cc: Daniel Schwierzeck
Cc: Jiaxun Yang
Cc: John Crispin
Cc: Kever Yang
Cc: Neil Armstrong
Cc: Nobuhiro Iwamatsu
Cc: Philipp Tomsich
Cc: Siddharth Vadapalli
Cc: Simon Glass
Cc: Sumit Garg
Cc: Tom Rini
Enable support for R-Car Gen4 PCIe controller and NVMe storage
on Retronix R-Car V4H Sparrow Hawk board .
Signed-off-by: Marek Vasut
---
Cc: Casey Connolly
Cc: Christian Marangi
Cc: Daniel Schwierzeck
Cc: Jiaxun Yang
Cc: John Crispin
Cc: Kever Yang
Cc: Neil Armstrong
Cc: Nobuhiro Iwamatsu
implemented in an entirely generic manner,
by calling a firmware loading script, which the user can configure in
a way they require. This provides the user with flexibility of loading
the PCIe firmware from whichever storage device they need to load it
from.
Signed-off-by: Marek Vasut
---
Cc: Casey
kernel behavior.
Signed-off-by: Marek Vasut
---
Cc: Casey Connolly
Cc: Christian Marangi
Cc: Daniel Schwierzeck
Cc: Jiaxun Yang
Cc: John Crispin
Cc: Kever Yang
Cc: Neil Armstrong
Cc: Nobuhiro Iwamatsu
Cc: Philipp Tomsich
Cc: Siddharth Vadapalli
Cc: Simon Glass
Cc: Sumit Garg
Cc: Tom Rini
Use dw_pcie_link_set_max_link_width() instead of local implementation
of the same functionality.
Signed-off-by: Marek Vasut
---
Cc: Casey Connolly
Cc: Christian Marangi
Cc: Daniel Schwierzeck
Cc: Jiaxun Yang
Cc: John Crispin
Cc: Kever Yang
Cc: Neil Armstrong
Cc: Nobuhiro Iwamatsu
Cc
boot time.
Signed-off-by: Marek Vasut
---
Cc: Ilias Apalodimas
Cc: Nobuhiro Iwamatsu
Cc: Simon Glass
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
V2: No change
---
arch/arm/dts/r8a779g0-u-boot.dtsi | 78 ++-
1 file changed, 15 insertions(+), 63 deletions(-)
diff
payload(s) into RT-VRAM.
Signed-off-by: Marek Vasut
---
Cc: Ilias Apalodimas
Cc: Nobuhiro Iwamatsu
Cc: Simon Glass
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
V2: Add a test
---
.gitignore| 1 +
tools/binman/etype/renesas_rcar4_sa0.py | 46
: Marek Vasut
---
Cc: Nobuhiro Iwamatsu
Cc: Paul Barker
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
arch/arm/mach-renesas/Makefile | 10 ++
common/spl/Kconfig | 2 +-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-renesas/Makefile b/arch/arm/mach
Convert u-boot-spl.bin instead of u-boot-spl ELF into SCIF loader
compatible SREC. The u-boot-spl.bin includes SPL DT, while the ELF
does not, which leads to failure to start SPL via SCIF loader due
to missing SPL DT. Fix this by using u-boot-spl.bin which includes
the DT.
Signed-off-by: Marek
boot time.
Signed-off-by: Marek Vasut
---
Cc: Ilias Apalodimas
Cc: Nobuhiro Iwamatsu
Cc: Simon Glass
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
arch/arm/dts/r8a779g0-u-boot.dtsi | 78 ++-
1 file changed, 15 insertions(+), 63 deletions(-)
diff --git a/arch/arm/dts
payload(s) into RT-VRAM.
Signed-off-by: Marek Vasut
---
Cc: Ilias Apalodimas
Cc: Nobuhiro Iwamatsu
Cc: Simon Glass
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
.gitignore | 1 +
tools/binman/etype/renesas_rcar4_sa0.py | 46 +
2 files changed, 47
SPL stack at fixed location at the end of
System RAM instead, where it cannot interfere with the payload loaded
into RT-VRAM.
Signed-off-by: Marek Vasut
---
Cc: Nobuhiro Iwamatsu
Cc: Paul Barker
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
configs/r8a779g0_whitehawk_defconfig | 4 +++-
configs
LARITY,
+ EN8811H_POLARITY_RX_REVERSE |
+ EN8811H_POLARITY_TX_NORMAL, pbus_value);
+ if (ret < 0)
+ return ret;
+
+ ret = air_leds_init(phydev, EN8811H_LED_COUNT, AIR_PHY_LED_DUR,
+ AIR_LED_MODE_USER_DEFINE);
+ if (ret < 0) {
+ printf("Failed to disable leds: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
[...]
--
Best regards,
Marek Vasut
On 6/12/25 5:04 PM, Lucien.Jheng wrote:
Frank Wunderlich 於 2025/6/12 下午 10:44 寫道:
Am 12. Juni 2025 16:36:41 MESZ schrieb Tom Rini:
On Thu, Jun 12, 2025 at 10:09:48AM +,fran...@public-files.de wrote:
Gesendet: Sonntag, 11. Mai 2025 um 07:14
Von: "Lucien.Jheng"
Betreff: [U-Boot, v1, 1/1] n
/upstream/src/arm64/renesas/r8a779f0-spider-cpu.dtsi section &rwdt.
This driver is based on upstream linux commit:
e70140ba0d2b("Get rid of 'remove_new' relic from platform driver struct")
Signed-off-by: Shmuel Leib Melamud
Reviewed-by: Mattijs Korpershoek
Reviewed-by: Marek Vasut
Thanks !
V4H Sparrow Hawk board
support (2025-06-10 20:50:50 +0200)
Marek Vasut (2):
arm64: renesas: Introduce renesas_dram_init_banksize()
arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board
support
arch
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Signed-off-by: Marek Vasut
---
Cc: Paul Barker
Cc: Quentin Schulz
Cc: Simon Glass
Cc: Tom Rini
---
V2: Replace
There are no users of DELAY_ENVIRONMENT and the same effect can
be achieved either using DT /config/load-environment property,
or by using ENV_IS_NOWHERE . Remove this configuration option
and matching functionality.
Signed-off-by: Marek Vasut
---
Cc: Paul Barker
Cc: Quentin Schulz
Cc: Simon
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Also rename USE_DEFAULT_ENV_FILE to USE_ENV_DEFAULT_ENV_TEXT_FILE .
Signed-off-by: Marek Vasut
---
Cc: Paul Barker
Cc: Quentin
.
Retain the ENV_MMC_ prefix to make it easier to search for all the
SD/MMC related ENV options. Update the help text accordingly.
Signed-off-by: Marek Vasut
---
Cc: Paul Barker
Cc: Quentin Schulz
Cc: Simon Glass
Cc: Tom Rini
---
V2: Rename to ENV_MMC_EMMC_HW_PARTITION
---
arch/arm/mach-imx
.
Signed-off-by: Marek Vasut
---
Cc: Paul Barker
Cc: Quentin Schulz
Cc: Simon Glass
Cc: Tom Rini
---
V2: Rename to ENV_MMC_SW_PARTITION
---
doc/device-tree-bindings/config.txt | 2 +-
env/Kconfig | 19 +++
env/mmc.c | 4 ++--
3
accordingly.
Signed-off-by: Marek Vasut
---
Cc: Paul Barker
Cc: Quentin Schulz
Cc: Simon Glass
Cc: Tom Rini
---
V2: Rename to ENV_MMC_DEVICE_INDEX
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 2 +-
arch/arm/mach-imx/imx8/cpu.c | 4 ++--
arch/arm/mach-imx
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Reviewed-by: Quentin Schulz
Reviewed-by: Tom Rini
Signed-off-by: Marek Vasut
---
Cc: Paul Barker
Cc: Quentin Schulz
Cc: Simon
Rename the environment related variables and add ENV_ prefix, so that
all configuration options which are related to environment would have
an CONFIG_ENV_ prefix. No functional change.
Marek Vasut (8):
env: Rename OVERWRITE_ETHADDR_ONCE to ENV_OVERWRITE_ETHADDR_ONCE
env: Rename
Most of the sysinfo EEPROM node eeprom@50 is now part of the core DTs,
remove duplicate DT properties from *-u-boot.dtsi . Adjust the phandle
reference to i2c-eeprom in sysinfo node using <&{i2c_*/eeprom@50}> to
avoid need for DT label. No functional change.
Signed-off-by: Marek Vas
al duplicates of the same tags, as well as duplicate
property assignments which are part of the core DTs themselves.
Signed-off-by: Marek Vasut
---
Cc: Nobuhiro Iwamatsu
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
.../dts/r8a774a1-hihope-rzg2m-ex-u-boot.dtsi | 8
arch/arm/dts/r8a774a
On 6/3/25 5:06 AM, Shmuel Leib Melamud via B4 Relay wrote:
[...]
+++ b/drivers/watchdog/renesas_wdt.c
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright 2025 Red Hat, Inc., Shmuel Leib Melamud
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
N
.
Signed-off-by: Shmuel Leib Melamud
Reviewed-by: Marek Vasut
Thank you
for NVMe SSD,
debug UART and JTAG.
DT is imported from Linux next commit:
a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow
Hawk board support")
Signed-off-by: Marek Vasut
---
Cc: Nobuhiro Iwamatsu
Cc: Tom Rini
Cc: u-boot@lists.denx.de
---
.../arm/dts/r8a779
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