again.
On Wed, Dec 7, 2022 at 12:31 PM Leo Liang wrote:
>
> Hi Kautuk,
>
> On Tue, Dec 06, 2022 at 05:02:49PM +0530, Kautuk Consul wrote:
> > Hi Leo,
> >
> > On Tue, Dec 6, 2022 at 4:29 PM Leo Liang wrote:
> > >
> > > Hi Kautuk,
> > >
> >
depends for
SPL_FS_LOAD_PAYLOAD_NAME so that the code compiles fine.
Signed-off-by: Kautuk Consul
---
common/spl/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index fef01bdd7d..6c4848f3b9 100644
--- a/common/spl/Kconfig
+++ b/common
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul
---
arch/arm/Kconfig | 46 -
arch/arm/lib/semihosting.c | 181 +---
include
OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
// Run 64-bit u-boot-spl in qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
u-boot/spl/u-boot-spl.bin -device\
loader,file=u-boot/u-boot.itb,addr=0x8020 -semihosting-config enable=on
Kautuk Consul (3
hink it is okay to disable semihosting by default. Then the user
will configure it when needed.
So then can you ACK the first 2 patches ? I think we can leave out the
3rd qemu config patch for now.
>
> Best regards,
> Leo
>
> On Tue, Dec 06, 2022 at 11:12:41AM +0530, Kautuk Co
Hi,
On Mon, Dec 5, 2022 at 8:46 PM Sean Anderson wrote:
>
> On 12/5/22 00:51, Kautuk Consul wrote:
> > Hi,
> >
> > On Sat, Dec 3, 2022 at 9:44 AM Bin Meng wrote:
> >>
> >> On Fri, Sep 23, 2022 at 3:03 PM Kautuk Consul
> >> wrote:
> >&g
Hi,
On Sat, Dec 3, 2022 at 9:44 AM Bin Meng wrote:
>
> On Fri, Sep 23, 2022 at 3:03 PM Kautuk Consul
> wrote:
> >
> > To enable semihosting we also need to enable the following
> > configs in defconfigs:
> > CONFIG_SEMIHOSTING
> > CONFIG_SPL_SE
28 PM Bin Meng wrote:
> >
> > On Tue, Nov 29, 2022 at 2:58 PM Kautuk Consul
> wrote:
> > >
> > > I have tested it both on Qemu and Ventana's internal simulator.
> >
> > How to verify this? I used your instructions and U-Boot says: No match
>
> Err: serial_semihosting
> Net: eth0: virtio-net#1
> Hit any key to stop autoboot: 0
> =>
>
> 5555555
I have tested it both on Qemu and Ventana's internal simulator.
On Tue, Nov 29, 2022 at 12:06 PM Bin Meng wrote:
> Hi Kautuk,
>
> On Tue, Nov 29, 2022 at 2:29 PM Kautuk Consul
> wrote:
> >
> > Hi,
> >
> > Can someone pick this patchset up ?
> >
Hi,
Can someone pick this patchset up ?
It has been reviewed and there has been no comment on this in recent days.
Thanks.
On Fri, Sep 23, 2022 at 12:33 PM Kautuk Consul
wrote:
> Semihosting is a mechanism that enables code running on
> a target to communicate and use the Input/
Kautuk,
>
> On Fri, Sep 23, 2022 at 12:33:20PM +0530, Kautuk Consul wrote:
> > To enable semihosting we also need to enable the following
> > configs in defconfigs:
> > CONFIG_SEMIHOSTING
> > CONFIG_SPL_SEMIHOSTING
> > CONFIG_SEMIHOSTING_SERIAL
> >
To enable semihosting we also need to enable the following
configs in defconfigs:
CONFIG_SEMIHOSTING
CONFIG_SPL_SEMIHOSTING
CONFIG_SEMIHOSTING_SERIAL
CONFIG_SERIAL_PROBE_ALL
CONFIG_SPL_FS_EXT4
CONFIG_SPL_FS_FAT
Signed-off-by: Kautuk Consul
---
configs/qemu-riscv32_defconfig | 4
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul
---
arch/arm/Kconfig | 46 -
arch/arm/lib/semihosting.c | 181 +---
include
evice\
loader,file=u-boot/u-boot.itb,addr=0x80200000
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 46 ---
arch/arm/lib/semihosting.c
Hi Sean,
On Thu, Sep 22, 2022 at 10:35 PM Sean Anderson wrote:
>
>
>
> On 9/19/22 7:49 AM, Kautuk Consul wrote:
> > We add RISC-V semihosting based serial console for JTAG based early
> > debugging.
> >
> > The RISC-V semihosting specification is available at
Hi Sean,
On Thu, Sep 22, 2022 at 10:30 PM Sean Anderson wrote:
>
>
>
> On 9/19/22 7:49 AM, Kautuk Consul wrote:
> > We factor out the arch-independent parts of the ARM semihosting
> > implementation as a common library so that it can be shared
> > with RISC-V.
To enable semihosting we also need to enable the following
configs in defconfigs:
CONFIG_SEMIHOSTING
CONFIG_SPL_SEMIHOSTING
CONFIG_SEMIHOSTING_SERIAL
CONFIG_SERIAL_PROBE_ALL
CONFIG_SPL_FS_EXT4
CONFIG_SPL_FS_FAT
Signed-off-by: Kautuk Consul
---
configs/qemu-riscv32_defconfig | 4
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul
---
arch/arm/Kconfig | 46 -
arch/arm/lib/semihosting.c | 181 +---
include
0x80200000
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 46 ---
arch/arm/lib/semihosting.c | 181 +-
arch/riscv/include
Ugh.. made a mistake in one of the config options.
Please ignore this patchset too.
Will send out a v4 now. :-(
On Mon, Sep 19, 2022 at 4:53 PM Kautuk Consul wrote:
>
> We add RISC-V semihosting based serial console for JTAG based early
> debugging.
>
> The RISC-V semihosting s
To enable semihosting we also need to enable the following
configs in defconfigs:
CONFIG_SEMIHOSTING
CONFIG_SPL_SEMIHOSTING
CONFIG_SEMIHOSTING_SERIAL
CONFIG_SERIAL_PROBE_ALL
CONFIG_SPL_FS_EXT4
CONFIG_SPL_FS_FAT
Signed-off-by: Kautuk Consul
---
configs/qemu-riscv32_defconfig | 4
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul
---
arch/arm/Kconfig | 46 -
arch/arm/lib/semihosting.c | 181 +---
include
removing the
jump statement and moving the .align 4 to before the 2
.option directives.
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 46
Thanks for spotting that.
There was a config option selection that I was trying to avoid.
Will send out a v3 patch with your suggestions.
On Sat, Sep 17, 2022 at 11:10 PM Sean Anderson wrote:
>
> On 9/16/22 04:12, Kautuk Consul wrote:
> > We factor out the arch-independent part
do not spam me with unrelated emails and
> patches as I would loose track of patches and emails which are import
> and which I should review. Thanks.
>
> On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
> > Semihosting is a mechanism that enables code running on
> >
-boot.itb,addr=0x8020
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 2 +
arch/arm/lib/semihosting.c | 179 +-
arch/riscv
To enable semihosting we also need to enable the following
configs in defconfigs:
CONFIG_SEMIHOSTING
CONFIG_SPL_SEMIHOSTING
CONFIG_SEMIHOSTING_SERIAL
CONFIG_SERIAL_PROBE_ALL
CONFIG_SPL_FS_EXT4
CONFIG_SPL_FS_FAT
Signed-off-by: Kautuk Consul
---
configs/qemu-riscv32_defconfig | 4
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul
---
arch/arm/Kconfig | 2 +
arch/arm/lib/semihosting.c | 179 +--
include
-boot.itb,addr=0x8020
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 2 +
arch/arm/lib/semihosting.c | 179 +-
arch/riscv
Hi Sean,
Will address your comment in v2 by moving the ARM and RISCV code to generic
lib/semihosting.c.
On Thu, Sep 15, 2022 at 8:55 PM Sean Anderson wrote:
>
> Hi Kautuk,
>
> On 9/15/22 8:45 AM, Kautuk Consul wrote:
> > [You don't often get email from kcon...@ventanami
c lib/semihosting.c function.
On Thu, Sep 15, 2022 at 9:32 PM Sean Anderson wrote:
>
> Hi Kautuk,
>
> I've already noted my general remarks on this approach in response to
> your cover letter. This just has my comments on the RISC-V-specific
> parts.
>
> On 9/15/22 8:45 A
Hi Sean,
Thanks for the comments. Will address them in v2.
On Thu, Sep 15, 2022 at 9:35 PM Sean Anderson wrote:
>
>
>
> On 9/15/22 8:45 AM, Kautuk Consul wrote:
> > [You don't often get email from kcon...@ventanamicro.com. Learn why this is
> >
We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel
Signed-off-by: Kautuk Consul
---
arch/riscv
To use semihosting on qemu RISCV virt machine, we need the
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME define in qemu-riscv.h.
We also need to enable the following configs in defconfigs:
CONFIG_SEMIHOSTING
CONFIG_SPL_SEMIHOSTING
CONFIG_SEMIHOSTING_SERIAL
CONFIG_SERIAL_PROBE_ALL
Signed-off-by: Kautuk Consul
-riscv64_spl_defconfig
make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
// Run 64-bit u-boot-spl in qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
u-boot/spl/u-boot-spl.bin -device\
loader,file=u-boot/u-boot.itb,addr=0x8020
Kautuk Consul (2):
arch/riscv
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