From: Heiko Stuebner
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an
memory overlap, resulting in the not 100% helpful message of
"This will not be a case any time" from lmb_fix_over_lap_regions().
Adding a bit of debug info to lmb_fix_over_lap_region
This adds the otp node to the rk3576 soc devicetree including the
individual fields we know about.
Tested-by: Nicolas Frattaroli
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20250210224510.1194963-7-he...@sntech.de
[ upstream commit: 8715d2eeb062f6859c252bb6c87b363230b66e9f
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3576.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
drivers/net/dwc_eth_qos.c | 4 +
drivers/net/dwc_eth_qos_rockchip.c | 154 -
2 files changed, 157 insertions
The ROC-RK3576-PC is a SBC made by Firefly, designed around the RK3576
SoC. This adds the needed board infrastructure and config for it.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
arch/arm/dts/rk3576-roc-pc-u-boot.dtsi | 11 ++
arch/arm/mach-rockchip/rk3576/Kconfig
The rk3576 uses a different base-compatible, as starting with this
generation, the clock phase tuning is done via registers inside
the mmc controller and not from inside the CRU.
In U-Boot we do not tune at all, so no other code changes are
necessary.
Signed-off-by: Heiko Stuebner
Reviewed-by
header
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20250210205126.1173631-3-he...@sntech.de
[ upstream commit: 887ff17cdd8f088a52e2b61e71f2b6c9b9678de6 ]
(cherry picked from commit 388e7272d092bd20e414cd408bac39d8fd02d765)
---
.../src/arm64/rockchip/rk3576-roc-pc.dts
Add devicetree binding for the ROC-RK3576-PC SBC.
The board is based on the RK3576 SoC (4*Cortex-A72 + 4*Cortex-A53).
Acked-by: Rob Herring (Arm)
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20250210205126.1173631-2-he...@sntech.de
[ upstream commit
,
UART, SPI, GPIO and PWM.
Add arch core support for it.
Signed-off-by: Xuhui Lin
[adapted for mainline u-boot]
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
arch/arm/dts/rk3576-u-boot.dtsi | 131 +++
arch/arm/include/asm/arch-rk3576/boot0.h | 11
Add support for RK3576 to the rockchip sdhci driver.
It's pretty similar to its cousins found in the RK3568 and RK3588 and the
specific hs400-tx-tap number was taken from the vendor-u-boot.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jaehoon Chung
Reviewed-by: Jonas Karlman
---
driver
From: Elaine Zhang
Add clock driver support for Rockchip RK3576 SoC.
Signed-off-by: Elaine Zhang
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
.../include/asm/arch-rockchip/cru_rk3576.h| 491
drivers/clk/rockchip/Makefile
From: Xuhui Lin
Add support for rk3576 package header in mkimage tool.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index f158d156228..a0caa029cc0 100644
--- a/tools
move SYS_CONFIG_NAME symbol in rk3576/Kconfig
- one more CFG_SYS_SDRAM_BASE nitpick :-)
Elaine Zhang (2):
clk: rockchip: Add rk3576 clk support
reset: rockchip: implement rk3576 lookup table
Heiko Stuebner (10):
rockchip: sdram: honor CFG_SYS_SDRAM_BASE when defining ram regions
ram: rockchip
Add ddr driver for rk3576 to get the ram capacity.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
drivers/ram/rockchip/Makefile | 1 +
drivers/ram/rockchip/sdram_rk3576.c | 35 +
2 files changed, 36 insertions(+)
create mode 100644 drivers/ram
Add support for RK3576 compatible.
The RK3576 OTP uses the same read mechanism as the RK3588, just
with different values for offset and size.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
drivers/misc/rockchip-otp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
implementation done in the Linux-Kernel and also
how the rk3588 does this both in the Linux-Kernel as well as U-Boot.
Signed-off-by: Elaine Zhang
[adapted from mainline Linux code for u-boot]
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
arch/arm/include/asm/arch-rockchip/clock.h
well as the ATAG parser
to be usable on devices where CFG_SYS_SDRAM_BASE is not 0.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
Reviewed-by: Quentin Schulz
---
arch/arm/mach-rockchip/sdram.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach
From: Steven Liu
Add support for the rk3576 variant of pinctrl.
Signed-off-by: Steven Liu
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
---
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rk3576.c | 278
header
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20250210205126.1173631-3-he...@sntech.de
[ upstream commit: 887ff17cdd8f088a52e2b61e71f2b6c9b9678de6 ]
(cherry picked from commit 388e7272d092bd20e414cd408bac39d8fd02d765)
---
.../src/arm64/rockchip/rk3576-roc-pc.dts
Add devicetree binding for the ROC-RK3576-PC SBC.
The board is based on the RK3576 SoC (4*Cortex-A72 + 4*Cortex-A53).
Acked-by: Rob Herring (Arm)
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20250210205126.1173631-2-he...@sntech.de
[ upstream commit
From: Steven Liu
Add support for the rk3576 variant of pinctrl.
Signed-off-by: Steven Liu
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner
---
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rk3576.c | 279
drivers
From: Elaine Zhang
Add clock driver support for Rockchip RK3576 SoC.
Signed-off-by: Elaine Zhang
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner
---
.../include/asm/arch-rockchip/cru_rk3576.h| 491
drivers/clk/rockchip/Makefile |1 +
drivers/clk
Add support for RK3576 to the rockchip sdhci driver.
It's pretty similar to its cousins found in the RK3568 and RK3588 and the
specific hs400-tx-tap number was taken from the vendor-u-boot.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jaehoon Chung
---
drivers/mmc/rockchip_sdhci.c
The ROC-RK3576-PC is a SBC made by Firefly, designed around the RK3576
SoC. This adds the needed board infrastructure and config for it.
Signed-off-by: Heiko Stuebner
---
arch/arm/dts/rk3576-roc-pc-u-boot.dtsi | 11 ++
arch/arm/mach-rockchip/rk3576/Kconfig | 8 +
board/firefly/roc
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3576.
Signed-off-by: Heiko Stuebner
---
drivers/net/dwc_eth_qos.c | 4 +
drivers/net/dwc_eth_qos_rockchip.c | 154 -
2 files changed, 157 insertions(+), 1 deletion(-)
diff
The rk3576 uses a different base-compatible, as starting with this
generation, the clock phase tuning is done via registers inside
the mmc controller and not from inside the CRU.
In U-Boot we do not tune at all, so no other code changes are
necessary.
Signed-off-by: Heiko Stuebner
Reviewed-by
This adds the otp node to the rk3576 soc devicetree including the
individual fields we know about.
Tested-by: Nicolas Frattaroli
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20250210224510.1194963-7-he...@sntech.de
[ upstream commit: 8715d2eeb062f6859c252bb6c87b363230b66e9f
: add RK3576-specific syscon ids
Elaine Zhang (2):
clk: rockchip: Add rk3576 clk support
reset: rockchip: implement rk3576 lookup table
Heiko Stuebner (10):
rockchip: sdram: honor CFG_SYS_SDRAM_BASE when defining ram regions
ram: rockchip: Add rk3576 ddr driver support
rockchip: otp: Add su
Add ddr driver for rk3576 to get the ram capacity.
Signed-off-by: Heiko Stuebner
---
drivers/ram/rockchip/Makefile | 1 +
drivers/ram/rockchip/sdram_rk3576.c | 35 +
2 files changed, 36 insertions(+)
create mode 100644 drivers/ram/rockchip/sdram_rk3576.c
Add support for RK3576 compatible.
The RK3576 OTP uses the same read mechanism as the RK3588, just
with different values for offset and size.
Signed-off-by: Heiko Stuebner
---
drivers/misc/rockchip-otp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/misc/rockchip
implementation done in the Linux-Kernel and also
how the rk3588 does this both in the Linux-Kernel as well as U-Boot.
Signed-off-by: Elaine Zhang
[adapted from mainline Linux code for u-boot]
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/clock.h | 10 +
drivers/reset
,
UART, SPI, GPIO and PWM.
Add arch core support for it.
Signed-off-by: Xuhui Lin
[adapted for mainline u-boot]
Signed-off-by: Heiko Stuebner
---
arch/arm/dts/rk3576-u-boot.dtsi | 131 +++
arch/arm/include/asm/arch-rk3576/boot0.h | 11 ++
arch/arm/include/asm/arch
From: Detlev Casanova
The rk3576 defines some more different syscons, namely the IOC-syscon
holding io-controller registers and sdgmac holding settings for the
gmac controller.
Signed-off-by: Detlev Casanova
Signed-off-by: Heiko Stuebner
Reviewed-by: Quentin Schulz
---
arch/arm/include/asm
well as the ATAG parser
to be usable on devices where CFG_SYS_SDRAM_BASE is not 0.
Signed-off-by: Heiko Stuebner
Reviewed-by: Jonas Karlman
Reviewed-by: Quentin Schulz
---
arch/arm/mach-rockchip/sdram.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach
From: Xuhui Lin
Add support for rk3576 package header in mkimage tool.
Signed-off-by: Heiko Stuebner
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index f158d156228..a0caa029cc0 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
.
Suggested-by: Heinrich Schuchardt
Fixes: 1f68057e0320 ("net: eth_bootdev_hunt() should not run DHCP")
Signed-off-by: Heiko Stuebner
---
This also seems to work, to fix the dhcp problem.
So this is the counter-idea to the revert submitted in
https://lore.kernel.org/u-boot/20250401083830.23
From: Heiko Stuebner
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an
memory overlap, resulting in the not 100% helpful message of
"This will not be a case any time" from lmb_fix_over_lap_regions().
Adding a bit of debug info to lmb_fix_over_lap_region
RROR: `serverip' not set
As the original commit message talks about speed efficiencies for the EFI
side mostly, reverting this should just restore previous functionality
(and in fact does so on my Rockchip boards).
Signed-off-by: Heiko Stuebner
---
net/eth_bootdev.c | 30 -
well as the ATAG parser
to be usable on devices where CFG_SYS_SDRAM_BASE is not 0.
Signed-off-by: Heiko Stuebner
---
arch/arm/mach-rockchip/sdram.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index
,
UART, SPI, GPIO and PWM.
Add arch core support for it.
Signed-off-by: Xuhui Lin
[adapted for mainline u-boot]
Signed-off-by: Heiko Stuebner
---
arch/arm/dts/rk3576-u-boot.dtsi | 119 +
arch/arm/include/asm/arch-rk3576/boot0.h | 11 +
arch/arm/include/asm/arch-rk3576
implementation done in the Linux-Kernel and also
how the rk3588 does this both in the Linux-Kernel as well as U-Boot.
Signed-off-by: Elaine Zhang
[adapted from mainline Linux code for u-boot]
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/clock.h | 10 +
drivers/reset
the rk3576 CRU core.
Signed-off-by: Elaine Zhang
Signed-off-by: Sugar Zhang
Signed-off-by: Detlev Casanova
Reviewed-by: Rob Herring (Arm)
Link:
https://lore.kernel.org/r/0102019199a76766-f3a2b53f-d063-458b-b0d1-dfbc2ea1893c-000...@eu-west-1.amazonses.com
Signed-off-by: Heiko Stuebner
Add devicetree binding for the ROC-RK3576-PC SBC.
The board is based on the RK3576 SoC (4*Cortex-A72 + 4*Cortex-A53).
Signed-off-by: Heiko Stuebner
---
dts/upstream/Bindings/arm/rockchip.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/dts/upstream/Bindings/arm/rockchip.yaml
b
This adds the otp node to the rk3576 soc devicetree including the
individual fields we know about.
Signed-off-by: Heiko Stuebner
---
dts/upstream/src/arm64/rockchip/rk3576.dtsi | 39 +
1 file changed, 39 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3576.dtsi
The ROC-RK3576-PC is a SBC made by Firefly, designed around the RK3576
SoC. This adds the needed board infrastructure and config for it.
Signed-off-by: Heiko Stuebner
---
arch/arm/dts/rk3576-roc-pc-u-boot.dtsi | 12
arch/arm/mach-rockchip/rk3576/Kconfig | 9 +++
board/firefly/roc-pc
From: Xuhui Lin
Add support for rk3576 package header in mkimage tool.
Signed-off-by: Heiko Stuebner
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 3e52236b15a..d89c7d3afea 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
header
Signed-off-by: Heiko Stuebner
---
.../src/arm64/rockchip/rk3576-roc-pc.dts | 736 ++
1 file changed, 736 insertions(+)
create mode 100644 dts/upstream/src/arm64/rockchip/rk3576-roc-pc.dts
diff --git a/dts/upstream/src/arm64/rockchip/rk3576-roc-pc.dts
b/dts/upstream
):
dt-bindings: power: Add support for RK3576 SoC
Heiko Stuebner (11):
dt-bindings: clock, reset: fix top-comment indentation rk3576 headers
DONOTMERGE: arm64: dts: rockchip: add rk3576 otp node
DONOTMERGE: dt-bindings: arm: rockchip: Add Firefly ROC-RK3576-PC
binding
DONOTMERGE
Block comments should align the * on each line, as checkpatch rightfully
pointed out, so fix that style issue on the newly added rk3576 headers.
Fixes: 49c04453db81 ("dt-bindings: clock, reset: Add support for rk3576")
Signed-off-by: Heiko Stuebner
Link: https://lore.ke
Add ddr driver for rk3576 to get the ram capacity.
Signed-off-by: Heiko Stuebner
---
drivers/ram/rockchip/Makefile | 1 +
drivers/ram/rockchip/sdram_rk3576.c | 65 +
2 files changed, 66 insertions(+)
create mode 100644 drivers/ram/rockchip/sdram_rk3576.c
Add support for RK3576 to the rockchip sdhci driver.
It's pretty similar to its cousins found in the RK3568 and RK3588 and the
specific hs400-tx-tap number was taken from the vendor-u-boot.
Signed-off-by: Heiko Stuebner
---
drivers/mmc/rockchip_sdhci.c | 12
1 file change
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3576.
Signed-off-by: Heiko Stuebner
---
drivers/net/dwc_eth_qos.c | 4 +
drivers/net/dwc_eth_qos_rockchip.c | 141 -
2 files changed, 144 insertions(+), 1 deletion(-)
diff
Add support for RK3588 compatible.
The RK3576 OTP uses the same read mechanism as the RK3588, just
with different values for offset and size.
Signed-off-by: Heiko Stuebner
---
drivers/misc/rockchip-otp.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/misc/rockchip
From: Elaine Zhang
Add clock driver support for Rockchip RK3576 SoC.
Signed-off-by: Elaine Zhang
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner
---
.../include/asm/arch-rockchip/cru_rk3576.h| 486
drivers/clk/rockchip/Makefile |1 +
drivers/clk
From: Detlev Casanova
The rk3576 defines some more different syscons, namely the IOC-syscon
holding io-controller registers and sdgmac holding settings for the
gmac controller.
Signed-off-by: Detlev Casanova
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/clock.h | 2
The rk3576 uses a different base-compatible, as starting with this
generation, the clock phase tuning is done via registers inside
the mmc controller and not from inside the CRU.
In U-Boot we do not tune at all, so no other code changes are
necessary.
Signed-off-by: Heiko Stuebner
---
drivers
From: Steven Liu
Add support for the rk3576 variant of pinctrl.
Signed-off-by: Steven Liu
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner
---
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rk3576.c | 287
drivers
From: Finley Xiao
Define power domain IDs as described in the TRM and add compatible for
rockchip,rk3576-power-controller
Signed-off-by: Finley Xiao
Co-Developed-by: Detlev Casanova
Signed-off-by: Detlev Casanova
Acked-by: Conor Dooley
Link:
https://lore.kernel.org/r/20240814222824.3170-2-d
Am Mittwoch, 20. November 2024, 12:13:32 CET schrieb Quentin Schulz:
> On 11/20/24 11:19 AM, Heiko Stuebner wrote:
> > The mask for aclk_vop_root is 3-bit wide, not 2-bit wide according
> > to the TRM, so set the mask accordingly.
> >
> > Signed-off-by: Heiko Stuebner
The mask for aclk_vop_root is 3-bit wide, not 2-bit wide according
to the TRM, so set the mask accordingly.
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/cru_rk3588.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-rockchip
models.
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240810211438.286441-3-he...@sntech.de
[ upstream commit: da6f4130234448122fe3e66c8116f7d9eea8a5c7 ]
(cherry picked from commit 0b3109708caf5002ba188ae28eae9ce46b2c39b4)
Reviewed-by: Kever Yang
---
.../src/arm64/rockchip
The TS433 doesn't provide display output, but the gpu nevertheless can be
used for compute tasks for example.
So there is no reason not to enable it.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-14-he...@sntech.de
[ ups
add 2 pmu_io_domain supplies for
Qnap-TS433")
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240805162052.3345768-1-he...@sntech.de
[ upstream commit: 40cc4257169712f0ae3835820a4c5afbdd1a16ff ]
(cherry picked from commit f509fcb1fb82117e551b489592ac5714a6c5cd8d)
Reviewed-by: Kever Yang
https://lore.kernel.org/r/20240304084612.711678-2-uklei...@debian.org
Signed-off-by: Heiko Stuebner
[ upstream commit: e8d45544f806f3b55c30345de84262cbb9504902 ]
(cherry picked from commit e0bbe061fd537bd7b113c53eb046bbcbf0e6597d)
Reviewed-by: Kever Yang
---
dts/upstream/src/arm64/rockchip/rk3568-qnap-ts4
is related to vcc3v3_sd. This regulator needs to stay on.
When turned off because of no users, access to both PCIe controllers
will stall. Maybe this rail does supply the 100MHz refclk generation
or so.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r
: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-11-he...@sntech.de
[ upstream commit: 9b682d31b24f1f70b5b4d0618095d46e0722b9d8 ]
(cherry picked from commit f0b858c751382ee9faf18f9b19b0817c6b50ac1c)
Reviewed-by: Kever Yang
---
.../src/arm64
Add the two supplies for the pmu-io-domains that are defined in the
vendor devicetree for the TS433.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-15-he...@sntech.de
[ upstream commit: 64b7f16fb3947e5d08d9e9b860ce966250e45d52
ff-by: Heiko Stuebner
---
arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi | 6 ++
arch/arm/mach-rockchip/rk3568/Kconfig | 14
board/qnap/ts433/Kconfig | 12 +++
board/qnap/ts433/MAINTAINERS | 8 ++
configs/qnap-ts433-rk3568_defconfig
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-12-he...@sntech.de
[ upstream commit: 99b36ba910d896bddbb9a190ca686c6d9cd0325f ]
(cherry picked from commit 2f0afd1a3cbf6f3192dc7a5c496affab718671b3)
Reviewed-by: Kever Yang
---
.../src/arm64/rockchip/rk3568
Add the 4 gpio-controlled LEDs to the Qnap-TS433.
They are meant for individual disk activitivy, but I haven't found a
way for how to connect them to their individual sata slot yet.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.11
battery backed to keep the time.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-8-he...@sntech.de
[ upstream commit: dadd4256e12360d3ff1f6481b2e4697f9d890caf ]
(cherry picked from commit cb53815764403f7f17967a32eec2aeb6625b396f
Add the vcc3v3-supply regulator and its link to the pcie controllers.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-2-he...@sntech.de
[ upstream commit: e0ec6d48226fb3d4df18895b56f0b7a94c0fe474 ]
(cherry picked from commit
Enable the tsadc node to allow for temperature measurements of the soc.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-10-he...@sntech.de
[ upstream commit: 2df9d20306fd0d04b88fcbbf36d76fb67f11 ]
(cherry picked from commit
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436
Enable usb controllers and phys and add regulator infrastructure for the
usb ports on the TS433.
Of course there are no schematics available for the device, so the
regulator information comes from the vendor-devicetree with unknown
accuracy.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko
The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r
Uart0 is connected to an MCU on the board that handles system control
like the fan-speed. So far no driver for it is available though.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-4-he...@sntech.de
[ upstream commit
As most Rockchip boards do, the TS433 also uses uart2 for its serial
output. Set the correct chosen entry for it.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-6-he...@sntech.de
[ upstream commit
icked upstream dts commits, now that they are
merged
Heiko Stuebner (17):
arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433
arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433
arm64: dts: rockchip: enable uart0 on Qnap-TS433
arm64: dts: rockchip: enable usb por
Hi Kever,
Am Montag, 28. Oktober 2024, 09:39:27 CET schrieb Kever Yang:
> On 2024/10/26 10:39, Kever Yang wrote:
> > Hi Heiko,
> >
> > I got a ci error for this patch:
> >
> > https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/jobs/929839
> >
> > +Image 'simple-bin-spi' is missing exte
The TS433 doesn't provide display output, but the gpu nevertheless can be
used for compute tasks for example.
So there is no reason not to enable it.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-14-he...@sntech.de
[ ups
models.
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240810211438.286441-3-he...@sntech.de
[ upstream commit: da6f4130234448122fe3e66c8116f7d9eea8a5c7 ]
(cherry picked from commit 0b3109708caf5002ba188ae28eae9ce46b2c39b4)
---
.../src/arm64/rockchip/rk3568-qnap-ts433.dts
add 2 pmu_io_domain supplies for
Qnap-TS433")
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240805162052.3345768-1-he...@sntech.de
[ upstream commit: 40cc4257169712f0ae3835820a4c5afbdd1a16ff ]
(cherry picked from commit f509fcb1fb82117e551b489592ac5714a6c5cd8d)
---
dts/upstream
ff-by: Heiko Stuebner
---
arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi | 6 ++
arch/arm/mach-rockchip/rk3568/Kconfig | 14
board/qnap/ts433/Kconfig | 12 +++
board/qnap/ts433/MAINTAINERS | 8 ++
configs/qnap-ts433-rk3568_defconfig
Add the two supplies for the pmu-io-domains that are defined in the
vendor devicetree for the TS433.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-15-he...@sntech.de
[ upstream commit: 64b7f16fb3947e5d08d9e9b860ce966250e45d52
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-12-he...@sntech.de
[ upstream commit: 99b36ba910d896bddbb9a190ca686c6d9cd0325f ]
(cherry picked from commit 2f0afd1a3cbf6f3192dc7a5c496affab718671b3)
---
.../src/arm64/rockchip/rk3568-qnap-ts433.dts | 41
: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-11-he...@sntech.de
[ upstream commit: 9b682d31b24f1f70b5b4d0618095d46e0722b9d8 ]
(cherry picked from commit f0b858c751382ee9faf18f9b19b0817c6b50ac1c)
---
.../src/arm64/rockchip/rk3568-qnap-ts433
is related to vcc3v3_sd. This regulator needs to stay on.
When turned off because of no users, access to both PCIe controllers
will stall. Maybe this rail does supply the 100MHz refclk generation
or so.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r
https://lore.kernel.org/r/20240304084612.711678-2-uklei...@debian.org
Signed-off-by: Heiko Stuebner
[ upstream commit: e8d45544f806f3b55c30345de84262cbb9504902 ]
(cherry picked from commit e0bbe061fd537bd7b113c53eb046bbcbf0e6597d)
---
dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 4 +---
1 file c
cherry-picked dts patches landed in the 6.12-rc1 merge window in
the Linux kernel.
This currently goes on top of today's u-boot master.
Heiko Stuebner (17):
arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433
arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433
Enable the tsadc node to allow for temperature measurements of the soc.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-10-he...@sntech.de
[ upstream commit: 2df9d20306fd0d04b88fcbbf36d76fb67f11 ]
(cherry picked from commit
Add the 4 gpio-controlled LEDs to the Qnap-TS433.
They are meant for individual disk activitivy, but I haven't found a
way for how to connect them to their individual sata slot yet.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.11
As most Rockchip boards do, the TS433 also uses uart2 for its serial
output. Set the correct chosen entry for it.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-6-he...@sntech.de
[ upstream commit
The TS433 has 4 bays. The last two are accessed via a pci-connected
sata controller, while the first two are accessed via the rk3568's
sata controllers. Enable these two now.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436
Uart0 is connected to an MCU on the board that handles system control
like the fan-speed. So far no driver for it is available though.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-4-he...@sntech.de
[ upstream commit
battery backed to keep the time.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-8-he...@sntech.de
[ upstream commit: dadd4256e12360d3ff1f6481b2e4697f9d890caf ]
(cherry picked from commit cb53815764403f7f17967a32eec2aeb6625b396f
Add the vcc3v3-supply regulator and its link to the pcie controllers.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-2-he...@sntech.de
[ upstream commit: e0ec6d48226fb3d4df18895b56f0b7a94c0fe474 ]
(cherry picked from commit
The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r
Enable usb controllers and phys and add regulator infrastructure for the
usb ports on the TS433.
Of course there are no schematics available for the device, so the
regulator information comes from the vendor-devicetree with unknown
accuracy.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko
: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-11-he...@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner
---
.../src/arm64/rockchip/rk3568-qnap-ts433.dts | 29
The TS433 doesn't provide display output, but the gpu nevertheless can be
used for compute tasks for example.
So there is no reason not to enable it.
Tested-by: Uwe Kleine-König
Signed-off-by: Heiko Stuebner
Link: https://lore.kernel.org/r/20240723195538.1133436-14-he...@sntech.de
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