diff --git a/drivers/clk/qcom/clock-sm8250.c b/drivers/clk/qcom/clock-sm8250.c
---
Regards,
Alexey Minnekhanov
From: Alexey Minnekhanov
Most device vendors put "Volume Down" button onto PMIC RESIN.
But Sony is special: see
dts/upstream/src/arm64/qcom/sdm630-sony-xperia-nile.dtsi or [1].
They put "Volume Down" on PMIC GPIO 7 where others usually put
"Volume Up", and KEY
anges[MSM_PINCTRL_MAX_RESERVED_RANGES * 2];
+ int reserved_ranges_count;
};
Why storing of reserved pins isn't implemented using bitmap?
DECLARE_BITMAP(reserved_pins, 256);
would only consume 32 bytes, instead of 256+4 like here.
Do I miss something?
---
Regards,
Alexey Minnekhanov
,
+ { }
+};
+
I've added 2 compatibles here to the top of that list
+ { .compatible = "qcom,pm660-gpio" },
+ { .compatible = "qcom,pm660l-gpio" },
and was able to confirm with "dm tree" that new driver is in use and it
works fine (Vo
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.
Correct pin configuration is required for working debug UART
and eMMC/SD cards.
SDM630 and SDM660 TLMM blocks are the same.
Signed-off-by: Alexey Minnekhanov
Reviewed-by
Setting 'dr_mode' to OTG\n",
fdt_get_name(blob, node, NULL));
+ fdt_setprop_string(fdt, node, "dr_mode", "otg");
+ break;
+ }
}
return 0;
}
This fixes USB mode on all my sdm660/636 boards that should only use
gadget mode.
Tested-by: Alexey Minnekhanov
---
Regards,
Alexey Minnekhanov
Imported from Linux driver.
Note that already existing but previously unused member of
struct qusb2_phy::has_se_clk_scheme is now utilized for it's
purpose.
Signed-off-by: Alexey Minnekhanov
---
drivers/phy/qcom/phy-qcom-qusb2.c | 42 ++-
1 file change
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.
Correct pin configuration is required for working debug UART
and eMMC/SD cards.
SDM630 and SDM660 TLMM blocks are the same.
Signed-off-by: Alexey Minnekhanov
---
drivers
On 1/8/25 5:40 PM, Caleb Connolly via groups.io wrote:
Hi Alexey,
Thanks for the patch! Really happy to see support for this new platform.
On 08/01/2025 12:59, Alexey Minnekhanov wrote:
Apparently not all GDSCs are the same. In Linux driver, depending on which
GDSC flags are set, different
t;\033[0m"
static const char * const logo_lines[] = {
---
base-commit: 2b1c8d3b2da46ce0f7108f279f04bc66f1d8d09a
change-id: 20250203-ufetch-vidconsole-colours-0e6a9ebe2475
Best regards,
I can see colors on my framebuffer now, thanks!
Tested-by: Alexey Minnekhanov
On 1/22/25 6:02 PM, Caleb Connolly via groups.io wrote:
+config PINCTRL_QCOM_SC7280
+ bool "Qualcomm SC7280/QCM6490 GCC"
+ select PINCTRL_QCOM
Hi!
And again, no, this is not GCC, this block is called TLMM.
GCC is for clock controller.
Add driver for Global Clock Controller used in Qualcomm
SDM630/660 SoCs.
Signed-off-by: Alexey Minnekhanov
---
drivers/clk/qcom/Kconfig| 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock-sdm660.c | 180
3 files changed, 189
U-Boot that do
need this change.
Signed-off-by: Alexey Minnekhanov
---
drivers/clk/qcom/clock-sc7280.c | 4 ++--
drivers/clk/qcom/clock-sdm845.c | 26 +-
drivers/clk/qcom/clock-sm8150.c | 14 +++---
drivers/clk/qcom/clock-sm8550.c | 16
drivers/clk
driver, to make it easier to compare which flags are needed
for which GDSC, making porting process easier.
Signed-off-by: Alexey Minnekhanov
---
drivers/clk/qcom/clock-qcom.c | 45 ---
drivers/clk/qcom/clock-qcom.h | 16 -
2 files changed, 46 inserti
On 11/24/24 23:27, Caleb Connolly via groups.io wrote:
From: Neil Armstrong
Add pinctrl driver for the TLMM block found in the X1E80100 SoC.
Signed-off-by: Neil Armstrong
+config PINCTRL_QCOM_X1E80100
+ bool "Qualcomm X1E80100 GCC"
That's not GCC though. Pin controllers on qcom S
Clearly say whether it's stuck during power on or power off.
Signed-off-by: Alexey Minnekhanov
---
drivers/clk/qcom/clock-qcom.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c
index 25ca67e537d1..1cfc430
On 12/6/24 19:50, Julius Lehmann wrote:
On 04.10.24 14:46, Caleb Connolly wrote:
Phones don't have keyboards! Introduce a phone-specific config fragment
and associated environment file to make U-Boot more useful on these
devices. This allows for navigating via the buttons and enabling
various US
t seems to work fine. I now see in Linux dmesg:
[0.00] KASLR enabled
Without this patch it was:
[0.00] KASLR disabled due to lack of seed
Tested-by: Alexey Minnekhanov
On 2023-01-19 11:47, Sumit Garg wrote:
On Mon, 16 Jan 2023 at 06:04, Alexey Minnekhanov
wrote:
Now that reg-names is required, specify them, and use correct
addresses for SPMI arbiter regs, taken from Linux dts [1] [2].
[1]
https://elixir.bootlin.com/linux/v6.1.5/source/arch/arm64/boot/dts
On 2023-01-19 11:44, Sumit Garg wrote:
On Mon, 16 Jan 2023 at 06:04, Alexey Minnekhanov
wrote:
Update spmi-msm documentation and example to reflect the current
state of the driver.
Since our long term goal is to align with Linux DT bindings and use
the DTS imported from Linux as is. So we
On 2023-01-19 11:36, Sumit Garg wrote:
On Mon, 16 Jan 2023 at 06:03, Alexey Minnekhanov
wrote:
...
- config_addr = dev_read_addr_index(dev, 0);
- priv->spmi_core = dev_read_addr_index(dev, 1);
- priv->spmi_obs = dev_read_addr_index(dev, 2);
+ /* DTS bindings: reg
Hi!
On 2023-01-19 20:18, Dzmitry Sankouski wrote:
GPIO button driver requires direction functions to probe
button gpio. Those functions are blank, since pwrkey gpio
configured earlier not by u-boot.
...
+/*
+ * Power button already configured as input by previous bootloader.
+ */
+static int
riable was introduced, it was not used
in read/write operations in that function. Fix this inconsistency,
use calculated ch_offset instead of SPMI_CH_OFFSET(..).
Fixes: f5a2d6b4b03a ("spmi: msm: add arbiter version 5 support")
Signed-off-by: Alexey Minnekhanov
---
drivers/spmi/spmi-msm.c | 19 ++
/sdm845.dtsi#L4896
Signed-off-by: Alexey Minnekhanov
---
arch/arm/dts/qcs404-evb.dts | 7 ---
arch/arm/dts/sdm845.dtsi| 8
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 0639af8fe336..6bf6736139ed
Update spmi-msm documentation and example to reflect the current
state of the driver.
Signed-off-by: Alexey Minnekhanov
---
doc/device-tree-bindings/spmi/spmi-msm.txt | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/doc/device-tree-bindings/spmi/spmi
Linux driver, use core reg to read version
from [1]. This fixes reading incorrect arbiter version.
Third, print addresses in hex, so it can be visually
compared to values in DTS more easily.
[1]:
https://elixir.bootlin.com/linux/v6.1.6/source/drivers/spmi/spmi-pmic-arb.c#L1339
Signed-off-by: Alexey
Variable err is never initialized and therefore not needed,
as well as the whole error handler block; the mentioned
"APID->PPID mapping table" is never read in the code anyways.
Signed-off-by: Alexey Minnekhanov
---
drivers/spmi/spmi-msm.c | 6 --
1 file changed, 6 deletions(-
In the process of porting my board to u-boot I've noticed incorrect
behaviour, some things that clearly look wrong, and other strange
things. Here go several fixes to MSM SPMI driver, mostly related
to newer platforms support.
Alexey Minnekhanov (5):
spmi: msm: Remove wrong and unused
or more) modes of operation and
several register sets inside msm uartdm?
I'm also using u-boot as chain-loaded boot loader, so I'm using uart as
it was configured by previous stage boot loader. Maybe which registers
to use depends on how the controller was initially configured?
---
Regards,
Alexey Minnekhanov
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