From: Alif Zakuan Yuslaimi
The boot_scratch_cold register is generally used for passing
critical system info between SPL, U-Boot and Linux.
Documenting the usage of boot_scratch_cold8 and boot_scratch_cold9
sticky registers for capturing the Uncorrected Errors
(UE) and the UE Address. This is to
On Thu, 20 Feb 2025 at 16:20, Heinrich Schuchardt
wrote:
>
> On 20.02.25 10:56, Sughosh Ganu wrote:
> > The actual logic to allocate a region of memory is in the
> > _lmb_alloc_base() function. The lmb_alloc() API function calls
> > lmb_alloc_base(), which then calls _lmb_alloc_base() to do the
>
On Thu, 20 Feb 2025 at 16:16, Heinrich Schuchardt
wrote:
>
> On 20.02.25 10:56, Sughosh Ganu wrote:
> > The lmb_reserve() function now does a check for a reservation request
> > with existing reserved regions, and returns -EEXIST in case of an
> > overlap. Remove this now redundant check from lmb_
From: Benjamin Lemouzy
Loading a FIT kernel image with hash hardware acceleration enabled
(CONFIG_SHA_HW_ACCEL=y) displays the following CACHE warning:
[...]
Trying 'kernel-1' kernel subimage
[...]
Verifying Hash Integrity ... sha256CACHE: Misaligned operation at
range [16000128,
On Thu, 20 Feb 2025 at 13:10, Varadarajan Narayanan
wrote:
>
> Introduce a defconfig for the Qualcomm IPQ9574 SoC based RDPs.
> Presently supports eMMC.
>
> Per the flash memory layout, U-Boot size cannot exceed 756KB. With this
> defconfig, u-boot.mbn size is ~480KB.
>
> Reviewed-by: Caleb Connol
On Tue, 11 Feb 2025 15:19:28 +0530, Anurag Dutta wrote:
> The u-boot is unable to load the FIT image due to incorrect
> boot arguments in case of am57_hs evm as can be seen in [1].
> This series introduces multiple changes pertaining to several
> environment variables and overlays that are respons
On Mon, 10 Feb 2025 07:25:45 -0800, Daniel Schultz wrote:
> Enable ENV_IS_IN_SPI_FLASH to read the environment from the SPI
> flash when booting from it. The oftree, kernel and ramdisk sizes
> are located in this environment and therefore required to boot
> an initramfs.
>
>
Applied to u-boot/n
On Mon, 10 Feb 2025 16:52:23 +0530, Siddharth Vadapalli wrote:
> This series enables USB DFU and USB Mass Storage functionality for
> AM62, AM62-LP, AM62A, AM62P and J722S SoCs.
>
> Series is based on commit
> d6da3dbaef Merge patch series "cmd: Add support for optee commands."
> of the next bran
On 2/20/25 00:22, Anshul Dalal wrote:
On Wed Feb 19, 2025 at 9:17 PM IST, Sean Anderson wrote:
On 2/18/25 01:07, Anshul Dalal wrote:
On Sat Feb 15, 2025 at 11:18 PM IST, Sean Anderson wrote:
On 2/14/25 06:12, Anshul Dalal wrote:
Hi all!
I was trying to implement falcon boot on TI AM62x EVM w
On Thu, 20 Feb 2025 at 09:56, Quentin Schulz wrote:
>
> From: Quentin Schulz
>
> Essentially the only differences between u-boot-rockchip.bin and
> u-boot-rockchip-spi.bin are the formatting of idbloader.img which is
> handled by mkimage (via -T rkspi/rksd) and the offset at which U-Boot
> proper
On Thu, 20 Feb 2025 at 09:56, Quentin Schulz wrote:
>
> From: Quentin Schulz
>
> This was only used on RK3399 Gru Chromebooks and their maintainer
> (Simon) agreed[1] to its removal on the basis that the generic
> u-boot-rockchip-spi.bin is now enough, so let's do that.
>
> At the same time, remo
On Thu, 20 Feb 2025 at 09:56, Quentin Schulz wrote:
>
> From: Quentin Schulz
>
> This was only used on RK3288 Chromebooks and the EVB.
>
> If it follows the same pattern as for RK3399 Chromebooks where their
> maintainer (Simon) agreed[1] to removal of u-boot.rom on the basis that
> the generic u
> -邮件原件-
> 发件人: Marek Vasut
> 发送时间: 2025年2月21日 6:35
> 收件人: Alice Guo (OSS) ; Tom Rini
> ; Stefano Babic ; Fabio Estevam
> ; dl-uboot-imx ; Lukasz
> Majewski ; Sean Anderson ; Simon
> Glass ; Alper Nebi Yasak
> 抄送: u-boot@lists.denx.de; thar...@gateworks.com; Alice Guo
>
> 主题: Re: 回复: [PA
Hi Tom,
On Thu, 20 Feb 2025 at 13:40, Tom Rini wrote:
>
> On Thu, Feb 20, 2025 at 11:13:34AM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On Thu, 20 Feb 2025 at 10:40, Tom Rini wrote:
> > >
> > > On Thu, Feb 20, 2025 at 09:43:10AM -0700, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Thu
On Thu, Feb 20, 2025 at 12:58:46PM -0800, Stephen Boyd wrote:
> Lay the groundwork to run U-Boot as a payload on ARM coreboot based
> devices. Move the coreboot table parsing code out of arch/x86 into
> lib/coreboot. The headers like cb_sysinfo.h and coreboot_tables.h need
> to be globally accessi
On Thu, Feb 20, 2025 at 12:58:47PM -0800, Stephen Boyd wrote:
> Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
> top of the 4G address space.
>
> Signed-off-by: Stephen Boyd
> ---
> arch/arm/Kconfig | 2 ++
We can't really ask SYS_COREBOOT in two p
On Thu, Feb 20, 2025 at 12:58:49PM -0800, Stephen Boyd wrote:
> This command isn't x86 specific. Move it up one level so that it can be
> used on a platform that can find the coreboot table, i.e. x86 or ARM.
>
> Signed-off-by: Stephen Boyd
> ---
> cmd/Kconfig | 2 +-
> cmd/Makefile
Hi Stephen,
On 2/20/25 20:58, Stephen Boyd wrote:
This series supports running U-Boot as a payload on sc7180 Trogdor
Chromebooks like Lazor or Wormdingler. This is a jumble of different
patches to get to the final goal of booting a Linux distro from the eMMC
on Lazor. I've yet to craft a USB sti
The ROCKCHIP_COMMON_STACK_ADDR Kconfig option was originally enabled
in the SoC specific Kconfig files to ease during the initial migration
to use common stack addresses.
All boards for the affected SoCs have been migrated to use common stack
addresses. Migrate to use an imply under the SoC symbol
Drop SoC specific TEXT_BASE and use a common TEXT_BASE for all SoCs.
Move the common TEXT_BASE to 8 MiB offset from start of DRAM to help
support RAM boot from maskrom introduced in next patch.
RAM boot from maskrom mode will expect the FIT payload to be located at
2 MiB offset from start or DRAM
On 2/18/25 12:53 PM, Alice Guo (OSS) wrote:
[...]
@@ -436,6 +442,11 @@ static int scmi_bind_protocols(struct udevice *dev)
drv = DM_DRIVER_GET(scmi_voltage_domain);
}
break;
+ case SCMI_PROTOCOL_ID_PIN
Imply ROCKCHIP_MASKROM_IMAGE to build maskrom RAM boot images for
RK3308, RK3328, RK3399, RK356x and RK3588.
Signed-off-by: Jonas Karlman
---
These are SoCs that have fully migrated to COMMON_STACK_ADDR and that
I have been able to runtime test maskrom RAM boot on.
An alternative approach could
The BootROM in Rockchip SoCs will enter maskrom mode when boot firmware
cannot be found in nand/spi/mmc storage.
In maskrom mode the USB OTG port can accept one of two custom commands.
Initially a 0x471 command to load TPL into SRAM. After TPL has been
executed and it has returned back-to-BROM, a
The BootROM in Rockchip SoCs will enter maskrom mode when boot firmware
cannot be found in nand/spi/mmc storage.
In maskrom mode the USB OTG port can accept one of two custom commands.
Initially a 0x471 command to load TPL into SRAM. After TPL has been
executed and it has returned back-to-BROM, a
The Rockchip RK3576 SoC uses a different DRAM base address, 0x4000,
compared to prior SoCs.
Add default options that should work when 0x4000 is used as DRAM
base address. Use same offsets as before, just below 64 MiB.
Signed-off-by: Jonas Karlman
---
v2: No change
Cc: Heiko Stuebner
--
New Rockchip SoCs will typically require use or an external TPL when
support for the SoC is added to U-Boot.
Move imply ROCKCHIP_EXTERNAL_TPL under SoC Kconfig symbol to remove a
future likelihood of a long "default y if" line.
Signed-off-by: Jonas Karlman
---
v2: No change
---
arch/arm/mach-ro
The stack-pointer addresses used with ROCKCHIP_COMMON_STACK_ADDR expect
that DRAM is initialized by TPL or ROCKCHIP_EXTERNAL_TPL, that SPL has
access to full DRAM and SPL is loaded to/executed from start of DRAM.
Add depends on to ensure use of the ROCKCHIP_COMMON_STACK_ADDR symbol
does not cause
A few Rockchip ARMv7 SoCs use 0x6000 as DRAM base address instead of
the more common 0x0 DRAM base address used on AArch64 SoCs.
Add default options that should work for these ARMv7 SoCs. Same offsets
as before are used, just below 64 MiB. Hex values have also been padded
to improve alignment.
Use of the Kconfig symbol ROCKCHIP_COMMON_STACK_ADDR is currently
not working well when a SoC needs to use a custom tpl.c and the default
values are only working when DRAM base address is 0x0.
This series changes to not imply TPL_ROCKCHIP_COMMON_BOARD and instead
let each SoC symbol decide. It als
The Kconfig symbol ROCKCHIP_COMMON_STACK_ADDR currently imply the
TPL_ROCKCHIP_COMMON_BOARD option when TPL=y. This is inconvenient for a
SoC with very limited SRAM to use a custom tpl.c together with the
common stack addresses.
Move any imply TPL_ROCKCHIP_COMMON_BOARD to under the SoC symbol, whe
With all of the reported warnings now fixed, update to current pylint
version.
Signed-off-by: Tom Rini
---
.azure-pipelines.yml | 2 +-
.gitlab-ci.yml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 1f2766eae160..d5cf
Add a SPI driver for Qualcomm's GENI hardware.
Signed-off-by: Stephen Boyd
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile| 1 +
drivers/spi/spi-geni-qcom.c | 527
3 files changed, 538 insertions(+)
create mode 100644 drivers/spi/spi-
On Mon, 17 Feb 2025 14:06:38 -0600, Tom Rini wrote:
> To match up with the sample conf file under bin/konsulko-labgrid, add a
> boardenv file for the rpi_4 and rpi_arm64 variants (cannot be shared
> with rpi_4_32b as we have aarch64 specific example test files). This
> shows how to enable network
The clks are already configured properly by coreboot on sc7180, but this
is good enough to make the MMC and USB drivers work.
Signed-off-by: Stephen Boyd
---
drivers/clk/qcom/Kconfig| 8 ++
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clock-sc7180.c | 150 +
On 2/20/25 05:54, Ilias Apalodimas wrote:
+++ b/include/cpu_func.h
@@ -69,6 +69,23 @@ void flush_dcache_range(unsigned long start, unsigned long
stop);
void invalidate_dcache_range(unsigned long start, unsigned long stop);
void invalidate_dcache_all(void);
void invalidate_icache_all(void);
The ARM ARM on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use this function to tweak block and page permssions,
where BBM is not required add an extra argument to the function.
While at it add a function description.
Signed-
On Thu, 20 Feb 2025 17:51:52 +0100, Heinrich Schuchardt wrote:
> The following changes since commit 7a45cb4ffeff034304789954bb222ddd7d02104a:
>
>fs/erofs: fix an integer overflow in symlink resolution (2025-02-18
> 12:32:07 -0600)
>
> are available in the Git repository at:
>
>https://s
This should be negative EFAULT to indicate an error code.
Signed-off-by: Stephen Boyd
---
boot/bootmeth_cros.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c
index c7b862e512a0..d4c4ed328bd0 100644
--- a/boot/bootmeth_cros.c
+++ b/
Coreboot sets up the DRAM, CPU, and devices before booting a payload,
meaning we can parse the coreboot tables at boot for memory info when
running as a payload. Use the memory descriptors from coreboot if the
tables are present so that Snapdragon SoCs can run U-boot as a coreboot
payload.
Signed-
Populate the firmware node with a coreboot node detailing where the
coreboot tables and CBMEM area are located.
Signed-off-by: Stephen Boyd
---
boot/image-fdt.c | 4 ++
include/cb_sysinfo.h | 2 +
lib/coreboot/cb_sysinfo.c | 120 ++
3 files c
Set the pstore address and size based on the coreboot tables if the
coreboot tables are populated.
Signed-off-by: Stephen Boyd
---
cmd/pstore.c | 44 +++-
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/cmd/pstore.c b/cmd/pstore.c
index 9795
This command isn't x86 specific. Move it up one level so that it can be
used on a platform that can find the coreboot table, i.e. x86 or ARM.
Signed-off-by: Stephen Boyd
---
cmd/Kconfig | 2 +-
cmd/Makefile | 1 +
cmd/{x86 => }/cbsysinfo.c | 0
cmd/x86/Makefile
The SKU ID is part of the coreboot tables. Historically, it was under
the coreboot tag for sku_id specifically, but modern coreboot versions
have put all the ID values together in one entry CB_TAG_BOARD_CONFIG
along with fw_config. Parse that tag to populate the sku_id and
fw_config fields.
Signed
The CMOS 'option_table' isn't populated on ARM devices running coreboot.
Check to see if the pointer is NULL and bail out if it is.
Signed-off-by: Stephen Boyd
---
cmd/x86/cbsysinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
in
Lay the groundwork to run U-Boot as a payload on ARM coreboot based
devices. Move the coreboot table parsing code out of arch/x86 into
lib/coreboot. The headers like cb_sysinfo.h and coreboot_tables.h need
to be globally accessible, so move them into the top level include
directory. Introduce helpe
Add a 'coreboot' cpu to armv8 that looks for the coreboot table near the
top of the 4G address space.
Signed-off-by: Stephen Boyd
---
arch/arm/Kconfig | 2 ++
arch/arm/cpu/armv8/Makefile | 1 +
arch/arm/cpu/armv8/coreboot/Kconfig | 22 +
arch/arm/cpu/a
Add a driver for Qualcomm's sc7180 pinctrl device (TLMM). This is
largely a copy of a similar driver in U-Boot along with reference to the
Linux driver to fix up the data properly.
Signed-off-by: Stephen Boyd
---
drivers/pinctrl/qcom/Kconfig | 7 ++
drivers/pinctrl/qcom/Makefile
This series supports running U-Boot as a payload on sc7180 Trogdor
Chromebooks like Lazor or Wormdingler. This is a jumble of different
patches to get to the final goal of booting a Linux distro from the eMMC
on Lazor. I've yet to craft a USB stick with a stock distro but I'll
probably do that next
On 2/20/25 05:54, Ilias Apalodimas wrote:
Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.
Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid acc
On 2/20/25 05:54, Ilias Apalodimas wrote:
Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.
It's worth noting that .
On 2/20/25 05:54, Ilias Apalodimas wrote:
The ARM ARM on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use this function to tweak block and page permssions,
where BBM is not required add an extra argument to the function.
Whil
Hi Richard,
On Thu, 20 Feb 2025 at 20:32, Richard Henderson
wrote:
>
> On 2/20/25 05:54, Ilias Apalodimas wrote:
> > +++ b/include/cpu_func.h
> > @@ -69,6 +69,23 @@ void flush_dcache_range(unsigned long start, unsigned
> > long stop);
> > void invalidate_dcache_range(unsigned long start, unsig
If there is an unallocated memory area before the last, filling parting
the size calculation for MTD_SIZE_REMAINING does not take this hole
into account.
Fix this by calculating the remaining size just based on total size
and partition offset.
Signed-off-by: Alexander Stein
---
drivers/mtd/mtdpa
Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.
Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defin
For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions
Tested-by: Neil Armstrong # on AML-S905X-CC
Signed-off-by: Ilias Apalodimas
---
arch/arc/lib/cache.c | 6 ++
a
Upcoming patches are mapping memory with RO, RW^X etc permsissions.
Fix the meminfo command to display them properly
Acked-by: Jerome Forissier
Reviewed-by: Caleb Connolly
Signed-off-by: Ilias Apalodimas
---
arch/arm/cpu/armv8/cache_v8.c| 26 +++---
arch/arm/include/asm
Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.
It's worth noting that .efi_runtime memory permissions are left
unto
Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.
Signed-off-by: Ilias Apalodimas
---
doc/usage/cmd/meminfo.rst | 71 +--
1 file chang
Hi this is v2 of [0] [1]
This is an attempt to map the U-Boot binary properly and enhance its
security posture but leave the area we load binaries unaffected and RWX.
What I have done but decided not to include was Simons suggestion of using
DM for the cpu ops. I've spent some time doing this but
On 2/20/25 07:39, Varadarajan Narayanan wrote:
Introducing basic support for Qualcomm IPQxxx based RDPs.
Document the build and flashing steps.
Signed-off-by: Varadarajan Narayanan
---
doc/board/qualcomm/rdp.rst | 55 ++
1 file changed, 55 insertions(+)
On 2/20/25 07:39, Varadarajan Narayanan wrote:
Add initial support for the IPQ9574 MMC based RDP platforms.
Define memory layout statically.
Signed-off-by: Varadarajan Narayanan
---
v3: Fix comments and give additional details
No code change
v2: Use upstream and override DT instead of
On Thu, Feb 20, 2025 at 11:13:34AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 20 Feb 2025 at 10:40, Tom Rini wrote:
> >
> > On Thu, Feb 20, 2025 at 09:43:10AM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Thu, 20 Feb 2025 at 08:16, Tom Rini wrote:
> > > >
> > > > On Thu, Feb 20, 20
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().
However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.
Upstream Linux commit 26c100232b09 "arm64: dts: rockchip
Hi Tom,
On Thu, 20 Feb 2025 at 10:40, Tom Rini wrote:
>
> On Thu, Feb 20, 2025 at 09:43:10AM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On Thu, 20 Feb 2025 at 08:16, Tom Rini wrote:
> > >
> > > On Thu, Feb 20, 2025 at 06:19:05AM -0700, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Wed
On Thu, Feb 20, 2025 at 09:43:10AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 20 Feb 2025 at 08:16, Tom Rini wrote:
> >
> > On Thu, Feb 20, 2025 at 06:19:05AM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 19 Feb 2025 at 13:34, Tom Rini wrote:
> > > >
> > > > On Wed, Feb 19, 20
On Thu, 20 Feb 2025 13:13:04 +0800, Leo Liang wrote:
> The following changes since commit 7a45cb4ffeff034304789954bb222ddd7d02104a:
>
> fs/erofs: fix an integer overflow in symlink resolution (2025-02-18
> 12:32:07 -0600)
>
> are available in the Git repository at:
>
> https://source.denx.
On Thu, 20 Feb 2025 11:17:06 +0800, Kever Yang wrote:
> Please pull the fixes for rockchip platform:
> - Fix for rk3399 bob and kevin
> - Fix for sdram more than 4GB
> - Fix for dwc_eth on rk356x/rk3588
> - Fix for sdmmc access on rk33080rock-s9
>
> CI:
> https://source.denx.de/u-boot/custodians/
On Mon, 10 Feb 2025 08:27:47 +0100, Stefan Eichenberger wrote:
> Add the dram_init_banksize function to the board file to properly set
> DRAM memory sizes during boot.
>
> The commit bc07851897bd ("board: ti: Pull redundant DDR functions to a
> common location and Fixup DDR size when ECC is enabl
Add get_display_timing ops for internal bridges linked to
panels that do not support EDID (MIPI-DSI panels for example)
or have EDID not routed.
---
Changes in v2
- adjusted get_display_timing description
- added LVDS de/encoder bridge
- added video bridge test
---
Svyatoslav Ryhel (3):
video:
Add get_display_timing ops for internal bridges linked to
panels that do not support EDID (MIPI-DSI panels for example)
or have EDID not routed.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/bridge/video-bridge-uclass.c | 11 +++
include/video_bridge.h | 21 ++
From: Quentin Schulz
Essentially the only differences between u-boot-rockchip.bin and
u-boot-rockchip-spi.bin are the formatting of idbloader.img which is
handled by mkimage (via -T rkspi/rksd) and the offset at which U-Boot
proper is flashed, the content of the binaries are identical otherwise.
Dear Tom,
The following changes since commit 7a45cb4ffeff034304789954bb222ddd7d02104a:
fs/erofs: fix an integer overflow in symlink resolution (2025-02-18
12:32:07 -0600)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi-2025-04-rc3
Add tests for video bridge ops.
Signed-off-by: Svyatoslav Ryhel
---
arch/sandbox/dts/test.dts | 46 +++
configs/sandbox_defconfig | 2 ++
test/dm/Makefile | 1 +
test/dm/video_bridge.c| 67 +++
4 files changed, 116 insert
Add a simple and transparent LVDS de/encoder driver with a powerdown
gpio and a power supply.
Signed-off-by: Svyatoslav Ryhel
---
drivers/video/bridge/Kconfig | 7 ++
drivers/video/bridge/Makefile | 1 +
drivers/video/bridge/lvds-codec.c | 128 ++
3 files
From: Quentin Schulz
This was only used on RK3288 Chromebooks and the EVB.
If it follows the same pattern as for RK3399 Chromebooks where their
maintainer (Simon) agreed[1] to removal of u-boot.rom on the basis that
the generic u-boot-rockchip-spi.bin is now enough, let's do the same for
RK3288
From: Quentin Schulz
This was only used on RK3399 Gru Chromebooks and their maintainer
(Simon) agreed[1] to its removal on the basis that the generic
u-boot-rockchip-spi.bin is now enough, so let's do that.
At the same time, remove HAS_ROM symbol from the Gru Chromebooks config
since they were u
This gets rid of u-boot.rom generation as that was used only on Rockchip
Chromebooks and their maintainer (Simon) seems to agree[1] that
u-boot-rockchip-spi.bin should do the job now so we don't need to
generate it anymore. This was agreed for RK3399 Chromebooks, I'm
attempting to do the same for R
El jue, 20 feb 2025 a las 4:54, Heinrich Schuchardt ()
escribió:
> On 1/27/25 13:34, Adriano Cordova wrote:
> > This commit fixes an use after free introduced in Commit e55a4acb54
> > (" efi_loader: net: set EFI bootdevice device path to HTTP when loaded
> > from wget"). The logic in efi_net_set_d
Hi Tom,
On Thu, 20 Feb 2025 at 08:16, Tom Rini wrote:
>
> On Thu, Feb 20, 2025 at 06:19:05AM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 19 Feb 2025 at 13:34, Tom Rini wrote:
> > >
> > > On Wed, Feb 19, 2025 at 07:48:17AM -0700, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Tue
On 2/20/25 4:22 PM, Daniel Golle wrote:
On Thu, Feb 20, 2025 at 04:04:27PM +0100, Quentin Schulz wrote:
Hi Daniel,
On 2/15/25 4:13 PM, Daniel Golle wrote:
Hi Quentin,
On 10 February 2025 16:25:23 UTC, Quentin Schulz
wrote:
[...]
What I can say from glancing at the code is that for Rockchip
On Thu, Feb 20, 2025 at 10:31:53AM +, Yao Zi wrote:
> Current implementation of riscv_timer.c only assumes readable TIMER CSRs
> present (IOW, Zicntr extension is available). Core Local Interruptors
> (CLINT) found on T-Head C9xx cores expose its mtime register through
> TIME CSR directly inste
Hello,
Quentin, thanks for starting this discussion.
On 10.02.25 17:25, Quentin Schulz wrote:
> On 2/9/25 3:28 PM, Simon Glass wrote:
>> On Thu, 6 Feb 2025 at 08:46, Quentin Schulz wrote:
> diff --git a/source/chapter3-devicenodes.rst
> b/source/chapter3-devicenodes.rst
> index
>>>
Hi Quentin,
On Thu, 20 Feb 2025 at 08:34, Quentin Schulz wrote:
>
> Hi Simon,
>
> On 2/17/25 4:37 PM, Simon Glass wrote:
> > Hi Quentin,
> >
> > On Mon, 17 Feb 2025 at 08:37, Quentin Schulz
> > wrote:
> >>
> >> Hi Simon,
> >>
> >> On 2/15/25 2:17 PM, Simon Glass wrote:
> >>> Hi Quentin,
> >>>
>
Hi Simon,
On 2/17/25 4:37 PM, Simon Glass wrote:
Hi Quentin,
On Mon, 17 Feb 2025 at 08:37, Quentin Schulz wrote:
Hi Simon,
On 2/15/25 2:17 PM, Simon Glass wrote:
Hi Quentin,
On Thu, 13 Feb 2025 at 06:54, Simon Glass wrote:
Hi Quentin,
On Tue, 11 Feb 2025 at 03:29, Quentin Schulz wrot
On Thu, Feb 20, 2025 at 04:04:27PM +0100, Quentin Schulz wrote:
> Hi Daniel,
>
> On 2/15/25 4:13 PM, Daniel Golle wrote:
> > Hi Quentin,
> >
> > On 10 February 2025 16:25:23 UTC, Quentin Schulz
> > wrote:
> > > [...]
> > > What I can say from glancing at the code is that for Rockchip they do th
On Thu, Feb 20, 2025 at 06:19:05AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 19 Feb 2025 at 13:34, Tom Rini wrote:
> >
> > On Wed, Feb 19, 2025 at 07:48:17AM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Tue, 18 Feb 2025 at 18:07, Tom Rini wrote:
> > > >
> > > > On Tue, Feb 18, 20
Hi Daniel,
On 2/15/25 4:13 PM, Daniel Golle wrote:
Hi Quentin,
On 10 February 2025 16:25:23 UTC, Quentin Schulz
wrote:
[...]
What I can say from glancing at the code is that for Rockchip they do the
following:
Register a bootsource type (e.g. MMC, SPI, I2C, USB, etc...), a bootsource
inst
On Thu, Feb 20, 2025 at 06:49:49AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Tue, 18 Feb 2025 at 17:55, Tom Rini wrote:
> >
> > On Tue, Feb 18, 2025 at 05:01:40PM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Tue, 18 Feb 2025 at 08:11, Tom Rini wrote:
> > > >
> > > > On Tue, Feb 18, 20
Hi Simon, Mark,
On 2/15/25 2:04 PM, Simon Glass wrote:
Hi Mark,
On Sat, 15 Feb 2025 at 05:47, Mark Kettenis wrote:
From: Simon Glass
Date: Sat, 15 Feb 2025 04:59:06 -0700
Hi Siomon, Quentin,
Hi Quentin,
On Mon, 10 Feb 2025 at 09:25, Quentin Schulz wrote:
Hi Simon,
On 2/9/25 3:28 P
On Thu, Feb 20, 2025 at 03:32:41PM +0530, Hrushikesh Salunke wrote:
> Increase the size of malloc region allocated before relocation, as
> current size is insufficient for dfu boot causing it to overflow and
> corrupt the stack.
>
> Enable the fixed regulator configs required by vtt_supply which i
On Wed, 19 Feb 2025 16:02:19 -0800, Raymond Mao wrote:
> Refactor the xferlist to remove the relocating when bloblist passed
> from the boot args.
> Refactor bloblist init to use incoming standard passage by default
> if a valid transfer list exists in the boot args.
> For bloblist relocation, use
Add support for flash device reset via OSPI controller
instead of using GPIO, as OSPI IP has device reset
feature on Versal Gen2 platform. Also add compatible
string for Versal Gen2 platform.
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/spi/cadence_ospi_versal.c | 19 +++
Hi Ilias,
On Thu, 20 Feb 2025 at 06:50, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> On Thu, 20 Feb 2025 at 15:31, Simon Glass wrote:
> >
> > Hi,
> >
> > On Thu, 20 Feb 2025 at 01:21, Heinrich Schuchardt
> > wrote:
> > >
> > > On 2/20/25 07:58, Ilias Apalodimas wrote:
> > > > On Mon, 10 Feb 2025
Hi Heinrich,
On Thu, 20 Feb 2025 at 06:47, Heinrich Schuchardt wrote:
>
> On 20.02.25 14:31, Simon Glass wrote:
> > Hi,
> >
> > On Thu, 20 Feb 2025 at 01:21, Heinrich Schuchardt
> > wrote:
> >>
> >> On 2/20/25 07:58, Ilias Apalodimas wrote:
> >>> On Mon, 10 Feb 2025 at 18:07, Pawel Kochanowski
Hi Heinrich
On Sun, Feb 09, 2025 at 09:27:36PM +0100, Heinrich Schuchardt wrote:
> Am 9. Februar 2025 21:15:53 MEZ schrieb Simon Glass :
> >Hi Tom,
> >
> >On Sun, 9 Feb 2025 at 09:39, Tom Rini wrote:
> >>
> >> On Thu, Feb 06, 2025 at 08:47:47AM -0700, Simon Glass wrote:
> >>
> >> [snip]
> >> > Pe
Increase the size of malloc region allocated before relocation, as
current size is insufficient for dfu boot causing it to overflow and
corrupt the stack.
Enable the fixed regulator configs required by vtt_supply which is used
by "am654_ddrss" driver. Without it during DFU boot DDRSS initializatio
Hi Peter,
On 19/02/2025 21:37, Peter Robinson wrote:
> Hi Oleksii,
>
> I've started to look at this.
>
> On Wed, 5 Feb 2025 at 10:15, Oleksii Moisieiev
> wrote:
>
> This patch series provides generic support for Raspberry PI 5 in
> U-Boot with additional hardware drivers.
> The follo
Hi Simon,
On Thu, 20 Feb 2025 at 15:31, Simon Glass wrote:
>
> Hi,
>
> On Thu, 20 Feb 2025 at 01:21, Heinrich Schuchardt wrote:
> >
> > On 2/20/25 07:58, Ilias Apalodimas wrote:
> > > On Mon, 10 Feb 2025 at 18:07, Pawel Kochanowski
> > > wrote:
> > >>
> > >> From: Gabriel Nesteruk
> > >>
> >
Hi J,
On Tue, 18 Feb 2025 at 08:55, J. Neuschäfer via B4 Relay
wrote:
>
> From: "J. Neuschäfer"
>
> On some platforms, initializing the watchdog driver enables a timer
> interrupt. This of course requires the interrupt handlers to be
> properly initialized, otherwise U-Boot may crash or run the
Hi Ilias,
I don't know where to find the spec for the tpm v2 nv_define command. I was
just wondering
why this command does not work in u-boot. Then I found a patch, that has never
been
applied to the master, see
https://lists.denx.de/pipermail/u-boot/2023-December/542089.html,
where the nv_defi
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