From: Kongyang Liu
Add document for Banana Pi F3 board which based on SpacemiT's K1 SoC.
Signed-off-by: Kongyang Liu
Signed-off-by: Huan Zhou
Tested-by: Marcel Ziswiler
Reviewed-by: Yixun Lan
---
doc/board/index.rst| 1 +
doc/board/spacemit/bananapi-f3.rst | 106 ++
From: Kongyang Liu
Add basic support for SpacemiT's Banana Pi F3 board.
Update the k1.dtsi align with mainline.
Note that the device tree files follow the mainline Linux source[1].
Links:
https://patches.linaro.org/project/linux-serial/patch/20240730-k1-01-basic-dt-v5-8-98263aae8...@gentoo.org/
Banana Pi F3 board is a industrial grade RISC-V development board, it
design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI
computing power. 4G DDR and 16G eMMC onboard. 2x GbE Ethernet port, 4x USB
3.0 and PCIe for M.2 interface, support HDMI and Dual MIPI-CSI Camera.
This patch
On Sat, Dec 14, 2024 at 03:19:58PM +0800, Yixun Lan wrote:
> Hi Huan:
>
> On 14:44 Sat 14 Dec , Huan Zhou wrote:
> > Banana Pi F3 board is a industrial grade RISC-V development board, it
> > design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI
> > computing power. 4G DDR and
Hi Huan:
On 14:44 Sat 14 Dec , Huan Zhou wrote:
> Banana Pi F3 board is a industrial grade RISC-V development board, it
> design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI
> computing power. 4G DDR and 16G eMMC onboard. 2x GbE Ethernet port, 4x USB
> 3.0 and PCIe for M.2 i
This version of patch does need addition review or test, only small comment
change and
another doc update.
On Sat, Dec 14, 2024 at 02:44:59PM +0800, Huan Zhou wrote:
> Banana Pi F3 board is a industrial grade RISC-V development board, it
> design with SpacemiT K1 8 core RISC-V chip, CPU integrat
From: Kongyang Liu
Add document for Banana Pi F3 board which based on SpacemiT's K1 SoC.
Signed-off-by: Kongyang Liu
Signed-off-by: Huan Zhou
---
doc/board/index.rst| 1 +
doc/board/spacemit/bananapi-f3.rst | 106 +
doc/board/spacemit/inde
From: Kongyang Liu
Add basic support for SpacemiT's Banana Pi F3 board.
Update the k1.dtsi align with mainline.
Note that the device tree files follow the mainline Linux source[1].
Links:
https://patches.linaro.org/project/linux-serial/patch/20240730-k1-01-basic-dt-v5-8-98263aae8...@gentoo.org/
Banana Pi F3 board is a industrial grade RISC-V development board, it
design with SpacemiT K1 8 core RISC-V chip, CPU integrates 2.0 TOPs AI
computing power. 4G DDR and 16G eMMC onboard. 2x GbE Ethernet port, 4x USB
3.0 and PCIe for M.2 interface, support HDMI and Dual MIPI-CSI Camera.
This patch
On Thu, 12 Dec 2024 11:19:06 +0200
Leon Anavi wrote:
Hi Leon,
> On 11.12.24 г. 23:53 ч., Andre Przywara wrote:
> > On Mon, 9 Dec 2024 23:08:19 +0200
> > Leon Anavi wrote:
> >
> > Hi Leon,
> >
> > thanks for the report!
> >
> >> Commit ffb0294 from 12 November 2023 that simplifies early PMIC se
Hi,
On Thu, Apr 18, 2024 at 7:36 PM Sean Anderson wrote:
>
> When a patch is added to a series after the initial version, there are no
> changes to note except that it is new. This is typically done to suppress
> the "(no changes in vN)" message. It's also nice to add a change to the
> cover lett
On Wed, 27 Nov 2024 13:17:32 +0100, Wadim Egorov wrote:
> This implements capsule updates for all our K3 SoMs for
> eMMC, OSPI NOR and uSD cards.
>
> We can use capsule updates to update the bootloader on all our
> supported flash devices.
>
> Wadim Egorov (4):
> arm: dts: k3-am625-phycore-som
On Tue, 26 Nov 2024 17:33:17 +0530, Siddharth Vadapalli wrote:
> This series adds support for USB DFU boot on TI's AM62A SoC which has
> two instances of DWC3 USB Controllers namely USB0 and USB1. The USB0
> instance of the USB Controller supports USB DFU boot:
> ROM => tiboot3.bin => tispl.bin =>
On Tue, 26 Nov 2024 11:04:23 +0530, Udit Kumar wrote:
> This enables the ESMs and the associated PMIC. Programming these bits is
> a requirement to make the watchdog actually reset the board.
>
> Logs
> WDT reset J721S2
> https://gist.github.com/uditkumarti/93cfe863d1f3fe3abb82b1821105f274#file-j
On Tue, 26 Nov 2024 12:36:10 +0530, Jayesh Choudhary wrote:
> Add QOS support for DSS in TI K3 SoC to route the DSS traffic through
> RT queue by setting orderID as 15:
> - J722S
> - AM62P
>
> Changelog v1->v2:
> - Rebased on the tip of next branch
> - Corrected the commit message in patch 2/4
>
Get tpm event log from bloblist instead of FDT when bloblist is
enabled and valid from previous boot stage.
Note:
This patch depends on:
[PATCH 1/2] bloblist: Introduce BLOBLIST_PRIOR_STAGE options
https://lore.kernel.org/u-boot/20241212151142.1562825-1-tr...@konsulko.com/
Signed-off-by: Raymond
bloblist_find function only returns the pointer of blob data,
which is fine for those self-describing data like FDT.
But as a common scenario, an interface is needed to retrieve both
the pointer and the size of the blob data.
Signed-off-by: Raymond Mao
---
common/bloblist.c | 17 +++
On Mon, Nov 25, 2024 at 11:55:50AM +, Andrew Goodbody wrote:
> Picking up a series from Dan Carpenter and applying requested
> changes for v2.
>
> I had previously set CONFIG_64BIT for arm64. This patchset does the
> same thing for sandbox and x86_64. (Mips and riscv were already
> doing it
On 11/26/24 1:03 PM, Siddharth Vadapalli wrote:
There are only two callers of "dwc3_generic_probe()", namely:
1. dwc3_generic_peripheral_probe()
2. dwc3_generic_host_probe()
Currently, the "mode" is set based on the device-tree node of the
platform device. Also, the DWC3 core doesn't support upda
> From: Simon Glass
> Date: Fri, 13 Dec 2024 07:02:42 -0700
Hi Simon,
> Hi Ilias,
>
> On Thu, 12 Dec 2024 at 08:51, Ilias Apalodimas
> wrote:
> >
> > On Thu, 12 Dec 2024 at 15:45, Simon Glass wrote:
> > >
> > > Hi Ilias,
> > >
> > > On Wed, 11 Dec 2024 at 23:40, Ilias Apalodimas
> > > wrote:
Hi all,
In U-Boot, there are multiple stages which can be loaded from different
media each. On Rockchip SoCs, it mostly goes this way, SoC BootROM loads
from a medium (storage or over USB) and executes the TPL (or SPL if no
TPL supported), the TPL goes back to BootROM and reads the SPL from th
Hi Tom,
On Fri, 13 Dec 2024 at 07:05, Tom Rini wrote:
>
> On Thu, Dec 12, 2024 at 08:24:06PM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On Thu, 12 Dec 2024 at 20:09, Tom Rini wrote:
> > >
> > > On Thu, Dec 12, 2024 at 07:11:55PM -0600, Tom Rini wrote:
> > > > On Sat, 07 Dec 2024 10:23:53 -070
On Thu, Dec 12, 2024 at 08:24:06PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 12 Dec 2024 at 20:09, Tom Rini wrote:
> >
> > On Thu, Dec 12, 2024 at 07:11:55PM -0600, Tom Rini wrote:
> > > On Sat, 07 Dec 2024 10:23:53 -0700, Simon Glass wrote:
> > >
> > > > This includes various patches towar
On Fri, 13 Dec 2024 at 12:20, Leonard Anderweit wrote:
>
> Remove one of the double colon so ..code-block is used for formatting.
>
> Signed-off-by: Leonard Anderweit
> ---
> doc/develop/uefi/fwu_updates.rst | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/doc/develop
On Fri, Dec 13, 2024 at 07:32:24AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 12 Dec 2024 at 08:11, Tom Rini wrote:
> >
> > Introduce an option to control if we expect that a prior stage has
> > created a bloblist already and thus it is safe to scan the address. We
> > need to have this be c
Hi Philippe,
On Thu, 12 Dec 2024 at 08:37, Philippe Reynes <
philippe.rey...@softathome.com> wrote:
> Adds a test for the function sha256_hkdf.
>
> Signed-off-by: Philippe Reynes
> ---
> test/lib/Makefile | 1 +
> test/lib/test_sha256_hkdf.c | 107 +++
Hi Philippe,
On Thu, 12 Dec 2024 at 08:37, Philippe Reynes <
philippe.rey...@softathome.com> wrote:
> Adds the support of key derivation using the scheme hkdf.
> This scheme is defined in rfc5869.
>
> Signed-off-by: Philippe Reynes
> ---
> include/u-boot/sha256.h | 20
> li
Hi Philippe,
On Thu, 12 Dec 2024 at 08:37, Philippe Reynes <
philippe.rey...@softathome.com> wrote:
> Adds a test for the function sha256_hmac
>
> Signed-off-by: Philippe Reynes
> ---
> test/lib/Makefile | 1 +
> test/lib/test_sha256_hmac.c | 296
Hi Philippe,
On Thu, 12 Dec 2024 at 08:37, Philippe Reynes <
philippe.rey...@softathome.com> wrote:
> Adds the support of the hmac based on sha256.
> This implementation is based on rfc2104.
>
> Signed-off-by: Philippe Reynes
> ---
> include/u-boot/sha256.h | 4
> lib/sha256_common.c
Hi Jonas,
On 12/13/24 4:20 PM, Jonas Karlman wrote:
Hi Quentin,
On 2024-12-13 14:43, Quentin Schulz wrote:
Hi Jonas,
On 12/10/24 11:23 PM, Jonas Karlman wrote:
The RK3582 SoC is a variant of the RK3588S with some IP blocks disabled.
What blocks are disabled/non-working is indicated by ip-sta
Hi Philippe,
On Thu, 12 Dec 2024 at 08:37, Philippe Reynes <
philippe.rey...@softathome.com> wrote:
> The function sha256_csum_wd is defined in lib/sha256.c
> and in lib/mbedtls/sha256.c. To avoid duplicating this
> function (and future function), we move this function
> to the file lib/sha256_co
Hi Philippe,
On Thu, 12 Dec 2024 at 08:37, Philippe Reynes <
philippe.rey...@softathome.com> wrote:
> Adds the support of key derivation using
> the scheme hkdf.
>
> Signed-off-by: Philippe Reynes
> ---
> lib/mbedtls/Kconfig | 14 ++
> lib/mbedtls/Makefile |
Hi Quentin,
On 2024-12-13 14:43, Quentin Schulz wrote:
> Hi Jonas,
>
> On 12/10/24 11:23 PM, Jonas Karlman wrote:
>> The RK3582 SoC is a variant of the RK3588S with some IP blocks disabled.
>> What blocks are disabled/non-working is indicated by ip-state in OTP.
>>
>> This add initial support for
Hi Ilias,
On Fri, 13 Dec 2024 at 05:13, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> On Fri, 13 Dec 2024 at 05:53, Simon Glass wrote:
> >
> > Hi Ilias,
> >
> > On Thu, 12 Dec 2024 at 08:45, Ilias Apalodimas
> > wrote:
> > >
> > > On Thu, 12 Dec 2024 at 15:45, Simon Glass wrote:
> > > >
> > > > Hi
In case DM drivers probe earlier than board clock setup is done
init of basic clocks should be done in CAR driver probe as well.
Add it to avoid possible clock related problems.
Acked-by: Thierry Reding
Signed-off-by: Svyatoslav Ryhel
---
drivers/clk/tegra/tegra-car-clk.c | 3 +++
1 file change
Return PLL id into struct clk if PLL is parsed from device
tree instead of throwing an error. Allow requesting PLL
clock rate via get_rate op.
Signed-off-by: Svyatoslav Ryhel
---
drivers/clk/tegra/tegra-car-clk.c | 47 +--
1 file changed, 38 insertions(+), 9 deletions
This should fix
https://lore.kernel.org/all/20241201164810.GT3600562@bill-the-cat/T/#m2b62b471fd37e4c9725c98547e2a919cf11db5e5
---
Changes from v2
- adjusted periph clk id check
- restored unconditional debug messages on car functions calls
Changes from v1
- added partially support PLL clocks co
пт, 13 груд. 2024 р. о 16:33 Thierry Reding пише:
>
> On Thu, Dec 12, 2024 at 12:06:45PM +0200, Svyatoslav Ryhel wrote:
> > Return PLL id into struct clk if PLL is parsed from device
> > tree instead of throwing an error. Allow requesting PLL
> > clock rate via get_rate op.
> >
> > Signed-off-by:
On Thu, Dec 12, 2024 at 12:06:45PM +0200, Svyatoslav Ryhel wrote:
> Return PLL id into struct clk if PLL is parsed from device
> tree instead of throwing an error. Allow requesting PLL
> clock rate via get_rate op.
>
> Signed-off-by: Svyatoslav Ryhel
> ---
> drivers/clk/tegra/tegra-car-clk.c | 4
On Thu, Dec 12, 2024 at 12:06:46PM +0200, Svyatoslav Ryhel wrote:
> In case DM drivers probe earlier than board clock setup is done
> init of basic clocks should be done in CAR driver probe as well.
> Add it to avoid possible clock related problems.
>
> Signed-off-by: Svyatoslav Ryhel
> ---
> dr
On Fri, Dec 13, 2024 at 05:37:11AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 12 Dec 2024 at 09:51, Tom Rini wrote:
> >
> > On Thu, Dec 12, 2024 at 07:09:12AM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Fri, 6 Dec 2024 at 17:59, Tom Rini wrote:
> > > >
> > > > On Fri, Dec 06, 202
Hi Tom,
On Thu, 12 Dec 2024 at 08:11, Tom Rini wrote:
>
> Introduce an option to control if we expect that a prior stage has
> created a bloblist already and thus it is safe to scan the address. We
> need to have this be configurable because we do not (and cannot) know if
> the address at CONFIG_
On Fri, 13 Dec 2024 at 18:59, Patrice Chotard
wrote:
>
> Previously, all LMB marked with LMB_NOMAP (above and below ram_top)
> are considered as invalid entry in TLB.
>
> Since commit 1a48b0be93d4 ("lmb: prohibit allocations above ram_top
> even from same bank") all LMB located above ram_top are
Hi Jonas,
On 12/13/24 12:57 AM, Jonas Karlman wrote:
The u-boot.rom image contain u-boot.img FIT instead of the FIT generated
by binman for the u-boot-rockchip.bin image.
Change to include the binman generated FIT for the u-boot.rom image.
This change result in TF-A being included and the use
On Fri, Dec 13, 2024 at 07:15:09AM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Fri, 13 Dec 2024 at 07:03, Tom Rini wrote:
> >
> > On Thu, Dec 12, 2024 at 08:38:32PM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Thu, 12 Dec 2024 at 10:29, Ilias Apalodimas
> > > wrote:
> > > >
> > > > On T
Hi Quentin,
On 2024-12-13 14:45, Quentin Schulz wrote:
> Hi Jonas,
>
> On 12/10/24 11:23 PM, Jonas Karlman wrote:
>> Add Kconfig option OF_SYSTEM_SETUP=y to support booting boards with a
>> RK3582 SoC. CPU and GPU cores are failed based on ip-state and policy.
>>
>> Tested on a ROCK 5C Lite v1.1:
Hi Tom,
On Fri, 13 Dec 2024 at 07:03, Tom Rini wrote:
>
> On Thu, Dec 12, 2024 at 08:38:32PM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On Thu, 12 Dec 2024 at 10:29, Ilias Apalodimas
> > wrote:
> > >
> > > On Thu, 12 Dec 2024 at 19:27, Tom Rini wrote:
> > > >
> > > > On Thu, Dec 12, 2024 at
On 12/13/24 12:00, Venkatesh Yadav Abbarapu wrote:
Provide a man-page for the optee command.
Signed-off-by: Venkatesh Yadav Abbarapu
---
doc/usage/cmd/optee.rst | 75 +
doc/usage/index.rst | 1 +
2 files changed, 76 insertions(+)
create mode
On Thu, Dec 12, 2024 at 08:38:32PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 12 Dec 2024 at 10:29, Ilias Apalodimas
> wrote:
> >
> > On Thu, 12 Dec 2024 at 19:27, Tom Rini wrote:
> > >
> > > On Thu, Dec 12, 2024 at 07:08:34PM +0200, Ilias Apalodimas wrote:
> > > > On Thu, 12 Dec 2024 at 19
On 12/13/24 13:48, Mattijs Korpershoek wrote:
Hi Venkatesh,
Thank you for the patch.
On ven., déc. 13, 2024 at 16:30, Venkatesh Yadav Abbarapu
wrote:
Enable "optee hello" command which increments the value passed.
This provides easy test for establishing a session with OP-TEE
TA and veri
Hi Ilias,
On Thu, 12 Dec 2024 at 08:51, Ilias Apalodimas
wrote:
>
> On Thu, 12 Dec 2024 at 15:45, Simon Glass wrote:
> >
> > Hi Ilias,
> >
> > On Wed, 11 Dec 2024 at 23:40, Ilias Apalodimas
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > On Wed, 11 Dec 2024 at 15:54, Simon Glass wrote:
> > > >
>
On 12/13/24 09:52, xueweiwujxw wrote:
This patch adds a new command named "post_config" to execute the
"ps7_post_config" function.
Signed-off-by: xueweiwujxw
first of all please spell your name properly here.
---
board/xilinx/zynq/Kconfig | 17 +
board/xil
Hi Jonas,
On 12/10/24 11:23 PM, Jonas Karlman wrote:
Add Kconfig option OF_SYSTEM_SETUP=y to support booting boards with a
RK3582 SoC. CPU and GPU cores are failed based on ip-state and policy.
Tested on a ROCK 5C Lite v1.1:
cpu-code: 35 82
ip-state: 10 00 00
fail gpu
fail cpu cpu@
Hi Jonas,
On 12/10/24 11:23 PM, Jonas Karlman wrote:
The RK3582 SoC is a variant of the RK3588S with some IP blocks disabled.
What blocks are disabled/non-working is indicated by ip-state in OTP.
This add initial support for RK3582 by using ft_system_setup() to mark
any cpu and/or gpu node with
Previously, all LMB marked with LMB_NOMAP (above and below ram_top)
are considered as invalid entry in TLB.
Since commit 1a48b0be93d4 ("lmb: prohibit allocations above ram_top
even from same bank") all LMB located above ram_top are now marked
LMB_NOOVERWRITE and no more LMB_MAP.
This area above
Hi Naoki,
On 12/11/24 4:39 AM, FUKAUMI Naoki wrote:
Radxa ROCK 5C[1] is a Rockchip RK3588S2 based single board computer.
[1] https://radxa.com/products/rock5/5c
Signed-off-by: FUKAUMI Naoki
---
Changes in v3:
- fix compile error
Changes in v2:
- arch/arm/dts/rk3588s-rock-5-u-boot.dtsi: remove
This patch adds a new command named "post_config" to execute the
"ps7_post_config" function.
Signed-off-by: xueweiwujxw
---
board/xilinx/zynq/Kconfig | 17 +
board/xilinx/zynq/Makefile | 2 +-
board/xilinx/zynq/cmds.c | 20 +
Hi Venkatesh,
Thank you for the patch.
On ven., déc. 13, 2024 at 16:30, Venkatesh Yadav Abbarapu
wrote:
> Enable "optee hello" command which increments the value passed.
> This provides easy test for establishing a session with OP-TEE
> TA and verify.
>
> It includes following subcommands:
> o
Add documentation for the 'trace wipe' command.
Signed-off-by: Jerome Forissier
---
doc/develop/trace.rst | 11 +++
1 file changed, 11 insertions(+)
diff --git a/doc/develop/trace.rst b/doc/develop/trace.rst
index 546862020b1..d3c8628d124 100644
--- a/doc/develop/trace.rst
+++ b/doc/dev
Test the newly added 'trace wipe' command.
Signed-off-by: Jerome Forissier
Acked-by: Ilias Apalodimas
---
test/py/tests/test_trace.py | 30 ++
1 file changed, 30 insertions(+)
diff --git a/test/py/tests/test_trace.py b/test/py/tests/test_trace.py
index ec1e624722c..
This short series adds the 'trace wipe' command which clears the trace
buffer, allowing to re-start a capture from scratch.
Jerome Forissier (3):
trace: add support for 'trace wipe'
test: test_trace.py: test 'trace wipe'
trace: document 'trace wipe'
cmd/trace.c | 5
d
Implement a 'trace wipe' command to delete the currently accumulated
trace data. This comes handy when someone needs to trace a particular
command. For example:
=> trace pause; trace wipe
=> trace resume; dhcp; trace pause
=> trace stats
=> trace calls 0x0210 0x1000
=> tftpput $p
Hi Tom,
On Thu, 12 Dec 2024 at 09:51, Tom Rini wrote:
>
> On Thu, Dec 12, 2024 at 07:09:12AM -0700, Simon Glass wrote:
> > Hi Tom,
> >
> > On Fri, 6 Dec 2024 at 17:59, Tom Rini wrote:
> > >
> > > On Fri, Dec 06, 2024 at 04:43:47PM -0700, Simon Glass wrote:
> > > > Hi Tom,
> > > >
> > > > On Fri,
On 12/13/24 13:16, Ilias Apalodimas wrote:
> Thanks,
>
> Apologies I missed something else as well
>
> On Fri, 13 Dec 2024 at 14:14, Jerome Forissier
> wrote:
>>
>>
>>
>> On 12/13/24 13:09, Ilias Apalodimas wrote:
>>> Hi Jerome
>>>
>>> On Mon, 9 Dec 2024 at 17:32, Jerome Forissier
>>> wrote:
On Mon, 9 Dec 2024 at 17:32, Jerome Forissier
wrote:
>
> Also test the newly added command 'trace clear'.
>
> Signed-off-by: Jerome Forissier
> ---
> test/py/tests/test_trace.py | 30 ++
> 1 file changed, 30 insertions(+)
>
> diff --git a/test/py/tests/test_trace.py b
Thanks,
Apologies I missed something else as well
On Fri, 13 Dec 2024 at 14:14, Jerome Forissier
wrote:
>
>
>
> On 12/13/24 13:09, Ilias Apalodimas wrote:
> > Hi Jerome
> >
> > On Mon, 9 Dec 2024 at 17:32, Jerome Forissier
> > wrote:
> >>
> >> Implement a "trace clear" command to delete the cur
On 12/13/24 13:09, Ilias Apalodimas wrote:
> Hi Jerome
>
> On Mon, 9 Dec 2024 at 17:32, Jerome Forissier
> wrote:
>>
>> Implement a "trace clear" command to delete the currently accumulated
>> trace data. This comes handy when someone needs to trace a particular
>> command. For example:
>>
>>
Hi Simon,
On Fri, 13 Dec 2024 at 05:53, Simon Glass wrote:
>
> Hi Ilias,
>
> On Thu, 12 Dec 2024 at 08:45, Ilias Apalodimas
> wrote:
> >
> > On Thu, 12 Dec 2024 at 15:45, Simon Glass wrote:
> > >
> > > Hi Ilias,
> > >
> > > On Thu, 12 Dec 2024 at 00:49, Ilias Apalodimas
> > > wrote:
> > > >
>
Hi Jerome
On Mon, 9 Dec 2024 at 17:32, Jerome Forissier
wrote:
>
> Implement a "trace clear" command to delete the currently accumulated
> trace data. This comes handy when someone needs to trace a particular
> command. For example:
>
> => trace clear; dhcp; trace pause
> => trace stats
> =
On Fri, 13 Dec 2024 at 10:58, Heinrich Schuchardt
wrote:
>
> UEFI specification 2.11 has been published.
> There are no changes relevant for the U-Boot scope.
> So let us update the supported specification version.
>
> Change the comment for the constant to Sphinx style.
>
> Signed-off-by: Heinric
On Fri, 13 Dec 2024 at 11:20, Heinrich Schuchardt
wrote:
>
> * add EFI_MEMORY_CPU_CRYPTO, EFI_MEMORY_HOT_PLUGGABLE
> * correct output for EFI_MEMORY_XP
> * remove duplicate list entry for EFI_MEMORY_UC
>
> Signed-off-by: Heinrich Schuchardt
> ---
> cmd/efidebug.c | 5 +++--
> include/efi.h | 2
Hi
Am Fr., 13. Dez. 2024 um 11:23 Uhr schrieb Michael Walle :
>
> Increase the malloc size to 2MiB because our FIT image exceeds the 1MiB
> limit either if BL31 mode is enabled or if another device tree is added
> to the image.
>
> Signed-off-by: Michael Walle
Tested-by: Heiko Thiery
Thanks
>
Hi,
Am Fr., 13. Dez. 2024 um 11:23 Uhr schrieb Michael Walle :
>
> We don't have a reference to the driver used by
> uclass_get_device_by_driver() in stop_recovery_watchdog(). Fix it by not
> calling that function if the watchdog driver isn't enabled.
>
> Signed-off-by: Michael Walle
Reviewed-by
Hi,
Am Fr., 13. Dez. 2024 um 11:23 Uhr schrieb Michael Walle :
>
> Network is broken on variant 3 boards since commit 61ff13283c3b ("board:
> sl28: move to OF_UPSTREAM") because it was removing the variant 3
> handling. That is because at that time the var3 device tree was not
> upstream. FWIW var
Provide a man-page for the optee command.
Signed-off-by: Venkatesh Yadav Abbarapu
---
doc/usage/cmd/optee.rst | 75 +
doc/usage/index.rst | 1 +
2 files changed, 76 insertions(+)
create mode 100644 doc/usage/cmd/optee.rst
diff --git a/doc/usage/cmd/
Enable "optee hello" command which increments the value passed.
This provides easy test for establishing a session with OP-TEE
TA and verify.
It includes following subcommands:
optee hello
optee hello ; value to increment via OP-TEE HELLO
WORLD TA.
To enable the OP-TEE side HELLO WORLD example pl
Enable "optee hello" command which increments the value passed.
This provides easy test for establishing a session with OP-TEE
TA and verify.
It includes following subcommands:
optee hello
optee hello ; value to increment via OP-TEE HELLO
WORLD TA.
Changes in v2:
- Added command "optee" and subdo
Hi,
Am Fr., 13. Dez. 2024 um 11:23 Uhr schrieb Michael Walle :
>
> Since commit 61ff13283c3b ("board: sl28: move to OF_UPSTREAM") USB0 is
> broken because the former u-boot soc dtsi was setting dr_mode to "host"
> but the linux device tree isn't. That is because linux fully supports
> OTG but u-b
Increase the malloc size to 2MiB because our FIT image exceeds the 1MiB
limit either if BL31 mode is enabled or if another device tree is added
to the image.
Signed-off-by: Michael Walle
---
configs/kontron_sl28_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/kontron_sl28_d
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is
The functionality of enabling Inline ECC is now controlled by
CONFIG_K3_INLINE_ECC. So, remove the support for 'ti,ecc-enable'
property to avoid redundancy and to ensure the Inline ECC feature is
mananged through build-time config.
Signed-off-by: Santhosh Kumar K
---
drivers/ram/k3-ddrss/k3-ddrs
From: Neha Malcom Francis
Set CONFIG_NR_DRAM_BANKS to 2 as we have two banks described in the
memory/ node for lower and higher addressible DDR regions.
This allows use of FDT functions from fdt_support.c to set up and fix up
the memory/ node correctly.
Signed-off-by: Neha Malcom Francis
---
From: Neha Malcom Francis
Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
only when the config has been enabled.
Signed-off-by: Neha Malcom Francis
---
drivers/ram/Kconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/ram/Kconfig b/drivers/r
Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.
Signed-off-by: Santhosh Kumar K
---
drivers/ram/k3-ddrss/k3-ddrss.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/ram/k3-ddrss/k3-ddrss
As R5 is a 32 bit processor, the RAM banks' base and size calculation
is restricted to 32 bits, which results in wrong values if bank's base
is greater than 32 bits or bank's size is greater than or equal to 4GB.
So, add k3_ddrss_ddr_bank_base_size_calc() to get the base address and
size of RAM's
Setup the ECC region's start and range using the device private data,
ddrss->ddr_bank_base[0] and ddrss->ddr_ram_size. Also, move start and
range of ECC regions from 32 bits to 64 bits to accommodate for
DDR greater than or equal to 4GB.
Signed-off-by: Santhosh Kumar K
---
drivers/ram/k3-ddrss/k
From: Georgi Vlaev
The 1-bit inline ECC support in TI's DDRSS bridge requires
the configured memory regions to be preloaded with a pattern
before use. This is done by the k3-ddrss driver from the
R5 SPL in a 'for' loop. It takes around 10 seconds to fill
2GB of memory, for example. Memset can cut
Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.
Signed-off-by: Santhosh Kumar K
Signed-off-by: Neha Malcom Francis
---
arch/arm/dts/k3-am62a-ddr.dtsi | 7 ---
arch/arm/dts/k3-j721s2-ddr.dtsi | 12
arch/arm/dts/k3-j784s4-ddr.d
Hello,
This series is to:
Add support for Inline ECC in DDR for AM64X, AM62X, AM62AX, AM62PX,
J721S2 and J784S4 devices.
(1/9) Add ss_cfg reg entry
(2/9) Enable ECC priming with BIST engine
(3/9) Add a function to store base address and size of RAM's banks
in a 64-bit device private data
(
Since commit 61ff13283c3b ("board: sl28: move to OF_UPSTREAM") USB0 is
broken because the former u-boot soc dtsi was setting dr_mode to "host"
but the linux device tree isn't. That is because linux fully supports
OTG but u-boot doesn't. Therefore, u-boot only ever enabled host mode
and never OTG mo
Convert the table to a correct reST table syntax.
Signed-off-by: Michael Walle
---
doc/board/kontron/sl28.rst | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/doc/board/kontron/sl28.rst b/doc/board/kontron/sl28.rst
index 2cb8ec62be4..5d47ce6c158 100644
--- a/doc
Network is broken on variant 3 boards since commit 61ff13283c3b ("board:
sl28: move to OF_UPSTREAM") because it was removing the variant 3
handling. That is because at that time the var3 device tree was not
upstream. FWIW variant 3 is actually the same as the base variant, but
I've missed that the
We don't have a reference to the driver used by
uclass_get_device_by_driver() in stop_recovery_watchdog(). Fix it by not
calling that function if the watchdog driver isn't enabled.
Signed-off-by: Michael Walle
---
board/kontron/sl28/sl28.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Give the sl28 board some love and fix various issues. Most of them
were due to the transition to the upstream device trees.
Michael Walle (5):
board: sl28: fix linking with disabled watchdog
board: sl28: increase SPL_SYS_MALLOC_SIZE
board: sl28: fix network on variant 3
doc: board: sl28: f
Remove one of the double colon so ..code-block is used for formatting.
Signed-off-by: Leonard Anderweit
---
doc/develop/uefi/fwu_updates.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/doc/develop/uefi/fwu_updates.rst b/doc/develop/uefi/fwu_updates.rst
index 51e8a28ef
On 12/13/24 10:54, Sughosh Ganu wrote:
> On Fri, 13 Dec 2024 at 14:44, Patrice CHOTARD
> wrote:
>>
>>
>>
>> On 12/12/24 20:50, Sughosh Ganu wrote:
>>> On Fri, 13 Dec 2024 at 00:48, Tom Rini wrote:
On Wed, Dec 11, 2024 at 05:18:28PM +0100, Patrice CHOTARD wrote:
>
>
>
On Fri, 13 Dec 2024 at 14:44, Patrice CHOTARD
wrote:
>
>
>
> On 12/12/24 20:50, Sughosh Ganu wrote:
> > On Fri, 13 Dec 2024 at 00:48, Tom Rini wrote:
> >>
> >> On Wed, Dec 11, 2024 at 05:18:28PM +0100, Patrice CHOTARD wrote:
> >>
> >>>
> >>>
> >>> On 12/7/24 16:57, Tom Rini wrote:
> On Mon,
* add EFI_MEMORY_CPU_CRYPTO, EFI_MEMORY_HOT_PLUGGABLE
* correct output for EFI_MEMORY_XP
* remove duplicate list entry for EFI_MEMORY_UC
Signed-off-by: Heinrich Schuchardt
---
cmd/efidebug.c | 5 +++--
include/efi.h | 2 ++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/cmd/efid
Hi
On Thu, Dec 5, 2024 at 10:23 AM wrote:
>
> From: Dinesh Maniyam
>
> This patchset add Cadence NAND driver support for
> Intel Agilex5 devices.
>
> The NAND driver is leveraged from the cadence-nand-controller.c
> from Linux version 6.11.2. U-Boot will support read, write and erase
> NAND with
On 12/12/24 20:50, Sughosh Ganu wrote:
> On Fri, 13 Dec 2024 at 00:48, Tom Rini wrote:
>>
>> On Wed, Dec 11, 2024 at 05:18:28PM +0100, Patrice CHOTARD wrote:
>>
>>>
>>>
>>> On 12/7/24 16:57, Tom Rini wrote:
On Mon, 02 Dec 2024 12:36:24 +0530, Sughosh Ganu wrote:
> There are platfo
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