On Wed, 14 Aug 2024 at 07:22, Chintan Vankar wrote:
>
>
>
> On 13/08/24 18:17, Nishanth Menon wrote:
> > On 16:24-20240813, Chintan Vankar wrote:
> >> Add missing bootph-all property for CPSW MAC's PHY node
> >> phy_gmii_sel.
> >>
> >> Signed-off-by: Chintan Vankar
> >> Link: https://lore.kernel.
On 26.08.24 08:44, Sumit Garg wrote:
> Hi,
>
> On Wed, 14 Aug 2024 at 22:14, Jan Kiszka wrote:
>>
>> On 14.08.24 11:41, Jan Kiszka wrote:
>>> On 13.08.24 14:52, Nishanth Menon wrote:
On 11:16-20240813, Jan Kiszka wrote:
> Hi all,
>
> I'm trying to migrate the TI AM65x IOT2050 boa
Hi,
On Wed, 14 Aug 2024 at 22:14, Jan Kiszka wrote:
>
> On 14.08.24 11:41, Jan Kiszka wrote:
> > On 13.08.24 14:52, Nishanth Menon wrote:
> >> On 11:16-20240813, Jan Kiszka wrote:
> >>> Hi all,
> >>>
> >>> I'm trying to migrate the TI AM65x IOT2050 boards to OF_UPSTREAM but I'm
> >>> facing issue
Hi Dario,
Thank you for the patch.
On dim., août 25, 2024 at 14:26, Dario Binacchi
wrote:
> All three addresses printed are in hexadecimal format, but only the
> first two have the "0x" prefix. The patch aligns the format of the
> "end" address with the other two by adding the "0x" prefix.
>
>
Hi
On Mon, Aug 26, 2024 at 8:17 AM Arseniy Krasnov
wrote:
>
> Move call 'meson_nfc_cmd_seed()' and check for 'NAND_NEED_SCRAMBLING'
> to 'meson_nfc_cmd_access()', thus removing code duplication.
>
> Signed-off-by: Arseniy Krasnov
> ---
> drivers/mtd/nand/raw/meson_nand.c | 30 --
Hi
On Mon, Aug 26, 2024 at 8:17 AM Arseniy Krasnov
wrote:
>
> Based on Linux kernel:
> commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a
> boot device")
>
> Allow to define a NAND chip as a boot device. This can be helpful
> for the selection of the ECC algorithm and st
On 26.08.2024 09:15, Michael Nazzareno Trimarchi wrote:
> Hi Aresenly
>
> On Fri, Aug 23, 2024 at 10:53 AM Neil Armstrong
> wrote:
>>
>> On 23/08/2024 10:29, Arseniy Krasnov wrote:
>>> Hi! Got it, thanks!
>>>
>>> On 23.08.2024 11:10, Michael Nazzareno Trimarchi wrote:
Hi Arseniy
Boot ROM on Meson needs some pages to be read/written in a special mode:
384 byte ECC mode (so called "short" by Amlogic) and with scrambling
enabled. Such pages are located on the chip in the following way (for
example):
[ p0 ][ p1 ][ p2 ][ p3 ][ p4 ][ p5 ][ p6 ][ p7 ] ... [ pN ]
^ ^
Move call 'meson_nfc_cmd_seed()' and check for 'NAND_NEED_SCRAMBLING'
to 'meson_nfc_cmd_access()', thus removing code duplication.
Signed-off-by: Arseniy Krasnov
---
drivers/mtd/nand/raw/meson_nand.c | 30 --
1 file changed, 12 insertions(+), 18 deletions(-)
diff --g
Patchset is based on patchset for Linux (today merged to nand-next):
https://lore.kernel.org/linux-mtd/20240507230903.3399594-1-avkras...@salutedevices.com/
Here is description from it:
> Amlogic's boot ROM code needs that some pages on NAND must be written
> in special "short" ECC mode with
Based on Linux kernel:
commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a
boot device")
Allow to define a NAND chip as a boot device. This can be helpful
for the selection of the ECC algorithm and strength in case the boot
ROM supports only a subset of controller provided
Hi Aresenly
On Fri, Aug 23, 2024 at 10:53 AM Neil Armstrong
wrote:
>
> On 23/08/2024 10:29, Arseniy Krasnov wrote:
> > Hi! Got it, thanks!
> >
> > On 23.08.2024 11:10, Michael Nazzareno Trimarchi wrote:
> >> Hi Arseniy
> >>
> >> On Thu, Aug 22, 2024 at 9:04 AM Arseniy Krasnov
> >> wrote:
> >>>
>
Hi Chintan,
On Mon, 2024-08-26 at 09:24 +0530, Chintan Vankar wrote:
> > > > > From: Vignesh Raghavendra
> > > > >
> > > > > Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to
> > > > > requested size and not to 0. Fix this.
> > > > >
> > > > > Signed-off-by: Vignesh Raghavendra
On 23/08/24 16:03, Sverdlin, Alexander wrote:
Hi Chintan,
On Fri, 2024-08-23 at 15:22 +0530, Chintan Vankar wrote:
On 16/08/24 17:58, Sverdlin, Alexander wrote:
Hi Chintan, Vignesh,
On Fri, 2024-07-05 at 10:20 +0530, Chintan Vankar wrote:
From: Vignesh Raghavendra
Expectation of k3_ring
Reviewed-by: Chia-Wei Wang
> -Original Message-
> From: Jerome Forissier
> Sent: Friday, August 23, 2024 9:49 PM
> To: u-boot@lists.denx.de
> Cc: Ilias Apalodimas ; Javier Tia
> ; Raymond Mao ; Maxim
> Uvarov ; Tim Harvey ;
> Anton Antonov ; Jerome Forissier
> ; Maxim Sloyko ; Tom
> Rini
On Sun, Aug 25, 2024 at 5:26 AM Dario Binacchi
wrote:
>
> All three addresses printed are in hexadecimal format, but only the
> first two have the "0x" prefix. The patch aligns the format of the
> "end" address with the other two by adding the "0x" prefix.
>
> Signed-off-by: Dario Binacchi
> ---
Hi Simon,
On Sun, Aug 25, 2024 at 6:07 AM Simon Glass wrote:
>
> Hi,
>
> We have the term 'SPL', which has a dual meaning. It is both a
> particular phase of U-Boot (the one that loads U-Boot proper) and a
> generic name for any pre-proper phase.
ZBL or ZSBL: Zeroth Stage Boot Loader (usually in
Hi,
We have the term 'SPL', which has a dual meaning. It is both a
particular phase of U-Boot (the one that loads U-Boot proper) and a
generic name for any pre-proper phase.
You can see that in a few areas, but for example CONFIG_SPL_BUILD is
enabled for TPL and VPL builds, not just SPL.
I propo
All three addresses printed are in hexadecimal format, but only the
first two have the "0x" prefix. The patch aligns the format of the
"end" address with the other two by adding the "0x" prefix.
Signed-off-by: Dario Binacchi
---
cmd/booti.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
All three addresses printed are in hexadecimal format, but only the
first two have the "0x" prefix. The patch aligns the format of the
"end" address with the other two by adding the "0x" prefix.
Signed-off-by: Dario Binacchi
---
boot/bootm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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