Hi Josua,
On 4/29/23 11:15, Josua Mayer wrote:
has_been_read is only used as an optimization for do_tlv_eeprom.
Explicitly use and set inside this function, thus making read_eeprom
stateless.
Signed-off-by: Josua Mayer
Cc: Stefan Roese
Cc: Baruch Siach
Cc: Heinrich Schuchardt
This patchse
On 4/29/23 11:15, Josua Mayer wrote:
Move the handler for "tlv_eeprom dev X" command to the beginning of
do_tlv_eeprom, to allow using it before issuing a "read" command for
currently selected eeprom.
Also remove the check if eeprom exists, since that can only work after
the first execution of r
On 4/29/23 11:15, Josua Mayer wrote:
When tlv eeprom does not exist, return error code instead of quietly
making up tlv structure in memory.
Signed-off-by: Josua Mayer
Cc: Stefan Roese
Cc: Baruch Siach
Cc: Heinrich Schuchardt
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
cmd/tlv_eepro
On 4/29/23 11:15, Josua Mayer wrote:
has_been_read is only used as an optimization for do_tlv_eeprom.
Explicitly use and set inside this function, thus making read_eeprom
stateless.
Signed-off-by: Josua Mayer
Cc: Stefan Roese
Cc: Baruch Siach
Cc: Heinrich Schuchardt
Reviewed-by: Stefan Roe
Hi Simon,
On Sun, Apr 30, 2023 at 9:30 AM Simon Glass wrote:
>
> Weak symbols are not well supported by the PE format, so disable them.
> We need to manually ensure that only one function is present in the source
> code.
>
> Add a Kconfig option to control this and enable it when building for
> W
On 4/27/23 15:36, Patrick Delaunay wrote:
> The '_' character is discouraged in the node name, this patch adds the
> new prefix of regulator subnode, with the '-' character, in STM32MP1 driver
> to support the new naming rule in Linux kernel device trees.
>
> It is a preliminary patch before L
On 4/27/23 15:36, Patrick Delaunay wrote:
> Change the default base for offset parsing with simple_strtoull(),
> so offset in flashlayout is coded in base 10 by default, even if string
> start with '0'. The Octal encoding is not supported. The base 16
> is still supported when the '0x' header is
On 4/27/23 15:36, Patrick Delaunay wrote:
> Avoid to ignore the OTP read/write error and transmits the error
> to STM32CubeProgrammer.
>
> Today the error is only displayed in log error:
> so the user on HOST thinks the OTP operation is performed.
>
> Reported-by: Mickael GARDET
> Signed-off-
On 4/27/23 15:36, Patrick Delaunay wrote:
> Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
> before relocation, to support DDR with only 256MB because the OP-TEE
> reserved memory is located at end of the DDR.
>
> By default the new size of 128MB cacheable memory is eno
On 4/27/23 15:36, Patrick Delaunay wrote:
> Add a protection in misc bsec ops for request with null size.
>
> For example OP-TEE error occurs when get_eth_nb() return 0 in
> setup_mac_address() for unknown part number because U-Boot read 0 OTPs.
>
> Signed-off-by: Patrick Delaunay
> ---
>
>
On 4/27/23 15:36, Patrick Delaunay wrote:
> Add support of STM32MP15x Rev.Y for the Silicon revision REV_ID = 0x2003.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/include/mach/sys_proto.h | 1 +
> arch/arm/mach-stm32mp/stm32mp15x.c | 5 -
> 2 files chan
Hi Tom
Thanks for these patches!
On 27/04/23 01:14, Tom Rini wrote:
Now that buildman has a requirements.txt file we need to make use of it.
Signed-off-by: Tom Rini
---
.azure-pipelines.yml | 3 +++
.gitlab-ci.yml | 4
2 files changed, 7 insertions(+)
However, while trying t
This patch corrects the MMC raw mode sector offset as
per documentation.
https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j7200/08_06_00_11/exports/docs/j7200/linux/Foundational_Components/U-Boot/UG-Memory.html
Section: eMMC layout
Without this correct offset eMMC boot with UDA partit
Hi Simon,
On Sun, Apr 30, 2023 at 9:30 AM Simon Glass wrote:
>
> Add another case for sandbox, when it is built on Windows.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> arch/sandbox/config.mk | 4 +-
> arch/x86/lib/crt0_x86_64_efi.S | 2 +
> arch/x86/lib/pe_x86_6
Hi Simon,
On Sun, Apr 30, 2023 at 9:30 AM Simon Glass wrote:
>
> We need to place the linker lists, etc. in the .rdata section but this
> is not possible with the default linker script. We can only add new
> sections, which causes Windows to give an "Exec format error" error.
>
> Add a rule to cr
From: Vaishnav Achath
Upstream Linux commit id 8f6c475f4ca7a
J7200 has 8 MCSPI instances in the main domain and 3 instances
in the MCU domain. Add the DT nodes for all the 11 instances and
keep them disabled. MAIN_MCSPI4 is connected as a slave to MCU_MCSPI2
by default at power-up, MAIN_MCSPI4 a
To align with kernel and remove duplication rearrange boothm node.
Signed-off-by: Udit Kumar
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 45 ---
arch/arm/dts/k3-j7200-common-proc-board.dts | 3 ++
arch/arm/dts/k3-j7200-main.dtsi | 3 ++
arch/arm/dts/k3-j
move bootph to common file and remove duplicated
properties of node.
Signed-off-by: Udit Kumar
---
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 7 ---
arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 8 ++--
2 files changed, 2 insertions(+), 13 deletions(-)
diff --git a/ar
remove non used 19Mhz clock node
Signed-off-by: Udit Kumar
---
arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index c247ad1b2e..30fb359489 100
This patch cleans up duplicated main_i2c node from r5 file.
Since this node needs bootph property, So add in common file.
Signed-off-by: Udit Kumar
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 16 ---
arch/arm/dts/k3-j7200-common-proc-board.dts | 2 ++
.../arm/dts/k3-j7200-
This patch remove duplicated USB node from r5 board dts
Signed-off-by: Udit Kumar
---
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 8
arch/arm/dts/k3-j7200-common-proc-board.dts | 1 +
arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 12
3 files chan
remove Alias and chosen properties
Signed-off-by: Udit Kumar
---
.../dts/k3-j7200-common-proc-board-u-boot.dtsi| 15 ---
arch/arm/dts/k3-j7200-r5-common-proc-board.dts| 6 --
2 files changed, 21 deletions(-)
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dt
This patch move wkup_pmx into common file, along
with cleanup of duplicated pin mux under wkup_pmx.
Also remove double define for mcu_uart.
Signed-off-by: Udit Kumar
---
arch/arm/dts/k3-j7200-common-proc-board.dts | 24 +++-
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 55 -
This patch moves pin mux from r5 dts to common dts file.
Along with removing duplicated defines.
Signed-off-by: Udit Kumar
---
arch/arm/dts/k3-j7200-common-proc-board.dts | 16 --
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 51 +--
arch/arm/dts/k3-j7200-som-p0.dtsi
There are timer IO pads in the MCU domain, and in the MAIN domain. These
pads can be muxed for the related timers.
There are timer IO control registers for input and output. The registers
for CTRLMMR_TIMER*_CTRL and CTRLMMR_MCU_TIMER*_CTRL are used to control
the input. The registers for CTCTRLMMR
There are 20 general purpose timers on j7200 that can be used for things
like PWM using pwm-omap-dmtimer driver. There are also additional ten
timers in the MCU domain.
MCU timer 0 is used by R5 uboot as always on. So change properties
in u-boot specific files
Signed-off-by: Udit Kumar
---
.../
Upstream linux patch posted at
https://lore.kernel.org/all/20230419040007.3022780-3-u-kum...@ti.com/
This patch enables wkup_i2c0 node in board dts file
along with pin mux and speed.
Also enables underneath eeprom CAV24C256WE.
J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) :
https:/
From: Keerthy
wkup_pmx splits into multiple regions. Like
wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -> 2 pins (WKUP_PADCONFIG 14 - 15)
wkup_pmx2 -> 59 pins (WKUP_PADCONFIG 26 - 84)
wkup_pmx3 -> 8 pins (WKUP_PADCONFIG 93 - 100)
With this split, pin offset needs to be
From: Nishanth Menon
Sync with Kernel.org v6.3-rc6 tag.
Signed-off-by: Nishanth Menon
---
arch/arm/dts/k3-j7200-common-proc-board.dts | 63 +++---
arch/arm/dts/k3-j7200-main.dtsi | 72 +++--
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 59 ++
Nishanth Menon posted a series to sync between uboot and kernel dt for AM64 SOC.
https://lore.kernel.org/u-boot/20230414075726.387461-1...@ti.com/
This patch series extend that work to J7200 SOC.
Linux device tree changes for J7200 are posted to Linux list
https://lore.kernel.org/all/20230426103
Hi Simon,
On Tue, May 02 2023, Simon Glass wrote:
> On Mon, 1 May 2023 at 22:47, Baruch Siach wrote:
>>
>> U-Boot supports more hash and verification algorithms these days.
>>
>> Signed-off-by: Baruch Siach
>> ---
>> doc/uImage.FIT/signature.txt | 4 ++--
>> 1 file changed, 2 insertions(+), 2 d
Hi Simon,
On Sun, Apr 30, 2023 at 9:30 AM Simon Glass wrote:
>
> Add the required extension to the Makefile rule.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Use EXEEXT instead of ELFEXT
>
> Makefile | 1 +
> scripts/Makefile.build | 2 +-
> 2 files changed, 2 inse
Hi Simon,
On Sun, Apr 30, 2023 at 9:30 AM Simon Glass wrote:
>
> The MSYS2 compiler does not support some of these options. Drop them to
> avoid build errors.
I think the commit message is better reworded to something like:
Test some linker options as some toolchains like MSYS2 do not support t
Hi Simon,
On Sun, Apr 30, 2023 at 9:30 AM Simon Glass wrote:
>
> The required linker symbols are not present. For now just return 0 in
> this case.
Is it possible to add _end in the Sandbox linker script?
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v1)
>
> common/board_f.c | 2
Hi Simon,
On Sun, Apr 30, 2023 at 9:30 AM Simon Glass wrote:
>
> The Linux register format used on Linux (and perhaps other OSes) is not
> used on Windows, so disable this feature.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Update commit message to mention other OSes
> - Check f
Hi Filip,
On Tue, 2 May 2023 at 12:43, Filip Žaludek wrote:
>
>
>
> Hi Simon, Michal, Marek,
>
>
>
> On 4/26/23 03:04, Simon Glass wrote:
> > Hi Filip,
> >
> > On Tue, 25 Apr 2023 at 06:36, Filip Žaludek
> > wrote:
> >>
> >>
> >>
> >> Hi Simon,
> >>
> >>
> >> On 4/19/23 03:49, Simon Glass wrote
Hi Mayuresh,
On Tue, 2 May 2023 at 10:19, Mayuresh Chitale wrote:
>
> Add support to load the next stage image from an NVMe disk which may
> be formatted as an EXT or FAT filesystem.
>
> Signed-off-by: Mayuresh Chitale
> ---
> arch/riscv/include/asm/spl.h | 1 +
> common/spl/Kconfig
Hi Mayuresh,
On Tue, 2 May 2023 at 10:19, Mayuresh Chitale wrote:
>
> Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
> for SPL which is required to auto configure the PCIe devices.
>
> Signed-off-by: Mayuresh Chitale
> ---
> drivers/Makefile | 1 +
> drivers/nvme/M
On Mon, 1 May 2023 at 22:47, Baruch Siach wrote:
>
> Since U-Boot supports more RSA/SHA variants, as well as ECDSA, remove
> these items from the TODO list.
>
> Signed-off-by: Baruch Siach
> ---
> doc/uImage.FIT/signature.txt | 2 --
> 1 file changed, 2 deletions(-)
>
Reviewed-by: Simon Glass
On Mon, 1 May 2023 at 22:47, Baruch Siach wrote:
>
Missing commit message
> Signed-off-by: Baruch Siach
> ---
> doc/uImage.FIT/signature.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Simon Glass
On Mon, 1 May 2023 at 22:47, Baruch Siach wrote:
>
> U-Boot now uses the U_BOOT_CRYPTO_ALGO() macro.
>
> Signed-off-by: Baruch Siach
> ---
> doc/uImage.FIT/signature.txt | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
Reviewed-by: Simon Glass
On Mon, 1 May 2023 at 22:47, Baruch Siach wrote:
>
> U-Boot supports more hash and verification algorithms these days.
>
> Signed-off-by: Baruch Siach
> ---
> doc/uImage.FIT/signature.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass
Would you be interes
Hi Andy,
On Tue, 2 May 2023 at 11:13, Andy Pandy wrote:
>
> Hi there,
>
> I have a FIT image that boots fine, but when I sign it, with the following
> command, it fails to boot:
>
> mkimage -k keys -r -o sha256,rsa2048 -F image.fit
>
> It fails while checking sha256, Bad hash value for 'hash' has
Update the venice board documentation to show how to install to the
various eMMC hardware partitions available as the same binary firmware
can be placed in either user/boot0/boot1 without build-time config
changes. Note that the boot offsets differ depending on the SoC and the
eMMC hardware partiti
To allow U-Boot to fit within emmc boot partitions move the env from
just under 16MiB to just under 4MiB as some emmc devices used on venice
boards have 4MiB boot partitions. This still leaves plenty of room for
U-Boot.
Signed-off-by: Tim Harvey
---
configs/imx8mm_venice_defconfig | 4 ++--
conf
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to adjust for
IMX8MN and IMX8MP when booting from an eMMC boot partition due
to IMX BOOTROM v2 using an SPL offset of 0 for boot partitions
and 32K for the user partition.
In order to allow the same firmware to run on both user and boot
hardware partit
Determine the U-Boot env hardware partition depending on the boot
device.
This allows the same boot firmware image to be placed on user, boot0,
or boot1 without changing CONFIG_SYS_MMC_ENV_PART.
Signed-off-by: Tim Harvey
---
board/gateworks/venice/venice.c | 15 +++
1 file changed,
The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.
Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
hardware partition and 0KiB for eMMC boot partition
The Gateworks Venice board family uses a combination of imx8mm, imx8mn,
and imx8mp SoC's. Because boot firmware for these are not binary
compatible and have different flash offsets it is highly desirable to
place boot firmware in an emmc boot partition instead of the current
user hardware partition
On 12:57-20230502, Kumar, Udit wrote:
>
> On 5/1/2023 8:16 PM, Andrew Davis wrote:
> > On 4/26/23 9:13 AM, Kumar, Udit wrote:
> > > Hi Neha,
> > >
> > > On 4/26/2023 5:31 PM, Neha Malcom Francis wrote:
> > > > Hi Udit
> > > >
On 2023-04-25 12:03 p.m., Ramon Fried wrote:
On Fri, Apr 7, 2023 at 9:55 PM Simon Glass wrote:
Hi,
On Fri, 7 Apr 2023 at 18:56, wrote:
From: Sean Edmond
Adds DHCPv6 protocol to u-boot.
Allows for address assignement with DHCPv6 4-message exchange
(SOLICIT->ADVERTISE->REQUEST->REPLY). I
On Tue, May 2, 2023 at 2:46 PM Tim Harvey wrote:
>
> Add eraseenv command and remove the unnecessary env command.
>
> Signed-off-by: Tim Harvey
Reviewed-by: Fabio Estevam
On Tue, May 2, 2023 at 2:45 PM Tim Harvey wrote:
>
> Add GPIO name lookup so that you can act on GPIO's by name vs controller
> id:
>
> Before:
> u-boot=> gpio input pci_wdis#
> GPIO: 'pci_wdis#' not found
> Command 'gpio' failed: Error -22
>
> After:
> u-boot=> gpio input pci_wdis#
> gpio: pin pc
The PCIe controller on the M2 Pro/Max is different from the one
found on earlier Apple SoCs. Some registers moved and te meaning
of the bits in some other registers changed. But they are still
similar enough to handle both controllers in the same driver.
Signed-off-by: Mark Kettenis
---
driver
Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but
need a tweaked memory map. USB, NVMe, UART and WDT are working
with the existing drivers.
Signed-off-by: Mark Kettenis
---
arch/arm/mach-apple/board.c | 109 +++-
1 file changed, 106 insertions(+),
These new SoCs are similar to the M1 Pro/Max but do have a slightly
different memory map. They also have a new PCIe controller.
Mark Kettenis (2):
arm: apple: Add initial Apple M2 Pro/Max support
pci: apple: Add support for M2 Pro/Max
arch/arm/mach-apple/board.c | 109 ++
The boot variables automatically generated for removable medias
should be with short form of device path without device nodes.
This is a requirement for the case that a removable media is
plugged into a different port but is still able to work with the
existing boot variables.
Signed-off-by: Raymo
Changes for complying to EFI spec §3.5.1.1
'Removable Media Boot Behavior'.
Boot variables can be automatically generated during a removable
media is probed. At the same time, unused boot variables will be
detected and removed.
Signed-off-by: Raymond Mao
---
Changes in v2
- Ignore EFI_NOT_FOUND r
Rename and move bootorder and bootoption apis from cmd to lib
for re-use between eficonfig and bootmgr
Signed-off-by: Raymond Mao
---
Changes in v2
- Ignore EFI_NOT_FOUND returned from
efi_bootmgr_update_media_device_boot_option which means no boot
options scanned.
Changes in v3
- Split the p
Hello Michal,
On Tue, May 02, 2023 at 04:02:00PM +0200, Michal Simek wrote:
>
>
> On 4/27/23 22:37, Igor Prusov wrote:
> > Switch to using new dump operation in clock provider drivers instead of
> > overriding soc_clk_dump.
> >
> > Signed-off-by: Igor Prusov
> > ---
> > arch/mips/mach-pic32/
From: Thomas Mittelstaedt
Enable distro boot feature for U-Boot at VirtualBox described at
https://source.denx.de/u-boot/u-boot/-/blob/master/doc/develop/distro.rst
Signed-off-by: Thomas Mittelstaedt
---
configs/efi-x86_payload64_defconfig | 12 +---
include/configs/efi-x86_payload.h
From: Thomas Mittelstaedt
The problem was, that zboot() didn't work because of missing
ramdisc size.
Signed-off-by: Thomas Mittelstaedt
---
boot/pxe_utils.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c
index 3a1e50f2b1..87c32b6e62 1006
From: Thomas Mittelstaedt
U-Boot at VirtualBox must load Linux and boot configuration from disk devices.
Here the discs at AHCI (scsi) bus are used to load the need boot data.
Signed-off-by: Thomas Mittelstaedt
---
configs/efi-x86_payload64_defconfig | 6 --
1 file changed, 4 insertions(+)
From: Thomas Mittelstaedt
The changes are needed to get U-Boot to be started at VirtualBox
images supporting distro boot capability.
Atm the patch "pci: coreboot: Don't read regions when booting" from Simon Glass
is not integrated yet.
So AHCI and IDE devices are not handled correctly without thi
> -Ursprüngliche Nachricht-
> Von: Heinrich Schuchardt
> Gesendet: Dienstag, 2. Mai 2023 12:15
> An: Mittelstaedt Thomas (XC-CT/EBV3) ; u-
> b...@lists.denx.de
> Cc: Simon Glass ; Niel Armstrong
> ; Patrick Delaunay ;
> Ramon Fried ; Marek Vasut ; Manuel
> Traut ; Bin Meng
> Betreff: Re:
This patch series is the u-boot port from the recently accepted kernel
Broadcom HSSPI driver patch series here [1]. It includes the
accumulative updates and fixes for the driver from Broadcom. It also
added a new driver for the updated SPI controller found in the new
BCMBCA SoC. The device tree doc
The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an
updated SPI controller that add the capability to allow the driver to
control chip select explicitly. Driver can control and keep cs low
between the transfers natively. Hence the dummy cs workaround or prepend
mode found in the b
Currently the driver always sets the controller to dual data bit mode
for both tx and rx data in the profile mode control register even for
single data bit transfer. Luckily the opcode is set correctly according
to SPI transfer data bit width so it does not actually cause issues.
This change fixes
Due to the controller limitation to keep the chip select low during the
bus idle time between the transfer, a dummy cs workaround was used when
this driver was first upstreamed to the u-boot based on linux kernel
driver. It basically picks the dummy cs as !actual_cs so typically dummy
cs is 1 when
Add entry for Broadcom Broadband SoC HS SPI drivers
Signed-off-by: William Zhang
---
Changes in v2:
- Add Álvaro Fernández Rojas as another maintainer
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4c17c6cb9f1e..a1d490e66ed4 100644
---
New compatible string brcm,bcmbca-hsspi-v1.0 is introduced based on
dts document brcm,bcm63xx-hsspi.yaml. Add it to the driver to support
this new binding.
Port from linux patch:
Link:
https://lore.kernel.org/r/20230207065826.285013-6-william.zh...@broadcom.com
Signed-off-by: William Zhang
---
SPI controller is always presented in BCMBCA platform SoCs so enable the
controller driver and SPI core by default.
Signed-off-by: William Zhang
---
Changes in v2: None
arch/arm/Kconfig | 2 ++
arch/arm/mach-bcmbca/Kconfig | 11 +++
drivers/spi/Kconfig | 4 ++--
Bring the device tree binding document from Linux to u-boot
Port from linux patches:
Link:
https://lore.kernel.org/r/20230207065826.285013-2-william.zh...@broadcom.com
Link:
https://lore.kernel.org/r/20230207065826.285013-3-william.zh...@broadcom.com
Signed-off-by: William Zhang
---
Changes i
Add support for HSSPI controller in ARMv8 chip dts files.
Port from linux patch:
Link:
https://lore.kernel.org/r/20230207065826.285013-5-william.zh...@broadcom.com
Signed-off-by: William Zhang
---
Changes in v2: None
arch/arm/dts/bcm4908.dtsi | 17 +
arch/arm/dts/bcm4912.dts
Add support for HSSPI controller in ARMv7 chip dts files.
Port from linux patch:
Link:
https://lore.kernel.org/r/20230207065826.285013-4-william.zh...@broadcom.com
Signed-off-by: William Zhang
---
Changes in v2: None
arch/arm/dts/bcm47622.dtsi | 18 ++
arch/arm/dts/bcm63138.d
Hi Simon, Michal, Marek,
On 4/26/23 03:04, Simon Glass wrote:
Hi Filip,
On Tue, 25 Apr 2023 at 06:36, Filip Žaludek wrote:
Hi Simon,
On 4/19/23 03:49, Simon Glass wrote:
Hi Filip,
On Tue, 11 Apr 2023 at 14:24, Filip Žaludek wrote:
On 2/8/23 20:01, Mark Kettenis wrote:
Date:
t;);
> + if (chosen < 0) {
> + pr_err("%s: could not find/create '/chosen'\n", __func__);
> + return;
> + }
> + fdt_setprop_string(blob, chosen,
> +"u-boot,spl-boot-device", boot_ofpath);
> +}
> +#endif
>
> ---
> base-commit: 6735ab59e6fd71ced1c58d8dfb3dd6baf3690d16
> change-id: 20230502-rk3588-spl-boot-dev-efa2777cc21b
>
> Best regards,
> --
> Quentin Schulz
Freescale PCIe Root Port has PEXCSRBAR register at position of PCI BAR0.
PCIe Root Port does not have any PCIe memory, so returns zero when trying
to read from PCIe Root Port BAR0 and ignore any writes.
Signed-off-by: Pali Rohár
---
drivers/pci/pcie_fsl.c | 14 ++
1 file changed, 14
Add eraseenv command and remove the unnecessary env command.
Signed-off-by: Tim Harvey
---
board/gateworks/venice/venice.env | 1 -
configs/imx8mm_venice_defconfig | 1 +
configs/imx8mn_venice_defconfig | 1 +
configs/imx8mp_venice_defconfig | 1 +
4 files changed, 3 insertions(+), 1 delet
Add GPIO name lookup so that you can act on GPIO's by name vs controller
id:
Before:
u-boot=> gpio input pci_wdis#
GPIO: 'pci_wdis#' not found
Command 'gpio' failed: Error -22
After:
u-boot=> gpio input pci_wdis#
gpio: pin pci_wdis# (gpio 103) value is 1
Signed-off-by: Tim Harvey
---
configs/i
Hi there,
I have a FIT image that boots fine, but when I sign it, with the following
command, it fails to boot:
mkimage -k keys -r -o sha256,rsa2048 -F image.fit
It fails while checking sha256, Bad hash value for 'hash' hash node in ...
I get similar error when I test it on my host:
tools/fit_
Hi,
On Tue, 2 May 2023 at 09:41, Heinrich Schuchardt wrote:
>
>
>
> Am 2. Mai 2023 17:21:29 MESZ schrieb thomas.mittelsta...@de.bosch.com:
> >From: Thomas Mittelstaedt
> >
> >Enable distro boot feature for U-Boot at VirtualBox described at
> >https://source.denx.de/u-boot/u-boot/-/blob/master/do
Hi,
On Tue, 2 May 2023 at 04:19, Heinrich Schuchardt wrote:
>
> On 5/2/23 11:49, thomas.mittelsta...@bosch.com wrote:
> > From: mtt2hi
>
> Patches without commit messages cannot be accepted.
>
> Best regards
>
> Heinrich
>
> >
> > Signed-off-by: mtt2hi
> > ---
> > configs/efi-x86_payload64_de
On Mon, 1 May 2023 at 20:34, Heinrich Schuchardt
wrote:
>
> Invoking the sandbox with
>
> /u-boot -c ⧵0xef⧵0xbf⧵0xbd
>
> results in a segmentation fault.
>
> Function b_getch() retrieves a character from the input stream. This
> character may be > 0x7f. If type char is signed, static_get() wil
On Mon, 1 May 2023 at 20:59, Heinrich Schuchardt
wrote:
>
> Correct the function documentation.
>
> Fixes: ca031c082700 ("dm: core: introduce uclass_get_device_by_of_path()")
> Reported-by: Tom Rini
> Signed-off-by: Heinrich Schuchardt
> ---
> include/dm/uclass.h | 2 +-
> 1 file changed, 1 ins
On Mon, 1 May 2023 at 21:04, Heinrich Schuchardt
wrote:
>
> We do not want to merge documentation that produces Sphinx warnings.
>
> scripts/kernel-doc uses environment variable KDOC_WERROR to determine
> if warnings should be treated as errors.
>
> Reported-by: Tom Rini
> Signed-off-by: Heinrich
On Tue, 2 May 2023 at 04:21, Baruch Siach wrote:
>
> Signed-off-by: Baruch Siach
> ---
> doc/develop/devicetree/control.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Simon Glass
On Thu, Apr 20, 2023 at 09:44:25PM +0200, Pali Rohár wrote:
> PCI autoconfig case for PCI_CLASS_PROCESSOR_POWERPC just prints debug
> message and then calls autoconfig setup code like for any other standard
> endpoint device. We do not need special debug message for it, so remove
> this case and h
On Thu, Apr 20, 2023 at 09:44:23PM +0200, Pali Rohár wrote:
> At BDF address 00:00.0 is fictional device which PCI configuration header
> is for configuring mpc85xx PCI controller itself. PCI config space of this
> device has ATMU inbound registers on position of PCI BARs. Trying to do PCI
> auto
On Thu, Apr 13, 2023 at 10:41:46PM +0200, Pali Rohár wrote:
> Driver pci_mpc85xx.c is PCI controller driver for old PCI Local Bus,
> which does not support access to extended PCIe registers (above 0xff),
> as opposite of the PCIe driver pcie_fsl.c for the same platform.
>
> So do not try to acces
On Thu, Apr 13, 2023 at 10:41:45PM +0200, Pali Rohár wrote:
> This Freescale mpc85xx PCI controller should support 8-bit and 16-bit read
> and write access to PCI config space as described in more Freescale
> reference manuals.
>
> This change fixes issue that 8-bit and 16-bit write to PCI config
On Thu, Apr 13, 2023 at 10:41:44PM +0200, Pali Rohár wrote:
> On PowerPC we should use barrier after store operation to HW register.
>
> Signed-off-by: Pali Rohár
> Reviewed-by: Heiko Schocher
> Tested-by: Heiko Schocher
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description:
On Fri, Jan 27, 2023 at 02:51:06PM +0100, Christophe Leroy wrote:
> The "Programming Environments Manual for 32-Bit Implementations of the
> PowerPC™ Architecture" says "W and G bits are not defined for IBAT
> registers. Attempting to write to these bits causes boundedly-undefined
> results"
>
>
On Thu, Apr 20, 2023 at 09:44:24PM +0200, Pali Rohár wrote:
> Freescale PCIe Root Port has PEXCSRBAR register at position of PCI BAR0.
> PCIe Root Port does not have any PCIe memory, so returns zero when trying
> to read from PCIe Root Port BAR0 and ignore any writes.
>
> Signed-off-by: Pali Rohá
("%s: could not find/create '/chosen'\n", __func__);
+ return;
+ }
+ fdt_setprop_string(blob, chosen,
+ "u-boot,spl-boot-device", boot_ofpath);
+}
+#endif
---
base-commit: 6735ab59e6fd71ced1c58d8dfb3dd6baf3690d16
change-id: 20230502-rk3588-spl-boot-dev-efa2777cc21b
Best regards,
--
Quentin Schulz
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.
Signed-off-by: Mayuresh Chitale
---
arch/riscv/include/asm/spl.h | 1 +
common/spl/Kconfig | 10 +++
common/spl/Makefile | 1 +
common/spl/spl_nvme.c| 5
Detect a FIT when loading from an ext File system and handle it using
the FIT SPL support.
Signed-off-by: Mayuresh Chitale
---
common/spl/spl_ext.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index 2bf3434439.
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
for SPL which is required to auto configure the PCIe devices.
Signed-off-by: Mayuresh Chitale
---
drivers/Makefile | 1 +
drivers/nvme/Makefile| 2 +-
drivers/pci/Kconfig | 7 +++
drivers/pci/pci-uclass.c |
Add kconfig options to enable NVME and PCI NVMe support in SPL
Signed-off-by: Mayuresh Chitale
Reviewed-by: Simon Glass
---
common/spl/Kconfig | 20
1 file changed, 20 insertions(+)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2c042ad306..a42774c76d 100644
--
This patchset adds support to load images of the SPL's next booting stage from
a NVMe device.
Changes in v2:
- Rebase on v2023.07-rc1
- Use uclass ID for blk APIs
- Add support to load FIT images from ext filesystem
Mayuresh Chitale (4):
spl: Add Kconfig options for NVME
nvme: pci: Enable fo
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