On Tue, Sep 6, 2022 at 6:10 PM Viacheslav Mitrofanov
wrote:
>
> Add the possibility to recognize IPv6 address in print function.
> To output IPv6 address use %pI6 specifier.
>
> Signed-off-by: Viacheslav Mitrofanov
> ---
> lib/vsprintf.c | 9 +++--
> 1 file changed, 3 insertions(+), 6 deleti
On 08.09.22 16:06, Marek Behún wrote:
From: Pali Rohár
Commit 5bb2c550b11e ("arm: mvebu: Move internal registers in
arch_very_early_init() function") moved code from file cpu.c to lowlevel.c,
which moves Marvell internal registers from address INTREG_BASE_ADDR_REG to
SOC_REGS_PHY_BASE.
But the
On 08.09.22 16:06, Marek Behún wrote:
From: Pali Rohár
For some unknown reason when L2 cache is disabled on Armada 385 then loadb,
loadx and loady commands do not work with higher baudrates than 115200
(they just abort transfer) and lzmadec command with lzma image of size
0x700 (maybe even
On 08.09.22 16:06, Marek Behún wrote:
From: Pali Rohár
Replace magic constant 1 when disabling MMU by macro CR_M from include
header file asm/system.h.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/mach-mvebu/lowlevel.S | 3
On 08.09.22 16:06, Marek Behún wrote:
From: Pali Rohár
Commit c86d53fd88df ("arm: mvebu: Don't disable cache at startup on Armada
XP at all") introduced branch for non-AXP code which was guarded by A38X
condition. Fix this issue by checking for AXP platform, not by A38X.
Fixes: c86d53fd88df ("
On Tue, Sep 6, 2022 at 6:10 PM Viacheslav Mitrofanov
wrote:
>
> Implement actions on ip6addr, gatewayip6, serverip6 varaibles.
> on_ip6addr - convert IPv6 string addr to struct ip6_addr
> on_gatewayip6 - convert IPv6 string addr to struct ip6_addr
> on_serverip6 - convert IPv6 string addr to struc
On Tue, Sep 6, 2022 at 6:10 PM Viacheslav Mitrofanov
wrote:
>
> Implement basic of NDP. It doesn't include such things as Router
> Solicitation, Router Advertisement and Redirect. It just has Neighbor
> Solicitation and Neighbor Advertisement. Only these two features are used
> in u-boot IPv6. Imp
On 08.09.22 16:06, Marek Behún wrote:
From: Pali Rohár
Commit 3308933d2fe9 ("arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID
register too many times") broke support for caches on all Armada SoCs.
Before that commit there was code:
if (mvebu_soc_family() != MVEBU_SOC_A375) {
dcach
On Tue, Sep 6, 2022 at 6:10 PM Viacheslav Mitrofanov
wrote:
>
> This functions is used as a converter from IPv6 address string notation
> to struct ip6_addr that is used everywhere in IPv6 implementation. For
> example it is used to parse and convert IPv6 address from tftpboot
> command. Conversio
Hi Patrick
On 9/9/22 17:22, Patrick Delaunay wrote:
> Improve the partitioning trace done in command stm32prog:
> - remove the trace "partition: Done" when the GPT partitioning is not done
> - indicate the mmc instance used for each 'gpt write' command
>
> Signed-off-by: Patrick Delaunay
> ---
>
From: Takahiro Kuwano
Array index for SCCR 22th DWORD should be 21.
Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/d
On Fri, Sep 09, 2022 at 04:11:18PM +0200, Heinrich Schuchardt wrote:
> UEFI block devices can either mirror U-Boot's internal devices or be
> provided by an EFI application like iPXE.
>
> When ConnectController() is invoked for the EFI_BLOCK_IO_PROTOCOL
> interface for such an application provided
On 09/09/22, Alain Volmat wrote:
> Hi Patrick
>
> On Fri, Sep 09, 2022 at 02:53:23PM +0200, Patrick DELAUNAY wrote:
> > Hi Alain
> >
> > On 9/8/22 12:59, Alain Volmat wrote:
> > > Current function stm32_i2c_message_xfer is sending a STOP
> > > whatever the result of the transaction is. This can
On Sun, Sep 11, 2022 at 04:16:12PM +0300, Sergei Antonov wrote:
> On Sun, 11 Sept 2022 at 11:47, Jit Loon Lim wrote:
> >
> > From: Chin Liang See
> >
> > An old inffast.c optimization turns out to not be optimal anymore
> > with modern compilers, and furthermore was not compliant with the
> > C s
On Mon, Aug 15, 2022 at 6:43 AM Adam Ford wrote:
>
> On Sun, Aug 14, 2022 at 5:57 PM Fabio Estevam wrote:
> >
> > Hi Adam,
> >
> > On Sun, Jul 31, 2022 at 8:46 PM Adam Ford wrote:
> > >
> > > Every imx8mn board has a bunch of similar entries on their
> > > respective board-u-boot.dtsi file to ma
Drop the remaining ifdef around spl.h include.
Signed-off-by: Ovidiu Panait
---
common/board_f.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 96458c5151..4db1626c29 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -35,9 +35,7 @@
#include
In order to move ppc-specific code out of setup_dest_addr(), provide an
arch-specific variant arch_setup_dest_addr(), that can be used by
architecture code to fix up the initial reloc address.
It is called at the end of setup_dest_addr() initcall and the default
implementation is a nop stub.
Sign
The XTRN_DECLARE_GLOBAL_DATA_PTR declarations in ppc code are permanently
commented out, so there are no users for this macro:
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
#else
#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
#define DECLARE_GLOBAL_DAT
asm/mach_type.h header and CONFIG_MACH_TYPE macro are arm-specific, so move
related bdinfo logic to arch_setup_bdinfo() in arch/arm/lib/bdinfo.c.
Signed-off-by: Ovidiu Panait
---
arch/arm/lib/bdinfo.c | 12
common/board_f.c | 7 ---
2 files changed, 12 insertions(+), 7 de
From: Ley Foon Tan
Fixed delay 200us is not working in certain platform. Change to
poll for reset completion status to have more reliable reset process.
Controller will set the rst_comp bit in intr_status register after
controller has completed its reset and initialization process.
Signed-off-b
From: Ley Foon Tan
Add NAND defconfig for Stratix10.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
configs/socfpga_stratix10_nand_defconfig | 86
1 file changed, 86 insertions(+)
create mode 100644 configs/socfpga_stratix10_nand_defconfig
diff --git a/
From: Ley Foon Tan
Enable build for socfpga_stratix10_socdk_nand.dtb.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
arch/arm/dts/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 86e9407456..9a9d7163d9 100644
--- a/a
From: Ley Foon Tan
Add new file socfpga_stratix10_socdk_nand-u-boot.dtsi for Uboot specific
properties.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
.../socfpga_stratix10_socdk_nand-u-boot.dtsi | 36 +++
1 file changed, 36 insertions(+)
create mode 100644 arch
From: Ley Foon Tan
Copied from Linux commit ID 3c0f3b8545e7 ("arm64: dts: add NAND board files
for Stratix10 and Agilex")
The Stratix10 devkit supports a separate NAND daughter card.
The NAND daughter card replaces the SDMMC slot that is on the default
daughter card thus requires a separate boar
From: Ley Foon Tan
Move CONFIG_MTDIDS_DEFAULT to defconfig and add mtdids to ENV settings.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
configs/socfpga_stratix10_defconfig | 1 +
configs/socfpga_stratix10_qspi_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a
From: Ley Foon Tan
Add NAND node to stratix10 base dtsi file.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
arch/arm/dts/socfpga_stratix10.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi
b/arch/arm/dts/socfpga_stratix10
From: Ley Foon Tan
Enable CONFIG_CMD_MTD.
CONFIG_MTD_PARTITIONS is enabled by CONFIG_CMD_MTD.
So, remove CONFIG_MTD_PARTITIONS from socfpga_stratix10_socdk.h.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
configs/socfpga_stratix10_defconfig | 1 +
configs/socfpga_stratix10_
From: Chee Hong Ang
All SoCFPGA platforms are now switching to CONFIG_WDT (driver
model for watchdog timer drivers) from CONFIG_HW_WATCHDOG.
Signed-off-by: Chee Hong Ang
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
arch/arm/dts/socfpga_stratix10_socdk.dts | 4 ++
...efco
From: Joyce Ooi
This patch increases the allocated kernel Image size to 32MB for QSPI
for Stratix10 and Agilex as the latest kernel size has increased.
Signed-off-by: Joyce Ooi
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_qspi_defconfig| 2 +-
configs/socfpga_stratix10_qspi_defc
From: Chee Hong Ang
Secure Device Manager(SDM) has only 512MB window address space to HPS
over PSI BE link. The default access range is 0x0 to 0x1FFF.
To allow SDM accessing the address space more than 512MB, SMMU has to be
setup for address translation.
U-Boot will not allow the fpga reconf
Add functions for checking SMMU bypass status and matching valid
hardware device Stream ID in SMMU Stream Mapping Registers.
Signed-off-by: Chee Hong Ang
Signed-off-by: Jit Loon Lim
---
arch/arm/mach-socfpga/include/mach/smmu_s10.h | 65 ++
arch/arm/mach-socfpga/smmu_s10.c
add new CONFIG_SPL_CACHE for SPL build. Enable it to allow cache driver
build in SPL for Agilex NAND defconfig.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_nand_defconfig | 84 +++
1 file changed, 84 insertions(+)
create mode 10064
Hi Simon,
Thanks for getting back to me.
How can I avoid top posting ? i'm a new
How uboot know that the kernel has started ?
If the system is blocked during the u-boot stage, is it possible to
restart all the systems ?
It is possible to put a timer in the u-boot stage in case of the kernel has
On Sun, 11 Sept 2022 at 11:47, Jit Loon Lim wrote:
>
> From: Chin Liang See
>
> An old inffast.c optimization turns out to not be optimal anymore
> with modern compilers, and furthermore was not compliant with the
> C standard, for which decrementing a pointer before its allocated
> memory is und
From: Ley Foon Tan
Add NAND boot env settings
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
include/configs/socfpga_soc64_common.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_common.h
index ec28
From: Ley Foon Tan
rootfs partition size should be 0x3bd8.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
arch/arm/dts/socfpga_agilex_socdk_nand.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/socfpga_agilex_socdk_nand.dts
b/arch/arm/dts/
From: Ley Foon Tan
Move MTDIDS_DEFAULT to defconfig and add mtdids to ENV settings.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_atf_defconfig | 1 +
configs/socfpga_agilex_defconfig | 1 +
...efconfig => socfpga_agilex_qspi_defcon
From: Ley Foon Tan
Add NAND daughter card support, it has the following peripherals::
- NAND
- GMAC2
- I2C2
- UART0
Note, no SDMMC on NAND daughter card.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_agi
From: Ley Foon Tan
Add Nand defconfig for Agilex.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_nand_defconfig | 80 ++
include/configs/socfpga_soc64_common.h | 10
2 files changed, 80 insertions(+), 10 deletions(-)
create mo
From: Ley Foon Tan
Enable CONFIG_CMD_MTD.
CONFIG_MTD_PARTITIONS is enabled by CONFIG_CMD_MTD.
So, remove CONFIG_MTD_PARTITIONS from socfpga_agilex_socdk.h.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
configs/socfpga_agilex_atf_defconfig | 1 +
configs/socfpga_agilex_defconfig
From: Ley Foon Tan
Add NAND related CONFIGs.
Signed-off-by: Ley Foon Tan
Signed-off-by: Jit Loon Lim
---
include/configs/socfpga_soc64_common.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/configs/socfpga_soc64_common.h
b/include/configs/socfpga_soc64_
On Tuesday 23 August 2022 14:52:23 Pali Rohár wrote:
> Currently for A38x image is checked only header checksum.
> So check also for image data checksum to prevent flashing broken image.
>
> Signed-off-by: Pali Rohár
> Reviewed-by: Stefan Roese
>
> ---
> Changes in v3:
> * Compile fix (move ano
From: Thor Thayer
Disable the MPFE HMC Adapter Firewall for the MPU because
the Linux SDRAM ECC needs to access that register.
Also cleanup the HMC Firewall added for SMMU.
Signed-off-by: Thor Thayer
Signed-off-by: Jit Loon Lim
---
arch/arm/mach-socfpga/firewall.c | 10 ++
32-bit U-Boot builds cannot use more than around 2 GB of DDR memory. But on
some platforms/boards it is possible to connect also 4 GB SODIMM DDR memory.
U-Boot currently prints only effective size of RAM which can use, which may
be misleading as somebody would expect that this line prints total siz
Function print_size() round size to the nearst value with one decimal
fraction number. But in special cases also unit order may overflow.
For example value 1073689396 is printed as "1024 MiB" and value 1073741824
as "1 GiB".
Fix this issue by detecting order overflow and increasing unit order.
Wi
From: Thor Thayer
Remove firewall on MPFE so that SMMU can setup/walk tables in
the DDR.
Signed-off-by: Thor Thayer
Signed-off-by: Jit Loon Lim
---
arch/arm/mach-socfpga/firewall.c | 6 ++
arch/arm/mach-socfpga/include/mach/base_addr_soc64.h | 1 +
arch/arm/mach-socfpg
During init_dram() is called also setup_ddr_tlbs_phys() function which may
print message about unmapped DDR memory. So in this case print also
re-aligning filler after unmapped DDR memory message.
Signed-off-by: Pali Rohár
---
arch/powerpc/cpu/mpc85xx/tlb.c | 3 +++
1 file changed, 3 insertions(
From: Chin Liang See
An old inffast.c optimization turns out to not be optimal anymore
with modern compilers, and furthermore was not compliant with the
C standard, for which decrementing a pointer before its allocated
memory is undefined. Per the recommendation of a security audit of
the zlib co
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