On Thu, Apr 7, 2022 at 10:39 PM Stefan Roese wrote:
>
> Hi Tony,
>
> On 4/8/22 07:03, Tony Dinh wrote:
> > Hi all,
> >
> > This is a work-in-progress patch that I'm working on, to clean up the
> > DM Ethernet code for the Zyxel NSA310S board (Kirkwood 88F6702 A1).
> >
> > This NSA310s board Ethern
Hi Tony,
On 4/8/22 07:03, Tony Dinh wrote:
Hi all,
This is a work-in-progress patch that I'm working on, to clean up the
DM Ethernet code for the Zyxel NSA310S board (Kirkwood 88F6702 A1).
This NSA310s board Ethernet has some quirks that it does not work
quite the same way as other Kirwood boa
Hi all,
This is a work-in-progress patch that I'm working on, to clean up the
DM Ethernet code for the Zyxel NSA310S board (Kirkwood 88F6702 A1).
This NSA310s board Ethernet has some quirks that it does not work
quite the same way as other Kirwood boards with the similar network
chip (MV88E1318),
On 4/7/22 17:10, Sean Anderson wrote:
On 4/6/22 1:30 AM, Stefan Roese wrote:
On 4/1/22 21:03, Sean Anderson wrote:
Implementers of SPL_LOAD_IMAGE_METHOD have to correctly determine what
type of image is being loaded and then call the appropriate image load
function correctly. This is tricky,
From: Peng Fan
Drop CONFIG_MMCROOT, no users now.
Signed-off-by: Peng Fan
---
scripts/config_whitelist.txt | 1 -
1 file changed, 1 deletion(-)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 12208c7a2f8..3318086917d 100644
--- a/scripts/config_whitelist.txt
+++
From: Peng Fan
CONFIG_MMCROOT is only used to set mmcroot, no need a dedicated macro.
Script as below
"
for i in `ls include/configs/*.h`
do
mmcroot=`sed -n '/define.*MMCROOT/ p' $i | awk -F\" '{ print $2;}'`
if [ ! -n "$mmcroot" ]; then
continue
fi
sed -i '/define.*MMCROOT/ d'
From: Peng Fan
IMX_FEC_BASE is not used in these boards, so drop it.
Signed-off-by: Peng Fan
---
include/configs/apalis-imx8x.h | 1 -
include/configs/aristainetos2.h | 1 -
include/configs/cm_fx6.h | 1 -
include/configs/colibri-imx6ull.h| 1 -
inclu
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Signed-off-by: Peng Fan
---
include/configs/phycore_imx8mm.h | 4
include/configs/phycore_imx8mp.h | 4
2 files changed, 8 deletions(-)
diff --git a/in
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Signed-off-by: Peng Fan
---
include/configs/imx8mm_venice.h | 4
include/configs/imx8mn_venice.h | 3 ---
2 files changed, 7 deletions(-)
diff --git a/inclu
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Signed-off-by: Peng Fan
---
include/configs/imx8mm_beacon.h | 4
include/configs/imx8mn_beacon.h | 4
2 files changed, 8 deletions(-)
diff --git a/incl
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Signed-off-by: Peng Fan
---
include/configs/verdin-imx8mm.h | 3 ---
include/configs/verdin-imx8mp.h | 4
2 files changed, 7 deletions(-)
diff --git a/inclu
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Signed-off-by: Peng Fan
---
include/configs/imx8qm_mek.h | 5 -
include/configs/imx8qxp_mek.h | 5 -
2 files changed, 10 deletions(-)
diff --git a/inclu
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Signed-off-by: Peng Fan
---
include/configs/mx7dsabresd.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/include/configs/mx7dsabresd.h b/include/conf
From: Peng Fan
With DM_MMC, CONFIG_SYS_FSL_USDHC_NUM is not needed.
Signed-off-by: Peng Fan
---
include/configs/mx6sxsabresd.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index b679d13dc04..2552fc0222e 100644
--- a/includ
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Signed-off-by: Peng Fan
---
include/configs/imx8mn_evk.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/include/configs/im
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Signed-off-by: Peng Fan
---
include/configs/imx8mp_evk.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/imx8
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Signed-off-by: Peng Fan
---
include/configs/imx8mm_evk.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/include/configs/im
From: Peng Fan
For platforms with DM_MMC and SPL_DM_MMC, the SDHC macros are not needed.
CONFIG_MMCROOT could be actually dropped.
Drop IMX_FEC_BASE for boards that not use it
Tom, Stefano
this patches changes lots of files, not only imx, to avoid conflict, Tom
would you directly pick up if no
On Thu, 7 Apr 2022 16:03:12 -0700
Tim Harvey wrote:
> Is there a move to try and move all network drivers to DM_MDIO
> eliminating the need for struct mii_dev* within those drivers?
Yes.
Marek
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo.
The board is a compatible replacement for i.MX53 M53Menlo and features
USB, multiple UARTs, ethernet, LEDs, SD and eMMC.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Marcel Ziswiler
Cc: Max Krummenacher
Cc: Peng Fan
C
Rename board_early_init_f() to board_early_init(), since this function
has nothing to do with actual board_early_init_f() as used throughout
U-Boot. The board_early_init() is function local to this board used to
configure UART and WDT pinmux. Wrap init_uart_clk() into this function
so that early UA
The current implementation of boot_relocate_fdt() places DT at the
highest usable DRAM address, which is calculated as:
env_get_bootm_low() + env_get_bootm_mapsize()
which by default becomes gd->ram_base + gd->ram_size.
Systems like i.MX53 can have multiple DRAM banks with gap between them,
e.g.
On Thu, 7 Apr 2022, Stefan Roese wrote:
> > Hello! What do you think about this change? I think it is good
> > compromise between enable this workaround for all builds on all boards
> > and enable it only based on device id. Or would it be better to restrict
> > this workaround just for ASM2824 de
On Thu, Apr 7, 2022 at 2:31 PM Vladimir Oltean wrote:
>
> On Thu, Apr 07, 2022 at 01:33:58PM -0700, Tim Harvey wrote:
> > I guess I'll have to invest in tagging packets if you won't accept the
> > simplistic approach of not having to tag frames knowing that only one
> > port is active at a time.
>
On 2022/4/7 20:51, Pali Rohár wrote:
Fix following two compile errors on big endian systems:
CC fs/btrfs/btrfs.o
In file included from include/linux/byteorder/big_endian.h:107,
from ./arch/powerpc/include/asm/byteorder.h:82,
from ./arch/powerpc/incl
On Fri, Apr 1, 2022 at 7:55 AM Marek Vasut wrote:
>
> Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs,
> HSIOMIX PD controller and missing USB PD properties. This is required
> to bring up the DWC3 USB controller up.
>
> This is based on linux next and patches which are still
On Fri, Apr 1, 2022 at 7:32 AM Marek Vasut wrote:
>
> The i.MX8MP glue needs to be configured based on a couple of DT
> properties, implement .glue_configure callback to parse those DT
> properties and configure the glue accordingly.
>
> Signed-off-by: Marek Vasut
> Cc: Angus Ainslie
> Cc: Bin M
On Wed, Apr 6, 2022 at 9:03 PM Peng Fan (OSS) wrote:
>
>
>
> On 2022/4/1 22:30, Marek Vasut wrote:
> > Add clock tables required to bring up DWC3 USB, USB PHY and HSIOMIX domain.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Fabio Estevam
> > Cc: Peng Fan
> > Cc: Stefano Babic
> > Cc: Ye Li
>
>
On Thu, Mar 31, 2022 at 6:26 PM Marek Vasut wrote:
>
> Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to
> the i.MX8MQ, except for clock and power domain design customization.
>
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
> ---
> driver
On Thu, Apr 7, 2022 at 1:33 AM Marek Vasut wrote:
>
> On 4/7/22 06:01, Peng Fan (OSS) wrote:
> >
> >
> > On 2022/4/1 9:12, Marek Vasut wrote:
> >> Add i.MX8MP power domain handling into the driver. This is based on the
> >> Linux GPCv2 driver state which is soon to be in Linux next.
> >
> > Do we
On Fri, Apr 1, 2022 at 7:06 AM Marek Vasut wrote:
>
> Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible
> for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe
> in the correct order. Currently supported is the USB 3.0 part which
> can be tested, PCIe support shoul
On Wed, Mar 30, 2022 at 8:04 PM Marek Vasut wrote:
>
> This driver is the only SMCCC dependency in iMX8M U-Boot port. Rework
> the driver based on Linux GPCv2 driver to directly control the GPCv2
> block instead of using SMCCC calls. This way, U-Boot can operate the
> i.MX8M power domains without
On Thu, Apr 07, 2022 at 01:33:58PM -0700, Tim Harvey wrote:
> I guess I'll have to invest in tagging packets if you won't accept the
> simplistic approach of not having to tag frames knowing that only one
> port is active at a time.
I genuinely don't know where you got the impression from that I d
Hi Tom,
On 4/7/22 09:33, Tom Rini wrote:
The most commonly used value today is 0x2000 and not 0x400. Rework the
Kconfig logic to use this more frequently used value as the default.
Signed-off-by: Tom Rini
---
To make this patch more reviewable, I've omitted the defconfigs where
the in-use valu
On Sat, Apr 2, 2022 at 4:17 PM Vladimir Oltean wrote:
>
> On Fri, Apr 01, 2022 at 01:24:48PM -0700, Tim Harvey wrote:
> > > > > Why is mv88e61xx_dsa_xmit() no-op?
> > > >
> > > > For DSA dsa-uclass calls the switch master eth device send function
> > > > after calling the dsa_ops->xmit function so
Hi All,
The topic of information handoff between TF-A's BL31 and BL33 (e.g. U-boot
proper, EDK2) was discussed last year in the TF-A and U-boot mailing lists [1],
[2].
Examples of information to be handed off between firmware stages are the TPM
log, HOB nodes, etc.
Having a standard data struc
On 3/9/22 04:18, Marek Vasut wrote:
Add ID for Winbond W25Q128JW device. This is a 128 Mbit QSPI NOR.
Tested on W25Q128JWPIM part.
Signed-off-by: Marek Vasut
Cc: Horatiu Vultur
Cc: Jagan Teki
Cc: Simon Goldschmidt
Cc: Stefan Roese
Cc: Vignesh R
---
drivers/mtd/spi/spi-nor-ids.c | 5 +
On Thu, Apr 07, 2022 at 04:55:14AM -0700, Joel Peshkin wrote:
> Hi Rafal,
>
>The first 32b value is a magic number (endian swapped mnemonic of "uEnv"
> short for "u-boot environment"). Finding that magic number of a 4K
> boundary followed by a length and then a u-boot environment with a vali
On Fri, Nov 19, 2021 at 12:36:46PM +0800, Artem Lapkin wrote:
> Add possibility setup env variable with additional resolving vars inside
> value.
>
> Usage examples:
>
> => setenv a hello; setenv b world; setenv c '${a} ${b}'
> => setenv -r d '${c}! ${a}...'
> => printenv d
> d=hello world! hell
The most commonly used value today is 0x2000 and not 0x400. Rework the
Kconfig logic to use this more frequently used value as the default.
Cc: Andrew F. Davis
Cc: Alex Nemirovsky
Cc: Alexey Brodkin
Cc: Alison Wang
Cc: Anastasiia Lukianenko
Cc: Andes
Cc: Andre Przywara
Cc: Bharat Gooty
Cc
A number of platforms here had already been increasing the size a bit,
so lets moving all of them up.
Signed-off-by: Tom Rini
---
Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Kconfig b/Kconfig
index 8935df616201..4f1e4d8a13d3 100644
--- a/Kconfig
+++ b/Kconfig
@@ -
On 4/6/22 1:30 AM, Stefan Roese wrote:
> On 4/1/22 21:03, Sean Anderson wrote:
>> Implementers of SPL_LOAD_IMAGE_METHOD have to correctly determine what
>> type of image is being loaded and then call the appropriate image load
>> function correctly. This is tricky, because some image load functi
On Sat, Mar 26, 2022 at 11:47:40AM -0300, Fabio Estevam wrote:
> From: Fabio Estevam
>
> When adding new features to imx8m boards, such as DM clock support,
> the malloc area can be exhausted.
>
> To avoid such issue, provide a reasonable default for the
> SYS_MALLOC_F_LEN size.
>
> Quoting To
On Mon, Feb 28, 2022 at 12:08:18PM -0700, Simon Glass wrote:
> At present the default .buildman file written by buildman does not specify
> a default toolchain. Add an 'other' line so this works correctly and
> sandbox builds run as expected.
>
> Signed-off-by: Simon Glass
For the series, appli
On Thu, Apr 07, 2022 at 03:31:25PM +0200, Stefan Roese wrote:
> Added Tom to To...
>
> On 4/7/22 10:29, Pali Rohár wrote:
> > On Monday 04 April 2022 09:43:21 Stefan Roese wrote:
> > > On 4/3/22 00:36, Pali Rohár wrote:
> > > > Callers of function atsha204a_crc16() expect to return value in host
When an image stretches beyond the display border, one still needs
to seek to the next pixel line to display the visible part of that
image correctly.
Signed-off-by: Vitaly Wool
---
drivers/video/video_bmp.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/driv
Added Tom to To...
On 4/7/22 10:29, Pali Rohár wrote:
On Monday 04 April 2022 09:43:21 Stefan Roese wrote:
On 4/3/22 00:36, Pali Rohár wrote:
Callers of function atsha204a_crc16() expect to return value in host cpu
endianity. So remove cpu_to_le16() conversion.
Signed-off-by: Pali Rohár
Re
On Thu, Apr 07, 2022 at 01:54:24PM +0100, Abdellatif El Khlifi wrote:
> On Wed, Apr 06, 2022 at 03:47:11PM -0400, Tom Rini wrote:
> > On Tue, Mar 29, 2022 at 04:16:53PM +0100, abdellatif.elkhl...@arm.com wrote:
> > > From: Abdellatif El Khlifi
> > >
> > > This patchset adds support for Arm FF-A (
On Wed, Apr 06, 2022 at 03:47:11PM -0400, Tom Rini wrote:
> On Tue, Mar 29, 2022 at 04:16:53PM +0100, abdellatif.elkhl...@arm.com wrote:
> > From: Abdellatif El Khlifi
> >
> > This patchset adds support for Arm FF-A (Arm Firmware Framework for Armv8-A
> > v1.0).
> >
> > FF-A support is generic
This is needed for SDP downloads of eg. fitimages
in SPL stage.
Signed-off-by: Manuel Traut
---
common/spl/Kconfig | 10 +++
common/usb_hub.c| 4 +
drivers/usb/gadget/Makefile | 18 ++--
drivers/usb/gadget/ci_udc.c | 159 +---
drivers/usb
On Thu, 7 Apr 2022 14:51:03 +0200
Pali Rohár wrote:
> Fix following two compile errors on big endian systems:
>
> CC fs/btrfs/btrfs.o
> In file included from include/linux/byteorder/big_endian.h:107,
> from ./arch/powerpc/include/asm/byteorder.h:82,
> fr
Currently there is no btrfs support in SPL. But macro CONFIG_FS_BTRFS is
defined also when building SPL. When both FS_BTRFS and SPL are enabled
then build process throw compile error.
Fix check for btrfs code in fstypes[] to allow compiling FS_BTRFS only in
proper U-Boot.
Signed-off-by: Pali Rohá
Fix following two compile errors on big endian systems:
CC fs/btrfs/btrfs.o
In file included from include/linux/byteorder/big_endian.h:107,
from ./arch/powerpc/include/asm/byteorder.h:82,
from ./arch/powerpc/include/asm/bitops.h:8,
from inc
Hi Pierre-Clément,
Thanks for your correction, there was wrong mask here.
Reviewed-by: David Wu
在 2022/4/6 23:08, Kever Yang 写道:
Add David,
Hi David,
Could you help to check this patch?
Thanks,
- Kever
On 2022/3/16 23:39, Pierre-Clément Tosi wrote:
Swap the arguments as that seems to
If enable SPL_DM without SPL_OF_CONTROL,
build errors "undefined reference to fdt_get_resource",
is coming in function `caam_jr_probe'.
Added SPL_OF_CONTROL to remove the error.
Signed-off-by: Kshitiz Varshney
---
configs/ls1043ardb_nand_SECURE_BOOT_defconfig| 1 +
configs/ls1043ardb_sdc
From: Aaron Williams
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/include/mach/cvmx-agl.h |
This patch includes misc changes to already present Octeon MIPS C files
files, which are necessary for the upcoming ethernet support.
The changes are mostly:
- DM GPIO & I2C infrastructure
- Coding style cleanup while reworking of the code
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/c
On Thu, 7 Apr 2022 11:32:10 +0200
Pali Rohár wrote:
> Implement write support for Security OTP values via mailbox API commands
> MBOX_CMD_OTP_WRITE_32B and MBOX_CMD_OTP_WRITE.
>
> Write support for North and South Bridge OTPs are not implemented as these
> OTPs are already burned in factory wit
On Thu, 7 Apr 2022 13:53:23 +0200
Pali Rohár wrote:
> On Wednesday 06 April 2022 21:21:59 Marek Behún wrote:
> > On Wed, 6 Apr 2022 14:18:18 +0200
> > Pali Rohár wrote:
> >
> > > Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse
> > > is used for secure boot and each
On Wednesday 06 April 2022 21:21:59 Marek Behún wrote:
> On Wed, 6 Apr 2022 14:18:18 +0200
> Pali Rohár wrote:
>
> > Armada 385 contains 64 lines of HD eFuse and 2 lines of LD eFuse. HD eFuse
> > is used for secure boot and each line is 64 bits long + 1 lock bit. LD
> > eFuse lines are 256 bits
On Wed, Apr 06, 2022 at 02:36:35PM -0400, Sean Anderson wrote:
> We should only access console_devices[file][i] once we have checked that i
> < cd_count[file]. Otherwise, we will access uninitialized memory at the end
> of the loop. console_devices[file][i] should not be NULL, but putting the
> ass
Replace hardcoded boot i2c bus num and address by existing macros when
generating env for CONFIG_EXTRA_ENV_SETTINGS.
Same macros are used in U-Boot board code when reading information from
boot i2c data.
Signed-off-by: Pali Rohár
---
include/configs/p1_p2_rdb_pc.h | 24
All *boot env commands overrides default BootROM boot location via i2c.
BootROM then starts booting U-Boot from this specified location instead of
the default one.
Add new env command defboot which reverts BootROM boot location to the
default value, which in most cases is configurable by HW DIP sw
Whole section about USB/eLBC configuration seems to be P1020 specific. So
add ifdefs to not compile it on other platforms (e.g. P2020).
Signed-off-by: Pali Rohár
---
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescal
Replace hardcoded i2c hex values for NOR banks by named SW macros in
map_lowernorbank/map_uppernorbank env commands.
Signed-off-by: Pali Rohár
---
include/configs/p1_p2_rdb_pc.h | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/include/configs/p1_p2_rdb_pc.h b/in
Like for first 1G SDRAM map, do not enable Caching-inhibited nor Guarded
attribute for second 1G SDRAM mapping. Whole 2G SDRAM should use caches and
also allow speculative loading (by not setting Guarded attribute).
Also enable Memory Coherency attribute for second 1G SDRAM map. In commit
316f0d0f
On some boards upper 4 bits of i2c boot input data (register 0) are
negated. So negate read input data back prior processing them.
Fixes printing correct rom_loc: value.
Signed-off-by: Pali Rohár
---
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 4
1 file changed, 4 insertions(+)
diff --g
Code for changing BootROM source is platform generic and can be used by any
P1* and P2* compatible board. Not only by RDB boards which use config
header file p1_p2_rdb_pc.h.
So move this code from p1_p2_rdb_pc.h to p1_p2_bootrom.h and cleanup macros
for generating boot source env variables in CONF
When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes
inserted SD card readonly if GPIO[9] is active.
In some design GPIO[9] pin does not have to be connected to SD card
write-protect pin and can be used as GPIO.
So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not u
As written in comment, P2020 has two possible SD switch configurations.
Extend code to detect both of them.
Signed-off-by: Pali Rohár
---
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 4
include/configs/p1_p2_rdb_pc.h | 3 ++-
2 files changed, 6 insertions(+), 1 deletion(-)
di
Do not stringify env $vscfw_addr two times (once implicitly via string
operator "" and second time explicitly via __stringify() macro) and allow
to compile U-Boot without CONFIG_VSC7385_ENET (when __VSCFW_ADDR was not
defined and so macro name was stringified into CONFIG_EXTRA_ENV_SETTINGS).
Signe
Like in all other checks in checkboard() function, do not hang on error.
Signed-off-by: Pali Rohár
---
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
b/board/freescale/p1_p2_rdb_pc/p1_p2
This patch series contains various cleanups and fixes for shared P1*/P2*
board code and preparation for introducing support for another P2020 board.
Pali Rohár (11):
board: freescale: p1_p2_rdb_pc: Do not hang in checkboard()
board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch
conf
On Thu, 7 Apr 2022 at 08:20, Heinrich Schuchardt wrote:
>
> On 3/31/22 12:09, Andrew Scull wrote:
> > The virtio-rng driver is extremely simple, making it suitable for
> > testing more of the virtio uclass logic. Have the sandbox driver bind
> > the virtio-rng driver rather than the virtio-blk dri
On Wed, 6 Apr 2022 at 15:18, Pierre-Clément Tosi wrote:
>
> Hi,
>
> On Thu, Mar 31, 2022 at 10:09:48AM +, Andrew Scull wrote:
> > Check the length of data written by the device is consistent with the
> > size of the buffers to avoid out-of-bounds memory accesses in case
> > values aren't consi
On Thursday 07 April 2022 11:54:55 Miquel Raynal wrote:
> Hi Pali,
>
> p...@kernel.org wrote on Thu, 7 Apr 2022 11:41:59 +0200:
>
> > On Thursday 07 April 2022 09:54:21 Miquel Raynal wrote:
> > > Hi Pali,
> > >
> > > p...@kernel.org wrote on Wed, 6 Apr 2022 23:31:53 +0200:
> > >
> > > Would yo
Hi Pali,
p...@kernel.org wrote on Thu, 7 Apr 2022 11:41:59 +0200:
> On Thursday 07 April 2022 09:54:21 Miquel Raynal wrote:
> > Hi Pali,
> >
> > p...@kernel.org wrote on Wed, 6 Apr 2022 23:31:53 +0200:
> >
> > Would you mind explaining a little bit how this change fixes it? It
> > does not loo
This is a hugely ugly hack to poison and unpoison memory allocated by
dlmalloc. It wraps every access dlmalloc makes to the metadata breifly
allow it access, taking care not to then poison the parts of the record
which overlap.
The result is very small redzones between the allocations, which has
l
On Thursday 07 April 2022 09:54:21 Miquel Raynal wrote:
> Hi Pali,
>
> p...@kernel.org wrote on Wed, 6 Apr 2022 23:31:53 +0200:
>
> Would you mind explaining a little bit how this change fixes it? It
> does not look straightforward to me.
Yes! I though that it is straightforward this change...
Move the program's entry point to os.c, in preparation for a separate
fuzzing entry point to be added.
Signed-off-by: Andrew Scull
---
arch/sandbox/cpu/os.c | 6 ++
arch/sandbox/cpu/start.c| 2 +-
arch/sandbox/include/asm/main.h | 18 ++
3 files changed, 2
Add a fuzzing engine driver for the sandbox to take inputs from
libfuzzer and expose them to the fuzz tests.
Signed-off-by: Andrew Scull
---
arch/Kconfig | 2 ++
arch/sandbox/dts/test.dts | 4 +++
drivers/fuzzing_engine/Kconfig
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.
Having a '.' in the section names conflicts with clang's ASAN
instrumentation
Add an implementation of LLVMFuzzerTestOneInput() that starts the
sandbox on a secondary thread and exposes a function to synchronize the
generation of fuzzing inputs with their consumption by the sandbox.
Signed-off-by: Andrew Scull
---
arch/sandbox/config.mk| 3 +
arch/san
Add the basic infrastructure for declaring fuzz tests and a command to
invoke them.
Signed-off-by: Andrew Scull
---
Kconfig | 8 +
include/test/fuzz.h | 51 +++
test/Makefile| 1 +
test/fuzz/Makefile | 7
test/fuzz/cmd_fuzz.c | 82 +
Add CONFIG_ASAN to build with the Address Sanitizer. This only works
with the sandbox so the config is likewise dependent. The resulting
executable will have ASAN instrumentation, including the leak detector
that can be disabled with the ASAN_OPTIONS environment variable:
ASAN_OPTIONS=detect_le
This new class of device will provide fuzzing inputs from a fuzzing
engine.
Signed-off-by: Andrew Scull
---
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/fuzzing_engine/Kconfig| 6 +++
drivers/fuzzing_engine/M
Use the common infrastructure to create a linker list of the sandbox
command line flags rather than using a custom method.
The list is changed from containing pointers to containing structs and
the uses are updated accordingly.
Signed-off-by: Andrew Scull
---
arch/sandbox/cpu/os.c
The sandbox doesn't populate the EFI lists so explicitly set the list
start and end symbols to indicate that the lists are empty. This
simplifies the linker scripts, removed references to non-existant
sections and removes '.' prefixed sections that conflicted with clang's
ASAN.
Signed-off-by: Andr
/tools/boot/ is a build product. Add it to .gitignore
Signed-off-by: Du Huanpeng
---
tools/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/.gitignore b/tools/.gitignore
index a88453f64d..d3a93ff294 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -36,3 +36,4 @@
/upda
Implement write support for Security OTP values via mailbox API commands
MBOX_CMD_OTP_WRITE_32B and MBOX_CMD_OTP_WRITE.
Write support for North and South Bridge OTPs are not implemented as these
OTPs are already burned in factory with some data.
Signed-off-by: Pali Rohár
---
This patch depends o
Hi Alex,
On Thu, Mar 10, 2022 at 09:03:08AM +0100, Alexandre Ghiti wrote:
> Hi Leo,
>
> On Wed, Mar 9, 2022 at 7:31 AM Leo Liang wrote:
> >
> > Hi Alex,
> > On Thu, Mar 03, 2022 at 11:06:18AM +, Leo Liang wrote:
> > > Hi Alex,
> > > On Tue, Mar 01, 2022 at 03:21:56AM +, Leo Liang wrote:
>
Hi,
On 2/7/22 12:18, Adrian Fiergolski wrote:
This patchset introduces support for the authenticated FPGA images
on ZynqMP boards, besides that introducing common way to pass the
compatible property to any fpga driver.
It bases on the initial work by Jorge Ramirez-Ortiz
https://patchwork.ozlab
On 2/7/22 12:18, Adrian Fiergolski wrote:
From: Oleksandr Suvorov
Introduce a function which passes an fpga compatible string from
FIT images to FPGA drivers. This lets the different implementations
decide how to handle it.
Some code of Jorge Ramirez-Ortiz is reused.
Signed-off-by: Oleksa
On 4/7/22 06:01, Peng Fan (OSS) wrote:
On 2022/4/1 9:12, Marek Vasut wrote:
Add i.MX8MP power domain handling into the driver. This is based on the
Linux GPCv2 driver state which is soon to be in Linux next.
Do we really need this in U-Boot? You will also port the blk-ctrl part?
That would b
On Monday 04 April 2022 09:43:21 Stefan Roese wrote:
> On 4/3/22 00:36, Pali Rohár wrote:
> > Callers of function atsha204a_crc16() expect to return value in host cpu
> > endianity. So remove cpu_to_le16() conversion.
> >
> > Signed-off-by: Pali Rohár
>
> Reviewed-by: Stefan Roese
Hello Stefan
On 2/7/22 12:18, Adrian Fiergolski wrote:
From: Oleksandr Suvorov
It allows using this feature without enabling the "fpga loads"
command.
Signed-off-by: Oleksandr Suvorov
Tested-by: Ricardo Salveti
---
cmd/Kconfig | 3 ++-
drivers/fpga/Kconfig| 14 ++
driv
On 2/7/22 12:18, Adrian Fiergolski wrote:
From: Oleksandr Suvorov
Pass an address of xilinx_desc pointer in an fpga_desc to use parent
double space here.
M
On 2/7/22 12:18, Adrian Fiergolski wrote:
From: Oleksandr Suvorov
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).
Based on solution by Jorge Ramirez-Ortiz
Signed-off-by: Oleksandr Suvorov
Co-developed-by: Ricardo Salveti
Sig
On 2/7/22 12:18, Adrian Fiergolski wrote:
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to handle
loading encrypted bitfiles.
This feature requires encrypted FSBL,as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM or eFUSEs,
as a key
Hi Pali,
p...@kernel.org wrote on Wed, 6 Apr 2022 23:31:53 +0200:
Would you mind explaining a little bit how this change fixes it? It
does not look straightforward to me.
> Signed-off-by: Pali Rohár
> ---
> fs/squashfs/sqfs.c | 3 +--
> fs/squashfs/sqfs_dir.c | 3 +--
> 2 files changed, 2
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