On 11.01.21 08:17, Heinrich Schuchardt wrote:
Am 11. Januar 2021 08:02:12 MEZ schrieb Stefan Roese :
Added Heinrich to Cc.
On 10.01.21 19:44, Matthias Brugger wrote:
On 09/01/2021 15:57, Stefan Roese wrote:
On 09.01.21 03:32, Matthias Brugger wrote:
On 08/01/2021 08:39, Stefan Roese wrote
Add initial support PHYTEC phyCORE-i.MX8MP SOM.
Supported features:
- 2GB LPDDR4 RAM
- eMMC
- external SD
- debug UART2
- watchdog
Signed-off-by: Teresa Remmet
---
Changes in v2:
- remove not needed spl board init
- remove ifdef from board_fit_config_name_match
- dis
Am 11. Januar 2021 08:02:12 MEZ schrieb Stefan Roese :
>Added Heinrich to Cc.
>
>On 10.01.21 19:44, Matthias Brugger wrote:
>> On 09/01/2021 15:57, Stefan Roese wrote:
>>> On 09.01.21 03:32, Matthias Brugger wrote:
On 08/01/2021 08:39, Stefan Roese wrote:
> On 07.01.21 16:36, matthias@
Giant board is a tiny SBC based on the Adafruit Feather form factor,
created by groboards it contains a SAMA5D2 processor (SAMA5D27),
128 MB of RAM and a microSD card for storage.
Signed-off-by: Greg Gallagher
---
arch/arm/dts/Makefile | 3 +
arch/arm/dts/at91-sama5d27
The dm root node is needed early in the spl to allow the timer to be
used. This change calls spl_early_init to initialize the dm root node.
Signed-off-by: Greg Gallagher
---
arch/arm/mach-at91/spl_atmel.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-at91/spl_atmel.c
Added Heinrich to Cc.
On 10.01.21 19:44, Matthias Brugger wrote:
On 09/01/2021 15:57, Stefan Roese wrote:
On 09.01.21 03:32, Matthias Brugger wrote:
On 08/01/2021 08:39, Stefan Roese wrote:
On 07.01.21 16:36, matthias@kernel.org wrote:
From: Matthias Brugger
Watchdog timeout comes in b
Hi Rick,
On Mon, Jan 11, 2021 at 8:26 AM Rick Chen wrote:
> Hi Padmarao
>
> > From: Padmarao Begari [mailto:padmarao.beg...@microchip.com]
> > Sent: Tuesday, December 22, 2020 9:12 PM
> > To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志);
> anup.pa...@wdc.com; lukas.a...@aise
Hi Alex,
Yeah, I think I'll wind up with some ifdef code for the static init.
In the case of arm (32-bit), there is actually a GCC bug that causes it to
use the address of the canary value instead of the canary value itself.
GCC upstream just fixed that a few days ago, but it may be a year or
plz ignore my prev emails
> AFAIK, it's fixed with Marek's patch
>
https://patchwork.ozlabs.org/project/uboot/patch/20201217072642.1319-1-m.szyprow...@samsung.com/
look like yes ! u right
Best regards Art
On Mon, Jan 11, 2021 at 9:27 AM Art Nikpal wrote:
> > AFAIK, it's fixed with Marek's pa
> AFAIK, it's fixed with Marek's patch
>
https://patchwork.ozlabs.org/project/uboot/patch/20201217072642.1319-1-m.szyprow...@samsung.com/
not solve !
because mac which must stored in mcu is empty by default
and by default we have random mac every time
i think i will make new complex patch from bo
Cc: Simon Glass
Cc: Bin Meng
Cc: Jagan Teki
Cc: Kever Yang
Cc: Heinrich Schuchardt
Cc: AKASHI Takahiro
Cc: Usama Arif
Cc: Sam Protsenko
Cc: Masahiro Yamada
Cc: Philippe Reynes
Cc: Eugeniu Rosca
Cc: Jan Kiszka
Signed-off-by: Joel Peshkin
Changes for v2:
- Add test command and corre
Hi Padmarao
> From: Padmarao Begari [mailto:padmarao.beg...@microchip.com]
> Sent: Tuesday, December 22, 2020 9:12 PM
> To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志);
> anup.pa...@wdc.com; lukas.a...@aisec.fraunhofer.de; joe.hershber...@ni.com;
> lu...@denx.de; atish.pa..
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Sunday, January 10, 2021 8:43 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick
> Jian-Zhi Chen(陳建志);
On 1/11/21 10:03 AM, Andre Przywara wrote:
> So far the only difference between the various Allwinner MMC controller
> we are concerned about is the mod clock register offset.
> This is actually not directly related to the MMC controller IP, but an
> integration choice, dependent on the SoC this ap
On 1/11/21 9:02 AM, André Przywara wrote:
> On 03/01/2021 09:26, Jernej Skrabec wrote:
>> This PMIC can be found on H616 boards and it's very similar to AXP805
>> and AXP806.
>>> Signed-off-by: Jernej Skrabec
>
> The existing sunxi PMIC code is the typical U-Boot mess, but I don't
> want to block
At the moment we only consider the EPHY register for those SoCs were
we actually have an internal PHY to configure. However even other SoCs
have this register, an expect a bit to be cleared for proper operation
with an external PHY.
Rework sun8i_emac_set_syscon_ephy() to be called regardless of th
Most SoCs using the sun8i-emac IP use a register in the "syscon" area to
control some PHY related settings. The R40 is special, since this
register is located in the CCU IP.
So far we were storing the *base* address in our priv struct, then adding
the offset later when we need to use it.
Change th
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid becoming trapped with some comp
Hi,
I came up with those three patches to prepare for the H616.
Patch 1 simplifies the MMC driver, so the H616 support becomes a
one-liner.
Patch 2 cleans up the Ethernet driver, so we can support the same
compatible strings and fallbacks as Linux.
Patch 3 prepares the EMAC driver for the second E
On 03/01/2021 09:26, Jernej Skrabec wrote:
> This commit introduces DM H616 clock driver.
>
> Signed-off-by: Jernej Skrabec
Compared against the manual.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/clk/sunxi/Kconfig| 7 ++
> drivers/clk/sunxi/Makefile | 1 +
> drivers
On 03/01/2021 09:26, Jernej Skrabec wrote:
> H616 pinctrl is no different configuration wise than others, so just add
> compatible for it.
>
> Signed-off-by: Jernej Skrabec
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/gpio/sunxi_gpio.c | 1 +
> 1 file changed, 1 insertion(+)
>
On 03/01/2021 09:26, Jernej Skrabec wrote:
> It turns out that several SoCs share same mmc configuration as H6. In
> order to lower ifdef clutter replace H6 specific macro with common one.
>
> Signed-off-by: Jernej Skrabec
Shame we need to do this, but the SPL requires this ifdef orgy.
Reviewed
On 04/01/2021 18:28, Jernej Škrabec wrote:
> Dne ponedeljek, 04. januar 2021 ob 11:35:41 CET je André Przywara napisal(a):
>> On 03/01/2021 23:43, Samuel Holland wrote:
>>
>> Hi Jernej,
>>
>> thanks for that patch, that's a nice solution to avoid those long #ifdef
>> chains!
>>
>>> On 1/3/21 3:26 A
On 03/01/2021 09:26, Jernej Skrabec wrote:
> This PMIC can be found on H616 boards and it's very similar to AXP805
> and AXP806.
>> Signed-off-by: Jernej Skrabec
The existing sunxi PMIC code is the typical U-Boot mess, but I don't
want to block this series on a rework. I put some comments and ide
Hi Heinrich,
Thank you for your comments. I have 2 questions about how to proceed
1) Unit test
I can add a function that can be used to trigger an overrun, but I am not
sure where to include it as the stack protector prints the error message
and then resets uboot so it wouldn't fir in a
On 10/01/2021 23:16, Samuel Holland wrote:
> On 1/10/21 1:29 PM, Jernej Skrabec wrote:
>> From: Andre Heider
>>
>> dts file is taken from Linux 5.11-rc1 tag.
>>
>> The Bluetooth controller of this device ships with a default address,
>> use the new CONFIG_FIXUP_BDADDR option to fix it up.
>
> Thi
On 1/10/21 1:29 PM, Jernej Skrabec wrote:
> From: Andre Heider
>
> dts file is taken from Linux 5.11-rc1 tag.
>
> The Bluetooth controller of this device ships with a default address,
> use the new CONFIG_FIXUP_BDADDR option to fix it up.
This still references the old config name. It should be
On 10/01/2021 19:29, Jernej Skrabec wrote:
> This series introduces OrangePi 3 support.
>
> Previous cover letter:
> This is just refreshed v4 from here:
> https://patchwork.ozlabs.org/project/uboot/list/?series=156657&state=*
>
> Patches are only rebased, DT updated and defconfig regenerated, so
On 10/01/2021 18:43, Jernej Škrabec wrote:
> Dne petek, 08. januar 2021 ob 03:01:42 CET je André Przywara napisal(a):
>> On 03/12/2020 17:46, Jernej Skrabec wrote:
>>> It turns out that in rare cases, current analytical approach to detect
>>> correct DRAM bus width and rank on H6 doesn't work. On s
Hi,
On 1/8/21 2:43 PM, Artem Lapkin wrote:
> Fixed randomly generated ethernet mac address!
>
> Used meson_generate_serial_ethaddr for generate mac address from
> board serial number, if ethaddr variable not defined.
AFAIK, it's fixed with Marek's patch
https://patchwork.ozlabs.org/project/uboo
Hi,
> +
> +unsigned long __stack_chk_guard = 0xfeedf00ddeadbeef;
sizeof(unsigned long) isn't always 8, even gcc issues a warning when it's
invoked with proper options (e.g. 32-bit build):
> warning: conversion from ‘long long unsigned int’ to ‘long unsigned int’
> changes value from ‘1836960239
Am 10. Januar 2021 20:44:15 MEZ schrieb Joel Peshkin
:
>Hi Heinrich,
>
>Thank you for your comments. I have 2 questions about how to
>proceed
>
>1) Unit test
>I can add a function that can be used to trigger an overrun, but I am
>not
>sure where to include it as the stack protector prints the
Dne nedelja, 10. januar 2021 ob 20:29:39 CET je Jernej Skrabec napisal(a):
> From: Andre Heider
>
> dts file is taken from Linux 5.11-rc1 tag.
>
> The Bluetooth controller of this device ships with a default address,
> use the new CONFIG_FIXUP_BDADDR option to fix it up.
>
> akonadi:?collection
From: Andre Heider
dts file is taken from Linux 5.11-rc1 tag.
The Bluetooth controller of this device ships with a default address,
use the new CONFIG_FIXUP_BDADDR option to fix it up.
akonadi:?collection=30&name=INBOX
Acked-by: Maxime Ripard
Signed-off-by: Andre Heider
[Updated OrangePi 3 DT
From: Andre Heider
Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3,
ship with the controller default address.
Add a config option to fix it up so it can function properly.
Signed-off-by: Andre Heider
Tested-by: Ondrej Jirman
Acked-by: Maxime Ripard
[rebased]
Signed-off-by:
From: Andre Heider
Refactor setup_environment() so we can use the created sid for a
Bluetooth address too.
Acked-by: Maxime Ripard
Reviewed-by: Andre Przywara
Signed-off-by: Andre Heider
[rebased]
Signed-off-by: Jernej Skrabec
---
board/sunxi/board.c | 121 --
This series introduces OrangePi 3 support.
Previous cover letter:
This is just refreshed v4 from here:
https://patchwork.ozlabs.org/project/uboot/list/?series=156657&state=*
Patches are only rebased, DT updated and defconfig regenerated, so
I kept old tags. Only difference with old version is tha
On 10/01/2021 19:44, Matthias Brugger wrote:
>
>
> On 09/01/2021 15:57, Stefan Roese wrote:
>> On 09.01.21 03:32, Matthias Brugger wrote:
>>> On 08/01/2021 08:39, Stefan Roese wrote:
On 07.01.21 16:36, matthias@kernel.org wrote:
> From: Matthias Brugger
>
> Watchdog timeout
On 09/01/2021 15:57, Stefan Roese wrote:
> On 09.01.21 03:32, Matthias Brugger wrote:
>> On 08/01/2021 08:39, Stefan Roese wrote:
>>> On 07.01.21 16:36, matthias@kernel.org wrote:
From: Matthias Brugger
Watchdog timeout comes in before we are able to load the
kernel and
Dne petek, 08. januar 2021 ob 03:01:42 CET je André Przywara napisal(a):
> On 03/12/2020 17:46, Jernej Skrabec wrote:
> > It turns out that in rare cases, current analytical approach to detect
> > correct DRAM bus width and rank on H6 doesn't work. On some TV boxes
> > with DDR3, incorrect DRAM con
On 1/10/21 2:43 PM, Tom Rini wrote:
On Sun, Jan 10, 2021 at 01:05:14PM +0100, Heinrich Schuchardt wrote:
On 1/9/21 10:23 PM, Tom Rini wrote:
On Sat, Jan 09, 2021 at 08:59:01PM +0100, Heinrich Schuchardt wrote:
Am 9. Januar 2021 20:40:04 MEZ schrieb Tom Rini :
On Sat, Jan 09, 2021 at 08:33:40P
On 1/10/21 4:39 PM, Joel Peshkin wrote:
Cc: Simon Glass
Cc: Bin Meng
Cc: Jagan Teki
Cc: Kever Yang
Cc: Heinrich Schuchardt
Cc: AKASHI Takahiro
Cc: Usama Arif
Cc: Sam Protsenko
Cc: Masahiro Yamada
Cc: Philippe Reynes
Cc: Eugeniu Rosca
Cc: Jan Kiszka
Signed-off-by: Joel Peshkin
---
I am trying to boot from SOM-RK3399v2 board. Can't get to u-boot shell, but
TPL and SPL seems to be working. Booting from uSD or eMMC works.
Reading SPI flash it and diff-ing hex dumps shows nothing weird.
SPI image is created with following commands:
make clean distclean && make && make -j6
tool
Cc: Simon Glass
Cc: Bin Meng
Cc: Jagan Teki
Cc: Kever Yang
Cc: Heinrich Schuchardt
Cc: AKASHI Takahiro
Cc: Usama Arif
Cc: Sam Protsenko
Cc: Masahiro Yamada
Cc: Philippe Reynes
Cc: Eugeniu Rosca
Cc: Jan Kiszka
Signed-off-by: Joel Peshkin
---
Makefile | 4
common/Kc
On Sun, Jan 10, 2021 at 1:23 AM Heinrich Schuchardt wrote:
> Am 9. Januar 2021 22:23:01 MEZ schrieb Tom Rini :
> >On Sat, Jan 09, 2021 at 08:59:01PM +0100, Heinrich Schuchardt wrote:
> >> Am 9. Januar 2021 20:40:04 MEZ schrieb Tom Rini :
> >> >On Sat, Jan 09, 2021 at 08:33:40PM +0100, Heinrich Sch
On Sun, Jan 10, 2021 at 01:05:14PM +0100, Heinrich Schuchardt wrote:
> On 1/9/21 10:23 PM, Tom Rini wrote:
> > On Sat, Jan 09, 2021 at 08:59:01PM +0100, Heinrich Schuchardt wrote:
> > > Am 9. Januar 2021 20:40:04 MEZ schrieb Tom Rini :
> > > > On Sat, Jan 09, 2021 at 08:33:40PM +0100, Heinrich Schu
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel
---
Changes in v3:
- Add IS_ENABLED(CONFIG_TIMER_EARLY) for timer_early_get_rate()
and timer_early_get_count() functions.
Changes in v2:
- make u-boot compile f
When tracing functions is enabled this adds calls to
__cyg_profile_func_enter() and __cyg_profile_func_exit() to the traced
functions.
__cyg_profile_func_enter() and __cyg_profile_func_exit() invoke
timer_get_us() to record the entry and exit time.
initr_dm() will make gd->dm_root = NULL and gd->
Hi Rick,
On Wed, Jan 6, 2021 at 7:28 AM Rick Chen wrote:
>
> Hi Pragnesh
>
> > On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson wrote:
> > >
> > > On 1/4/21 8:37 PM, Rick Chen wrote:
> > > > Hi Pragnesh
> > > >
> > > >>> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> > > >>> Sent: Tuesday
On Sat, Jan 9, 2021 at 5:23 PM Heinrich Schuchardt wrote:
>
> Am 9. Januar 2021 22:23:01 MEZ schrieb Tom Rini :
> >On Sat, Jan 09, 2021 at 08:59:01PM +0100, Heinrich Schuchardt wrote:
> >> Am 9. Januar 2021 20:40:04 MEZ schrieb Tom Rini :
> >> >On Sat, Jan 09, 2021 at 08:33:40PM +0100, Heinrich Sc
On 1/9/21 10:23 PM, Tom Rini wrote:
On Sat, Jan 09, 2021 at 08:59:01PM +0100, Heinrich Schuchardt wrote:
Am 9. Januar 2021 20:40:04 MEZ schrieb Tom Rini :
On Sat, Jan 09, 2021 at 08:33:40PM +0100, Heinrich Schuchardt wrote:
On 1/9/21 7:58 PM, Tom Rini wrote:
On Sat, Jan 09, 2021 at 08:47:07PM
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