From: Bin Meng
Variable fdt_size should be of type 'fdt_size_t', not 'fdt_addr_t'.
Fixes 0d7c2913fdf7: ("cmd: bootefi: Honor the address & size cells properties
correctly")
Signed-off-by: Bin Meng
---
cmd/bootefi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/cmd/boo
From: Jan Kiszka
Add DT entries for main domain watchdog0 and 1 instances on the J721e
well as RTI1-based watchdog on the AM65x. RTI0 does not work for this
purpose on the AM65x, so leave it out.
Signed-off-by: Jan Kiszka
---
arch/arm/dts/k3-am65-mcu.dtsi | 9 +
arch/arm/dts/k3-j721
From: Jan Kiszka
To avoid the need of extra boot scripting on AM65x for loading a
watchdog firmware, add the required rproc init and loading logic for the
first R5F core to the watchdog start handler. The firmware itself is
embedded into U-Boot binary.
One possible firmware source is https://git
This brings watchdog support for the TI K3 SoCs, derived from the Linux
kernel, augmented with firmware loading as needed on the AM65x.
Tested on the AM65x EVM and the IOT2050 (also AM65x-based, upstream
support will be posted soon).
Jan
Jan Kiszka (3):
watchdog: Add support for K3 RTI watchdo
From: Jan Kiszka
This is based on the Linux kernel driver for the RTI watchdog.
To actually reset the system on an AM65x, it requires firmware running
on the R5 that accepts the NMI and issues the actual system reset via
TISCI. Kind of an iTCO, except that this watchdog hardware has support
for
From: Bin Meng
This adds a test case to test the functionality of the fdtdec API
fdtdec_add_reserved_memory().
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- correct typo in the comments, and some minor rewording
test/dm/fdtdec.c | 69 ++
From: Bin Meng
Add DECLARE_GLOBAL_DATA_PTR since it is referenced in the test codes.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
---
Changes in v4:
- drop the first 2 patches that are already applied
- rebase against u-boot/next branch
test/dm/fdtdec.c | 2 ++
1 file changed, 2 inserti
From: Bin Meng
It should be "writable".
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
---
(no changes since v1)
test/dm/fdtdec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/test/dm/fdtdec.c b/test/dm/fdtdec.c
index c2f7b94..999d712 100644
--- a/test/dm/fdtdec.c
++
From: Bin Meng
This adds syscon reboot and poweroff support to QEMU RISC-V.
Signed-off-by: Bin Meng
---
board/emulation/qemu-riscv/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/board/emulation/qemu-riscv/Kconfig
b/board/emulation/qemu-riscv/Kconfig
index ad99b08..617c4aa 10
From: Bin Meng
The HiFive Unleashed board wires GPIO pin#10 to the input of the
system reset signal. This adds gpio reboot support.
Signed-off-by: Bin Meng
---
board/sifive/fu540/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kcon
From: Bin Meng
Per the DT binding, and property can have either one
or both, and if is missing, should be used, which is
what current U-Boot sysreset_syscon driver supports.
This adds support to the property to the driver, and
semantics is updated to really be a mask to the value if both e
From: Bin Meng
SYSRESET uclass driver already provides all the reset APIs, hence
exclude our own ad-hoc reset.c implementation.
Signed-off-by: Bin Meng
---
arch/riscv/lib/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index b5e
From: Bin Meng
Per the DT binding, is a required property. Let's abort
the probe if it is missing. For the property, current codes
assume a default value of zero, which is not correct either.
Signed-off-by: Bin Meng
---
drivers/sysreset/sysreset_syscon.c | 14 --
1 file changed,
Hi Tom,
> On Mon, Jun 22, 2020 at 02:03:52PM +0800, Rick Chen wrote:
> > Hi Tom
> >
> > > From: Tom Rini [mailto:tr...@konsulko.com]
> > > Sent: Monday, May 25, 2020 11:40 PM
> > > To: Open Source Project uboot
> > > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > > Subject: Re: [U-Boot] Pul
Hey all,
It's release day and I've tagged v2020.07-rc5. There's been a few
assorted bug fixes to come in, and -next is open. As far as I know,
there's only some i.MX regression fixes to come in to fix ethernet in a
few cases.
Once again, for a changelog,
git log --merges v2020.07-rc4..v2020.07
Gentle ping?
Any updates?
Hopes this won't block the incoming new features too long.
Thanks,
Qu
On 2020/5/25 下午2:32, Qu Wenruo wrote:
> The branch can be fetched from github:
> https://github.com/adam900710/u-boot/tree/btrfs_rebuild
>
> The current btrfs code in U-boot is using a creative way t
Hi Tom,
On Mon, Jun 22, 2020 at 10:02 PM Tom Rini wrote:
>
> On Mon, Jun 22, 2020 at 10:01:09PM +0800, Bin Meng wrote:
> > Hi Tom,
> >
> > On Mon, Jun 22, 2020 at 9:58 PM Tom Rini wrote:
> > >
> > > On Mon, Jun 22, 2020 at 09:43:57PM +0800, Bin Meng wrote:
> > > > Hi Tom,
> > > >
> > > > On Mon,
On Mon, Jun 22, 2020 at 02:03:52PM +0800, Rick Chen wrote:
> Hi Tom
>
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Monday, May 25, 2020 11:40 PM
> > To: Open Source Project uboot
> > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > Subject: Re: [U-Boot] Pull request: u-boot-riscv/
Extend fastboot_set_reboot_flag arguments with reboot reason so that
it could handle different reboot cases in future.
Signed-off-by: Roman Kovalivskyi
---
arch/arm/mach-meson/board-common.c | 6 +-
arch/arm/mach-rockchip/board.c | 6 +-
board/amazon/kc1/kc1.c | 6
Default implementation of fastboot_set_reboot_flag function that depends
on "bcb" commands could be used in general case if there are no need to
make any platform-specific implementation, otherwise it could be
disabled via Kconfig option FASTBOOT_USE_BCB_SET_REBOOT_FLAG.
Please note that FASTBOOT_
Android 10 adds support for dynamic partitions and in order to support
this userspace fastboot must be used[1]. New tool fastbootd is
included into recovery.
Userspace fastboot works from recovery and is launched if:
1) - Dynamic partitioning is enabled
2) - Boot control block has 'boot-fastboot'
Android 10 adds support for dynamic partitions and in order to support
them userspace fastboot must be used[1]. New tool called fastbootd is included
into recovery image.
Userspace fastboot works from recovery and is launched if:
1) - Dynamic partitioning is enabled
2) - Boot control block has 'bo
On Mon, Jun 22, 2020 at 06:10:27PM +0200, Heinrich Schuchardt wrote:
> We currently have two implementations of UEFI variables:
>
> * variables provided via an OP-TEE module
> * variables stored in the U-Boot environment
>
> Read only variables are up to now only implemented in the U-Boot
> envir
To use CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE, a developer must pull down the
U-Boot source and run ./tools/zynqmp_pm_cfg_obj_convert.py to convert
their pm_cfg_obj.c into U-Boot's PMU loader format, then feed that file
back to U-Boot during build.
Instead, by doing the conversion in U-Boot during the
From: Igor Opaniuk
Enable these Kconfig symbols:
TDX_CFG_BLOCK_EXTRA=y
TDX_HAVE_EEPROM_EXTRA=y
Signed-off-by: Igor Opaniuk
---
board/toradex/verdin-imx8mm/Kconfig | 6 ++
configs/verdin-imx8mm_defconfig | 1 +
2 files changed, 7 insertions(+)
diff --git a/board/toradex/verdin-imx8mm/
From: Igor Opaniuk
Rename EEPROM nodes.
Create aliases for EEPROM to unify their order:
eeprom0 - on-module EEPROM
eeprom1 - carrier-board EEPROM
eeprom2 - MIPI-DSI to HDMI adapter EEPROM
Signed-off-by: Igor Opaniuk
---
arch/arm/dts/imx8mm-verdin.dts | 22 ++
1
This series introduces support for EEPROM as a storage for the main Toradex
config block and additional config blocks on extra EEPROM chips (on
carrier board or video adapters).
To enable EEPROM as a storage for the main config block:
TDX_HAVE_EEPROM=y.
For additional EEPROMs please enable this K
From: Igor Opaniuk
This introduces support for EEPROM as a storage for the main Toradex
config block and additional config blocks on extra EEPROM chips (on
carrier board or video adapters).
To enable EEPROM as a storage for the main config block:
TDX_HAVE_EEPROM=y.
For additional EEPROMs please
From: Igor Opaniuk
Add carrier board info printing during boot time:
U-Boot 2020.07-rc4-02435-g1756e05 (Jun 22 2020 - 22:43:59 +0300)
CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz
Carrier: Toradex Verdin Development Board V1.0A, Serial# 10622780
Verdin iMX8MM #
Signed-off-by: Igor Opaniuk
From: Igor Opaniuk
These functions wrap functionality for storing config blocks in EEPROM.
Signed-off-by: Igor Opaniuk
---
board/toradex/common/Makefile | 1 +
board/toradex/common/tdx-eeprom.c | 90 +++
board/toradex/common/tdx-eeprom.h | 14 ++
3
From: Igor Opaniuk
Add defines for supported carrier boards and display adapters.
Signed-off-by: Igor Opaniuk
---
board/toradex/common/tdx-cfg-block.c | 12
board/toradex/common/tdx-cfg-block.h | 11 +++
2 files changed, 23 insertions(+)
diff --git a/board/toradex/common
From: Igor Opaniuk
Add migration routine from PID8 pre-stored values on EEPROM
(including sane value checks).
Signed-off-by: Igor Opaniuk
---
board/toradex/common/tdx-cfg-block.c | 78
board/toradex/common/tdx-cfg-block.h | 2 +
2 files changed, 80 insert
Hi Heinrich,
On 2020-06-06 3:51 p.m., Heinrich Schuchardt wrote:
Hello Scott,
CppCheck gives an error:
[arch/arm/cpu/armv7/iproc-common/armpll.c:137]: (error) Array
'armpll_clk_tab[13]' accessed at index 17, which is out of bounds.
In the loop at the start of armpll_config() i is determined.
On 6/18/20 5:54 AM, Jon Hunter wrote:
> The PSCI nodes are currently not populated for the Tegra210 and Tegra186
> devices. This prevents the PSCI driver from being able to identify the
> PSCI method used by these devices and causes the probe of the PSCI
> driver to fail.
>
> Since commit 81ea0083
On 6/16/20 1:40 AM, Patrick Delaunay wrote:
> Add test for the erase command tested on ENV in EXT4.
Acked-by: Stephen Warren
On 6/16/20 1:40 AM, Patrick Delaunay wrote:
> Add basic test to persistent environment in ext4:
> save and load in host ext4 file 'uboot.env'.
>
> On first execution an empty EXT4 file system is created in
> persistent data dir: env.ext4.img.
> diff --git a/test/py/tests/test_env.py b/test/py/tes
On 6/19/20 6:03 AM, Patrick Delaunay wrote:
> Add a pytest for testing the env info sub-command:
>
> test_env_info: test command with several option that
> can be executed on real hardware device without assumption
>
> test_env_info_sandbox: test the result on sandbox
> with a known ENV configura
On Mon, Jun 22, 2020 at 12:23:35PM -0600, Simon Glass wrote:
> Hi Heinrich,
>
> On Mon, 22 Jun 2020 at 10:40, Heinrich Schuchardt wrote:
> >
> > On 22.06.20 18:17, Simon Glass wrote:
> > > Hi Heinrich,
> > >
> > > On Mon, 22 Jun 2020 at 10:07, Heinrich Schuchardt
> > > wrote:
> > >>
> > >> Call
On 6/18/20 2:51 AM, Michal Simek wrote:
> From: Ashok Reddy Soma
>
> There is no technical reason to add additional 4k space for FDT. This space
> is completely unused and just increase memory requirements. This is
> problematic on systems with limited memory resources as Xilinx Zynq
> CSE/ZynqMP
On 22.06.20 20:23, Simon Glass wrote:
> Hi Heinrich,
>
> On Mon, 22 Jun 2020 at 10:40, Heinrich Schuchardt wrote:
>>
>> On 22.06.20 18:17, Simon Glass wrote:
>>> Hi Heinrich,
>>>
>>> On Mon, 22 Jun 2020 at 10:07, Heinrich Schuchardt
>>> wrote:
Call pytest3 with argument -ra to display
On 6/22/20 10:07 AM, Heinrich Schuchardt wrote:
> Call pytest3 with argument -ra to display reason why Python tests are
> skipped.
Acked-by: Stephen Warren
On Mon, Jun 22, 2020 at 12:23:35PM -0600, Simon Glass wrote:
> Hi Heinrich,
>
> On Mon, 22 Jun 2020 at 10:40, Heinrich Schuchardt wrote:
> >
> > On 22.06.20 18:17, Simon Glass wrote:
> > > Hi Heinrich,
> > >
> > > On Mon, 22 Jun 2020 at 10:07, Heinrich Schuchardt
> > > wrote:
> > >>
> > >> Call
Hi Heinrich,
On Mon, 22 Jun 2020 at 10:40, Heinrich Schuchardt wrote:
>
> On 22.06.20 18:17, Simon Glass wrote:
> > Hi Heinrich,
> >
> > On Mon, 22 Jun 2020 at 10:07, Heinrich Schuchardt
> > wrote:
> >>
> >> Call pytest3 with argument -ra to display reason why Python tests are
> >> skipped.
> >
On 22.06.20 18:17, Simon Glass wrote:
> Hi Heinrich,
>
> On Mon, 22 Jun 2020 at 10:07, Heinrich Schuchardt wrote:
>>
>> Call pytest3 with argument -ra to display reason why Python tests are
>> skipped.
>>
>> Signed-off-by: Heinrich Schuchardt
>> ---
>> .gitlab-ci.yml | 2 +-
>> 1 file changed, 1
Hi Heinrich,
On Mon, 22 Jun 2020 at 10:07, Heinrich Schuchardt wrote:
>
> Call pytest3 with argument -ra to display reason why Python tests are
> skipped.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> .gitlab-ci.yml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/.gitl
We currently have two implementations of UEFI variables:
* variables provided via an OP-TEE module
* variables stored in the U-Boot environment
Read only variables are up to now only implemented in the U-Boot
environment implementation.
Provide a common interface for both implementations that al
Call pytest3 with argument -ra to display reason why Python tests are
skipped.
Signed-off-by: Heinrich Schuchardt
---
.gitlab-ci.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f2e491c117..f53098ea5f 100644
--- a/.gitlab-ci.yml
+++ b/
Hi Neil,
On Mon, 22 Jun 2020 at 18:36, Neil Armstrong wrote:
>
> Hi,
>
> On 21/06/2020 19:23, Anand Moon wrote:
> > Hi Neil,
> >
> > On Thu, 18 Jun 2020 at 20:11, Neil Armstrong
> > wrote:
> >>
> >> From: Pascal Vizeli
> >>
> >> Add a proper Odroid-N2 board support to handle the Ethernet MAC
>
From: Mikhail Kshevetskiy
Here is an example of spinand driver initialization without CONFIG_DM
enabled:
void board_nand_init(void)
{
static struct spinand_devicespinand;
static struct mtd_info mtd;
static struct spi_slave *slave;
int
From: Ivan Morozko
There is no reason to have a separate and highly restricted version of
spi-mem driver for NODM case, it's quite easily fix DM based driver
version and use it for all cases.
Signed-off-by: Ivan Morozko
Reviewed-by: Mikhail Kshevetskiy
---
drivers/spi/Makefile | 3 +-
On 6/22/20 5:30 PM, Nicolas Saenz Julienne wrote:
[...]
> diff --git a/include/usb/xhci.h b/include/usb/xhci.h
> index 1170c0ac69..7d34103fd5 100644
> --- a/include/usb/xhci.h
> +++ b/include/usb/xhci.h
> @@ -16,6 +16,7 @@
> #ifndef HOST_XHCI_H_
> #define HOST_XHCI_H_
>
> +#include
> #includ
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.
Signed-off-by: Nic
Newer revisions of the RPi4 need their xHCI chip, VL805, firmware to be
loaded explicitly. Earlier versions didn't need that as they where using
an EEPROM for that purpose. This series takes care of setting up the
relevant infrastructure and run the firmware loading routine at the
right moment.
No
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
may either be loaded directly from an EEPROM or, if not present, by the
SoC's VideCore (the SoC's co-processor). Introduce the function that
informs VideCore that VL805 may need its firmware loaded.
Signed-off-by: Nicolas Sae
This is required in order to access the reset controller used to
initialize the board's xHCI chip.
Signed-off-by: Nicolas Saenz Julienne
---
configs/rpi_4_32b_defconfig | 1 +
configs/rpi_4_defconfig | 1 +
configs/rpi_arm64_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/con
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne
---
Changes since v3:
- Move reset support to xchi core
drive
Hi Tom,
On 22/6/20 11:20, Tom Rini wrote:
On Mon, Jun 22, 2020 at 11:12:40AM -0300, Walter Lozano wrote:
Hi Tom,
On 19/6/20 18:48, Tom Rini wrote:
On Fri, Jun 19, 2020 at 06:11:36PM -0300, Walter Lozano wrote:
Based on several reports and discussions it is clear that U-Boot's
footprint is a
From: Igor Opaniuk
According to i.MX 7Solo Applications Processor Reference Manual,
2.1.3 Cortex-M4 Memory Map, M4 can address only 1536MB of DDRC
(Start Address: 0x8000_; End Address: 0xDFFF_).
Correct DDRC size to 0x6000.
Fixes: c0f037f6("mach-imx: bootaux: elf firmware support")
S
On 6/19/2020 10:02 PM, Michael Walle wrote:
> Am 2020-06-19 18:54, schrieb Horia Geantă:
>> On 6/19/2020 7:37 PM, Horia Geanta wrote:
>>> On 6/17/2020 11:48 PM, Michael Walle wrote:
Am 2020-06-17 21:15, schrieb Horia Geantă:
> On 6/4/2020 6:48 PM, Michael Walle wrote:
>> +
>> +
On Mon, Jun 22, 2020 at 11:12:40AM -0300, Walter Lozano wrote:
> Hi Tom,
>
> On 19/6/20 18:48, Tom Rini wrote:
> > On Fri, Jun 19, 2020 at 06:11:36PM -0300, Walter Lozano wrote:
> >
> > > Based on several reports and discussions it is clear that U-Boot's
> > > footprint is always a concern, and a
Hi Tom,
On 19/6/20 18:48, Tom Rini wrote:
On Fri, Jun 19, 2020 at 06:11:36PM -0300, Walter Lozano wrote:
Based on several reports and discussions it is clear that U-Boot's
footprint is always a concern, and any kind of reduction is an
improvement.
This series is a proposal to help reducing t
On Mon, Jun 22, 2020 at 10:01:09PM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Mon, Jun 22, 2020 at 9:58 PM Tom Rini wrote:
> >
> > On Mon, Jun 22, 2020 at 09:43:57PM +0800, Bin Meng wrote:
> > > Hi Tom,
> > >
> > > On Mon, Jun 15, 2020 at 12:00 AM Tom Rini wrote:
> > > >
> > > > On Fri, Jun 12, 202
On Mon, Jun 22, 2020 at 3:08 PM Stefan Roese wrote:
>
> On 22.06.20 11:33, Rayagonda Kokatanur wrote:
>
>
>
> >> Sure it takes time to update images. But all this should be possible
> >> with an actively serviced watchdog while still running in U-Boot.
> >> This is why we have all the
Hi Tom,
On Mon, Jun 22, 2020 at 9:58 PM Tom Rini wrote:
>
> On Mon, Jun 22, 2020 at 09:43:57PM +0800, Bin Meng wrote:
> > Hi Tom,
> >
> > On Mon, Jun 15, 2020 at 12:00 AM Tom Rini wrote:
> > >
> > > On Fri, Jun 12, 2020 at 09:17:28PM -0600, Simon Glass wrote:
> > >
> > > > Hi Tom,
> > > >
> > >
On Fri, Jun 5, 2020 at 4:41 AM Jagan Teki wrote:
>
> Enable SPI flash(SF) distro boot command in Sifive FU540.
>
> This distro boot will read the boot script at specific
> location at the flash and start sourcing the same.
>
> Included the SF device at the last of the target devices
> list since a
On Mon, Jun 22, 2020 at 09:43:57PM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Mon, Jun 15, 2020 at 12:00 AM Tom Rini wrote:
> >
> > On Fri, Jun 12, 2020 at 09:17:28PM -0600, Simon Glass wrote:
> >
> > > Hi Tom,
> > >
> > > This is for -next
> > >
> > > But I based it on master to avoid pulling in ot
On Mon, Jun 22, 2020 at 9:55 PM Bin Meng wrote:
>
> On Fri, Jun 5, 2020 at 4:41 AM Jagan Teki wrote:
> >
> > SPI flash device on HiFive Unleashed has 32MiB Size.
> >
> > This patch add SPI flash environment after U-Boot proper
Forgot to mention a nit:
add -> adds
> > partition with a size of 1
On Fri, Jun 5, 2020 at 4:41 AM Jagan Teki wrote:
>
> HiFive-Unleashed-A00 has SPI flash with 32MiB size.
> So, let's use the script offset at the end of 4K.
> This way it cannot overlap any offsets being used
> by software components in flash layout.
>
> So, SF distrocmd will pick the script at de
On Fri, Jun 5, 2020 at 4:41 AM Jagan Teki wrote:
>
> Mark the default U-Boot environment as SPI flash since
> this is an on board flash device.
>
> Reviewed-by: Bin Meng
> Signed-off-by: Jagan Teki
> ---
> Changes for v3:
> - none
>
> board/sifive/fu540/Kconfig | 1 +
> 1 file changed, 1 insert
On Fri, Jun 5, 2020 at 4:41 AM Jagan Teki wrote:
>
> SPI flash device on HiFive Unleashed has 32MiB Size.
>
> This patch add SPI flash environment after U-Boot proper
> partition with a size of 128KiB.
>
> SPI flash partition layout(32MiB):
> 0 - 34 : reserved for GPT header
>35 - 39
On Fri, Jun 5, 2020 at 4:40 AM Jagan Teki wrote:
>
> Add booting from SPI for SiFive Unleashed board.
>
> Signed-off-by: Jagan Teki
> ---
> Changes for v3:
> - updated based on master
>
> arch/riscv/cpu/fu540/Kconfig | 2 +
> .../dts/hifive-unleashed-a00-u-boot.dtsi | 12 +
On Fri, Jun 5, 2020 at 4:40 AM Jagan Teki wrote:
>
> Add support to detect boot mode at runtime for
> SiFive FU540 boards.
>
> Signed-off-by: Jagan Teki
> ---
> Changes for v3:
> - new patch
>
> board/sifive/fu540/fu540.c | 25 +++--
> 1 file changed, 19 insertions(+), 6 dele
Hi Tom,
On Mon, Jun 15, 2020 at 12:00 AM Tom Rini wrote:
>
> On Fri, Jun 12, 2020 at 09:17:28PM -0600, Simon Glass wrote:
>
> > Hi Tom,
> >
> > This is for -next
> >
> > But I based it on master to avoid pulling in other people's commits. I hope
> > that works OK.
> >
> >
> > The following change
From: Frieder Schrempf
When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD
From: Frieder Schrempf
Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.
In fact
From: Frieder Schrempf
For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by access
U-Boot is able to erase bad mtd blocks on raw nand devices, but this
is not true for spinand flashes. Lets enable this feature for spinand
flashes as well. This is extemelly useful for flash testing.
Signed-off-by: Mikhail Kshevetskiy
---
drivers/mtd/nand/core.c | 10 +-
1 file changed,
Move the setting for noc remap out of SPL code. Changing
noc remap inside SPL results in breaking back to BROM
boot.
Fixes commit c14fe2a8e192 ("rockchip: rk3188: Move SoC
one time setting into arch_cpu_init()").
Signed-off-by: Alexander Kochetkov
---
arch/arm/mach-rockchip/rk3188/rk3188.c | 21
Empirically, I found that DPLL on rk3188 has bwadj registers.
Configuring DPLL with bwadj increase DPLL stability. Because
of DPLL provide clock for ethernet, enabling bwaj reduces
the number of errors on the ethernet.
Signed-off-by: Alexander Kochetkov
---
drivers/clk/rockchip/clk_rk3188.c | 8
Hello!
Here are two patches I found usefull for rk3188.
Changes in v2:
Add u-boot@lists.denx.de as addressee.
Alexander Kochetkov (2):
rockchip: clk: rk3188: change APLL to safe 600MHz
rockchip: clk: rk3188: enable bwadj for rk3188 DPLL
drivers/clk/rockchip/clk_rk3188.c | 11 ++-
1
The commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock
driver") changed ARM clock from 600MHz to 1600MHz. It made boot
unstable due to the fact that PMIC at the start generates insufficient
voltage for operation. See also: commit f4f57c58b589 ("rockchip:
rk3188: Setup the armclk in spl"
Hi,
On 21/06/2020 19:23, Anand Moon wrote:
> Hi Neil,
>
> On Thu, 18 Jun 2020 at 20:11, Neil Armstrong wrote:
>>
>> From: Pascal Vizeli
>>
>> Add a proper Odroid-N2 board support to handle the Ethernet MAC
>> address stored in the in-SoC eFuses.
>>
>
> This feature need to be implemented for a
The commit e7ae4cf27a6d 'pinctrl: rockchip: Add common rockchip
pinctrl driver' dropped rk3188_pinctrl_request operation, that
did switching to new implementation.
This commit implement switching to new implementation using
writing bits to GRF.
I don't have rk3060 board to test, so switching impl
On Sat, Apr 25, 2020 at 4:31 AM Heinrich Schuchardt wrote:
>
> On 4/24/20 10:52 PM, Tom Rini wrote:
> > On Fri, Apr 24, 2020 at 05:46:43PM -0300, Mitchell Horne wrote:
> >> On Fri, Apr 24, 2020 at 1:52 PM Tom Rini wrote:
> >>>
> >>> On Mon, Apr 20, 2020 at 06:34:11PM -0400, mho...@freebsd.org wro
On Mon, Jun 22, 2020 at 09:38:36AM +, Ludwig Zenz wrote:
> On 6/13/20 3:55 PM, Jagan Teki wrote:
> > Enable DM_SPI/DM_SPI_FLASH with a related config option.
> >
> > Build fine, but not tested.
>
> Hello,
>
> due to memory limitations in the SRAM of the i.MX6S in SPL we have not used
> the
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Pragnesh Patel
---
include/dt-bindings/clock/sifive-fu540-prci.h | 8
1 fi
The FU540-C000 support in U-Boot is missing DM based reset driver,
and is handling reset's to sub-system within the prci driver itself.
The series here adds a generic DM reset driver for SiFive SoC's so as
to leverage the U-Boot's reset framework and binds the reset driver with
prci driver.
The PR
PRCI module within SiFive SoC's has register with which we can
reset the sub-systems within the SoC. The resets to DDR and ethernet
sub systems within FU540-C000 SoC are active low, and are hold low
by default on power-up. Currently these are directly asserted within
prci driver via register read/w
Indexes of reset signals available in PRCI driver are also
defined in include/dt-bindings/clock/sifive-fu540-prci.h.
So use those instead of defining new ones again within the
fu540-prci driver.
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Pragnesh Patel [A
---
drivers/clk/sifive/fu540-prci.
Add necessary defconfig and Kconfig entries to enable SiFive SoC's
reset driver so as to utilise U-Boot's reset framework.
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Pragnesh Patel
---
configs/sifive_fu540_defconfig | 2 ++
drivers/reset/Kconfig | 9 +
drivers/reset/Makef
The resets to DDR and ethernet sub-system are connected to
PRCI device reset control register, these reset signals
are active low and are held low at power-up. Add these reset
producer and consumer details needed by the reset driver.
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Pragnesh Patel
On Sat, Jun 20, 2020 at 07:18:22PM +0200, Marek Vasut wrote:
> Below is another networking PR for u-boot/next (!). It's more DM
> conversion of the PCI networking drivers.
>
> Any news on Joe ?
Nothing as of yet.
> The following changes since commit 7a81989b7b04bd87d1e684f2bafdc92a9c16fecc:
>
On Sat, Jun 20, 2020 at 12:00:02AM +0530, Jagan Teki wrote:
> Hi Tom,
>
> PR is for -next (v2020.10) as part of spi dm-conversion changes.
>
> Summary:
> - Convert fsl_espi to driver model (Chuanhua)
> - Enable am335x baltos to DM_SPI (Jagan)
> - Drop few powerpc board which doesn't have DM enab
On Sat, Jun 20, 2020 at 07:16:23PM +0200, Marek Vasut wrote:
> The following changes since commit 9cb895203a46654f7ee6dd95be5c8ab05e4dfbd3:
>
> Merge tag 'u-boot-stm32-20200616' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2020-06-16 09:18:56
> -0400)
>
> are available in the Git
Hi Alex,
Am 17.06.2020 um 22:09 schrieb Alex Nemirovsky:
Hi Heiko,
Sorry for the late reply!
seems that this patch set may have slipped through the cracks.
Is there anything keeping it from being merged into master?
No, but we are so late in release cycle, so I planned it for the next
merg
Hi,
On 20. 06. 20 20:06, Florian Klink wrote:
> Hey,
>
> I tried building latest master 2b8692bac1e8795cbb87b0d00213fd193409851d,
> for a zynq device, and did according to the documentation:
>
> $ export DEVICE_TREE=zynq-zc702
> $ make xilinx_zynq_virt_defconfig
> $ make
>
> Reading f7c6ee7fe7
From: Haibo Chen
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is
TUNING_START_TAP, bit[7] of this register is to disable the command
CRC check for standard tuning. So fix it here.
Fixes: fa33d207494c ("mmc: split fsl_esdhc driver for i.MX")
Signed-off-by: Haibo Chen
---
include
From: Haibo Chen
In current code, we add 1ms dealy after each tuning command for standard
tuning method. Adding this 1ms dealy is because USDHC default check the
CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning
IC logic do not wait for the tuning data sending out by the card, t
On 22.06.20 11:16, Ilias Apalodimas wrote:
> Hi Heincrich,
>
> Thanks for merging those.
>
>
> Thanks
> /Ilias
>
>
> On Sat, Jun 20, 2020 at 12:56:15PM +0200, Heinrich Schuchardt wrote:
>> We currently have two implementations of UEFI variables:
>>
>> * variables provided via an OP-TEE module
>> *
Hello,
booti now supports booting from compressed Image.
See 414c34ed555b8ce5c260cf641261ecf45beca251.
Would you please add kernel_comp_addr_r and kernel_comp_size to
rk3399_common.h, so that people can use compressed Image (e.g. Image.gz)
in extlinux.conf.
Thanks,
Yuanhao
1 - 100 of 115 matches
Mail list logo
