Hi Tom,
Who is suppose to pick up this series patches? Any thing I need to
update?
Thanks,
- Kever
On 2020/3/31 上午7:30, Tom Rini wrote:
On Mon, Mar 30, 2020 at 11:56:24AM +0800, Kever Yang wrote:
The image is usually stored in block device like emmc, SD card, make the
offset of image
On 4/23/20 10:05 AM, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Apr 6, 2020 at 7:22 AM Simon Glass wrote:
>>
>> This series creates a new 64-bit 'coreboot64' build which can be launched
>> from coreboot. It uses SPL to effect the jump to 64-bit mode.
>
> Adding 64-bit U-Boot as a coreboot payload is
On 23/04/20 6:12 PM, Andrew F. Davis wrote:
> On 4/23/20 2:38 AM, Lokesh Vutla wrote:
>>
>>
>> On 22/04/20 10:39 PM, Andrew F. Davis wrote:
>>> When authenticating the initial boot binary the ROM will check a debug
>>> type value in the certificate and based on that open JTAG access to that
>>>
Heinrich,
On Thu, Apr 23, 2020 at 09:34:37AM +0200, Heinrich Schuchardt wrote:
> On 23.04.20 02:28, AKASHI Takahiro wrote:
> > Heinrich,
> >
> > On Tue, Apr 21, 2020 at 12:23:13PM +0200, Heinrich Schuchardt wrote:
> >> On 4/21/20 2:37 AM, AKASHI Takahiro wrote:
> >>> By adding extra symbols, we ca
Heinrich,
On Thu, Apr 23, 2020 at 09:33:37AM +0200, Heinrich Schuchardt wrote:
> On 23.04.20 02:31, AKASHI Takahiro wrote:
> > Heinrich,
> >
> > On Tue, Apr 21, 2020 at 12:26:08PM +0200, Heinrich Schuchardt wrote:
> >> On 4/21/20 2:38 AM, AKASHI Takahiro wrote:
> >>> Pkcs7_parse.h and x509_parser.
On Thu, Apr 23, 2020 at 5:24 AM Chen-Yu Tsai wrote:
>
> Hi,
>
> On Tue, Apr 21, 2020 at 1:35 AM Peter Geis wrote:
> >
> > On Thu, Apr 16, 2020 at 5:53 AM Loic Devulder wrote:
> > >
> > > Hi Chen,
> > >
> > > I tested your patches and all work pretty well. I just had issues with
> > > USB2 that d
On Thu, Apr 23, 2020 at 07:49:36AM +, Patrick DELAUNAY wrote:
> Hi,
>
> > From: Lokesh Vutla
> > Sent: mercredi 22 avril 2020 19:26
> >
> > commit 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree")
> > converted
> > pinctrl driver to livetree. In this conversion, the call to
On Thu, Apr 23, 2020 at 04:25:55PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Adds few DT related fixes required for Linux EFI stub to work on RISC-V.
> - Makes SBI v0.2 the default SBI version to work with OpenSBI v0.7.
> - Revert "riscv: qemu: clear k
Dear Daniel,
In message you wrote:
>
> But I'm not sure if the original intention was to use the default linker
> script or the one provided by U-Boot and if examples/api/ should use the
> same compiler and linker flags as example/standalone/. Some archs have
> used a custom linker script. Maybe
Dear Patrick,
In message <8970fb86c1374d1999ff656c2a327...@sfhdag6node3.st.com> you wrote:
>
> > > - ret = uclass_get_device(UCLASS_CLK, 0, &dev);
> > > - if (ret) {
> > > - debug("Clock init failed: %d\n", ret);
> > > - return;
> > > - }
> > > + clk = uclass_get_device(UCLASS_CLK
As we've dropped NAND support for AXS101 and AXS103
see commit 4f5e552d95bb ("ARC: AXS10x: drop NAND support")
we don't need bounce buffer anymore.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index e
On 23/04/2020 12:38, Jagan Teki wrote:
> On Tue, Apr 21, 2020 at 7:54 PM Jack Mitchell wrote:
>>
>> Has anyone worked with an rk3399 based board with a single channel RAM
>> setup? I've looked at the current code and made some changes for only
>> setting up a single channel which basically consist
Am 21.04.20 um 09:28 schrieb Stefan Roese:
> With the if statement now for the legacy image handling, the compiler
> now generates this compile time warning:
>
> common/spl/spl_nor.c:27:6: warning: unused variable 'ret' [-Wunused-variable]
>
> This patch removes this warning by changing the 'r
Am 21.04.20 um 09:28 schrieb Stefan Roese:
> Move the legacy image loading into spl_legacy.c. This makes it easier
> to extend the legacy image handling with new features that other
> SPL loaders might use (e.g. spl_spi.c etc).
>
> No functional change intended.
>
> Signed-off-by: Stefan Roese
Am 21.04.20 um 09:28 schrieb Stefan Roese:
> Use IS_ENABLED() instead of #ifdef CONFIG_ to remove one #ifdef.
>
> No functional change intended.
>
> Signed-off-by: Stefan Roese
> Cc: Daniel Schwierzeck
> Cc: Weijie Gao
> Cc: Simon Goldschmidt
> ---
> Changes in v7:
> - None
>
> Changes in
Am 21.04.20 um 09:28 schrieb Stefan Roese:
> This patch moves the legacy image handling into a separate file, which
> will be extended with other legacy image features later.
>
> No function change intended.
>
> Signed-off-by: Stefan Roese
> Cc: Daniel Schwierzeck
> Cc: Weijie Gao
> Cc: Sim
Am 21.04.20 um 09:28 schrieb Stefan Roese:
> This patch adds a MIPS specific jump_to_image_no_args() implementation,
> which flushes the U-Boot proper image loaded from the boot device in
> SPL before jumping to it.
>
> It has been noticed on MT76x8, that this cache flush is needed. Other
> MIP
Am 04.04.20 um 16:01 schrieb Álvaro Fernández Rojas:
> Currently, if usb is disabled the following error is produced:
> CC drivers/usb/host/ohci-hcd.o
> drivers/usb/host/ohci-hcd.c: In function ‘usb_lowlevel_init’:
> drivers/usb/host/ohci-hcd.c:2057:35: error: ‘CONFIG_SYS_USB_OHCI_REGS_BA
Am 02.04.20 um 10:37 schrieb Álvaro Fernández Rojas:
> Linux Broadcom NAND driver only disabled clock if no childs are initialized.
> This section of the code seems to have been accidentally dropped when it was
> imported in U-Boot.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> drivers/mt
Am 22.04.20 um 12:46 schrieb Arnaud Ferraris:
> In order to save the bootcounter on raw flash device, this commit
> introduces a new bootcount driver, enabled using the
> CONFIG_BOOTCOUNT_FLASH option.
>
> The bootcounter is stored at address CONFIG_SYS_BOOTCOUNT_FLASH_ADDR
> (absolute address,
+cc Wolfgang, Tom
Am 21.04.20 um 00:34 schrieb mho...@freebsd.org:
> From: Mitchell Horne
>
> On MIPS, __start marks the entry point to the CONFIG_API demo program.
> Change the name to _start, to be consistent with all other
> architectures.
>
> Signed-off-by: Mitchell Horne
> ---
> examples
On Thursday 23 April 2020 08:24:05 Tom Rini wrote:
> On Thu, Apr 23, 2020 at 09:34:26AM +0200, Pali Rohár wrote:
> > On Tuesday 21 April 2020 19:24:57 Tom Rini wrote:
> > > On Tue, Apr 21, 2020 at 11:34:02PM +0200, Pali Rohár wrote:
> > > > Ok, so is something needed to do with this patch?
> > >
>
Hi Sagar and Bin,
On Tue, Apr 21, 2020 at 9:17 PM Sagar Kadam wrote:
>
> Hi Bin, Jagan,
>
> Thanks Jagan for posting the patches to enable QUAD SPI-NOR on HiFive
> Unleashed
> along with other sequels.
>
> > -Original Message-
> > From: Bin Meng
> > Sent: Tuesday, April 21, 2020 4:44 AM
HiFive Unleashed A00 support is25wp256 spi-nor flash,
So enable the same and add test result log for future
reference.
Tested on SiFive FU540 board.
Signed-off-by: Jagan Teki
Reviewed-by: Bin Meng
---
Changes for v4:
- none
arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 1 +
board/sifive/f
The guessed reason is that the existing logic of filling
tx fifo with data, rx fifo with NULL for tx transfer and
filling rx fifo with data, tx fifo with NULL for rx transfer
is not clear enough to support the Quad Page Program.
SiFive SPI controllers have specific sets of watermark
registers a
SiFive SPI controller has a proto bit field in frame format
register which would be used to configure the SPI I/O protocol
lines used on specific transfer.
Right now the driver is configuring this proto using slave->mode,
for all types of transctions. This makes the driver unable to
function sinc
Add U-Boot specific dts file for hifive-unleashed-a00, this
would help to add u-boot specific properties and other node
changes without touching the base dts(i) files which are easy
to sync from Linux.
Added spi2 alias for qspi2 as an initial u-boot specific
property change.
spi probing in curren
SiFive SPI controller is responsible to handle the
slave devices like mmc spi and spi nor flash.
The controller is designed such a way that it would
handle the slave transactions based on the I/O protocol
numbers, example if spi nor slave send quad write opcode
it has to send alone with I/O protoc
This is series v4 for SPI-NOR support on SiFive FU540
platform with HiFive Unleashed board.
Here is the previous version changes[1].
All patches on top of u-boot-spi/master.
Changes for v4:
- add spi-mem exec_op
- rebase on master
Changes for v3:
- fixed QPP support
- dropped sf commands log
[
> -Original Message-
> From: Sascha Hauer
> Sent: Thursday, April 23, 2020 1:22 PM
> To: linux-arm-ker...@lists.infradead.org
> Cc: Madalin Bucur ; Shawn Guo
> ; Leo Li ; Sascha Hauer
>
> Subject: [PATCH] arm64: dts: ls1046ardb: Set aqr106 phy mode to usxgmii
>
> The AQR107 family of phy
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC
This driver is simple port of Linux pwm sifive driver from Linux v5.6
commit: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM")
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 6 ++
drivers/pwm/Makefil
DT documentation for PWM controller added from Linux v5.6
commit: daa78cc3408e
("pwm: sifive: Add DT documentation for SiFive PWM Controller")
Signed-off-by: Yash Shah
---
doc/device-tree-bindings/pwm/pwm-sifive.txt | 31 +
1 file changed, 31 insertions(+)
create mo
The patch series adds support for PWM controller in SiFive SoCs
Changes in v2:
- Introduce a new patch to add the DT documentation
- Change commit message to include reference of Linux ver and commit
- Remove unnecessary function "pwm_sifive_set_invert"
- Use "dev_read_addr_ptr" instead of "dev_re
If dcache is switched OFF to ON state and if non-cached memory is
used, this non-cached memory must be re-declared as uncached to mmu
each time dcache is set ON.
Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver,
when going from dcache OFF to dcache ON state, ethernet driver issue
Hi, Priyanka,
> -Original Message-
> From: Priyanka Jain
> Sent: Thursday, April 23, 2020 6:32 PM
> To: Alison Wang ; u-boot@lists.denx.de; Jagdish
> Gediya
> Cc: Shengzhou Liu
> Subject: RE: [PATCH] configs: ls1021a: Append CMA configuration to bootargs
>
> >-Original Message-
The default reserved memory for CMA is high memory. If LPAE is enabled,
highmem pages are non-remapped and can not be used with
dma_alloc_coherent. Reserving low memory for CMA is needed for LS1021A.
This patch appends the related CMA configuration to bootargs.
Signed-off-by: Shengzhou Liu
Signed
On Tue, Apr 21, 2020 at 7:29 AM wrote:
>
> From: Mitchell Horne
>
> API clients can make a syscall requesting the enumeration of network and
> storage devices. However, this does not check for virtio-blk storage
> devices, which API consumers may wish to use. Add the support to
> enumerate these
On Tue, Apr 21, 2020 at 6:35 AM wrote:
>
> From: Mitchell Horne
>
> Add the necessary changes to allow building the CONFIG_API option on the
> RISC-V architecture. The downstream consumer of this API is the u-boot
> version of FreeBSD's loader(8). This enables the loader to be ported to
Could yo
On Tue, Apr 21, 2020 at 7:28 AM wrote:
>
> From: Mitchell Horne
>
> search_hint is defined in assembly as a .long, and is intended to hold
> the initial stack pointer as a hint to the api_search_sig() routine.
> Convert this to a uintptr_t, to avoid possible truncation on 64-bit
> systems.
>
> Si
On Tue, Apr 21, 2020 at 7:28 AM wrote:
>
> From: Mitchell Horne
>
> When compiling the API demo program, the first object file in the linker
> arguments is crt0.o, which contains the _start routine. This is done
> with the hope that it will appear first in the .text section, but the
> linker does
On Tue, Apr 21, 2020 at 7:28 AM wrote:
>
> From: Mitchell Horne
>
> Some printf statements in the API demo assume pointers to be 32-bits
> long, presumably since it was originally developed for 32-bit arm. This
> generates a number of warnings when compiling for 64-bit architectures,
> and may re
On Tue, Apr 21, 2020 at 7:27 AM wrote:
>
> From: Mitchell Horne
>
> The CONFIG_API option builds the example program, examples/api/demo, as
> an ELF file. The make logic exists to create a binary as well, so add
> the target to do so.
>
> Signed-off-by: Mitchell Horne
> ---
> examples/api/Makef
On Tue, Apr 21, 2020 at 7:28 AM wrote:
>
> From: Mitchell Horne
>
> On MIPS, __start marks the entry point to the CONFIG_API demo program.
> Change the name to _start, to be consistent with all other
> architectures.
>
> Signed-off-by: Mitchell Horne
> ---
> examples/api/crt0.S | 8
>
On 2020-04-22 23:04, Stefan Roese wrote:
On 22.04.20 20:34, Tom Rini wrote:
On Wed, Apr 22, 2020 at 04:48:33PM +0200, Stefan Roese wrote:
Hi Tom,
please pull the 2nd batch of MVEBU related patches in this merge
window. The major changes are:
Applied to u-boot/master, thanks!
But the follo
Hi Simon,
On Thu, Apr 23, 2020 at 7:03 PM Bin Meng wrote:
>
> Hi Simon,
>
> On Thu, Apr 9, 2020 at 2:58 AM Simon Glass wrote:
> >
> > When U-Boot is run from another boot loader, much of the low-level init
> > needs to be skipped.
> >
> > Add a flag for this and adjust ll_boot_init() to use it.
Probe the FMan MACs based on the device tree while
retaining the legacy code/functionality.
One notable change introduced here is that, for DM_ETH,
the name of the interfaces is corrected to the fmX-macY
format, that avoids the referral to the MAC block names
which were incorrect for FMan v3 device
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur
---
arch/arm/dts/fsl-ls1046a-rdb.dts | 67
arc
Enable DM_ETH on all the defconfigs for the LS1043ARDB board.
Signed-off-by: Madalin Bucur
---
configs/ls1043ardb_SECURE_BOOT_defconfig| 3 +++
configs/ls1043ardb_defconfig| 3 +++
configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 3 +++
configs/ls1043ardb_nand_defcon
The NAND related code needs to be guarded with #ifdef CONFIG_NAND_BOOT
to avoid a compilation error when this configuration is not enabled.
Signed-off-by: Madalin Bucur
---
drivers/net/fm/fm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index b
Enable DM_ETH on all the defconfigs for the LS1046ARDB board.
Signed-off-by: Madalin Bucur
---
configs/ls1046ardb_emmc_defconfig | 3 +++
configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 3 +++
configs/ls1046ardb_qspi_defconfig | 3 +++
configs/ls1046ardb_qspi_spl_de
Allow the MDIO devices to be probed based on the device tree.
Signed-off-by: Madalin Bucur
---
drivers/net/fm/memac_phy.c | 139 -
1 file changed, 137 insertions(+), 2 deletions(-)
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
i
Add the QorIQ DPAA Frame Manager v3 device tree nodes description.
The device tree fragments are copied over with little modification
from the Linux kernel source code.
Signed-off-by: Madalin Bucur
---
arch/arm/dts/qoriq-fman3-0-10g-0.dtsi | 44 +++
arch/arm/dts/qoriq-fman3-0-10g
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1043A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur
---
arch/arm/dts/fsl-ls1043-post.dtsi | 48 +++
1 fi
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1046A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur
---
arch/arm/dts/fsl-ls1046-post.dtsi | 49 +++
1 fi
Change the init_phy() parameter to simplify the code.
Signed-off-by: Madalin Bucur
---
drivers/net/fm/eth.c | 19 ---
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 88019c9..57db2e9 100644
--- a/drivers/net/fm/eth.
Move the receive buffer free code in a separate function.
Signed-off-by: Madalin Bucur
---
drivers/net/fm/eth.c | 63 ++--
1 file changed, 37 insertions(+), 26 deletions(-)
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 57db2e9..7d
This patch set enables DM_ETH on the DPAA1 ARM platforms.
The required changes are added to the LS104x device trees and
LS104xARDB device trees. Changes to the fm driver introduce
DM ETH and DM MDIO support while still preserving the legacy
functionality. A compilation error related to CONFIG_NAND_
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1043ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur
---
arch/arm/dts/fsl-ls1043a-rdb.dts | 81
arc
On 4/23/20 2:38 AM, Lokesh Vutla wrote:
>
>
> On 22/04/20 10:39 PM, Andrew F. Davis wrote:
>> When authenticating the initial boot binary the ROM will check a debug
>> type value in the certificate and based on that open JTAG access to that
>> core.
>>
>> The default is currently full access, on
On Thu, Apr 23, 2020 at 09:34:26AM +0200, Pali Rohár wrote:
> On Tuesday 21 April 2020 19:24:57 Tom Rini wrote:
> > On Tue, Apr 21, 2020 at 11:34:02PM +0200, Pali Rohár wrote:
> > > Ok, so is something needed to do with this patch?
> >
> > Yes, re-order where the .travis.yml hunk is and add a simi
On Wed, Apr 22, 2020 at 10:03:41PM -0400, Sean Anderson wrote:
> On 4/22/20 9:51 PM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> >>> m
On Tue, Apr 21, 2020 at 7:54 PM Jack Mitchell wrote:
>
> Has anyone worked with an rk3399 based board with a single channel RAM
> setup? I've looked at the current code and made some changes for only
> setting up a single channel which basically consists of altering the
> loops down to one channel
On Thu, Apr 23, 2020 at 4:37 PM Deepak Das wrote:
>
> Hi Jagan,
>
> upstream uboot has the support for nanopi M4 board with 4GB LPDDR3 RAM.
> I have a nanopi M4 board with 2GB DDR3 RAM and able to boot this board
> by using ddr3 configuration.
>
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + *
On 23.04.20 13:18, Harald Seiler wrote:
> Hello,
>
> On Wed, 2020-03-04 at 15:23 +0100, Harald Seiler wrote:
>> Hello,
>>
>> continuing on the discussion around Claudius' patch for fixing reset in SPL
>> [1]
>> we have taken a closer look at the issue. To quickly summarize the
>> situation:
>>
Hello,
On Wed, 2020-03-04 at 15:23 +0100, Harald Seiler wrote:
> Hello,
>
> continuing on the discussion around Claudius' patch for fixing reset in SPL
> [1]
> we have taken a closer look at the issue. To quickly summarize the situation:
>
> The original patch was to enable the generic ARM
CONFIG_SPL_FAT_SUPPORT was removed in commit 0c3a9ed409a5
("spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT").
Fixup a leftover use of the symbol.
Fixes: 9d86dbd9cf9d ("imx: spl: implement spl_boot_mode for i.MX7/8/8M")
Signed-off-by: Harald Seiler
---
arch/arm/mach-imx/spl.c
The spl_mmc_boot_mode() (formerly spl_boot_mode()) implementation for
IMX has grown quite big over time [1]. It has also started to steer
away from what it is meant to do in its current form and breaks some
use-cases of the SPL. Namely, the issue is that nowadays SPL can
attempt loading U-Boot fr
From: Anatolij Gustschin
Boards may extend or re-define the boot list in their board_boot_order()
function by modifying spl_boot_list. E.g. a board might boot SPL from a
slow SPI NOR flash and then load the U-Boot from an eMMC or SD-card.
Or it might use additional MMC boot device in spl_boot_lis
CONFIG_SPL_FORCE_MMC_BOOT was removed in a previous patch as its
behavior is the correct one in all cases. Remove all uses of it from
defconfigs.
This reverts commit 3201e5b444ae3a13aa31e8b5101ad38d7ff0640d and removes
CONFIG_SPL_FORCE_MMC_BOOT from the imx28_xea defconfig.
Signed-off-by: Harald
It is hard to read code which contains nested ifdef blocks. Replace
them with normal if-blocks and the IS_ENABLED() macro. This is not only
more readable but also helps as both arms are validated by the compiler
in all cases.
Signed-off-by: Harald Seiler
---
arch/arm/mach-imx/spl.c | 38 ++
The CONFIG_SPL_FORCE_MMC_BOOT config flag is not needed as its behavior
is the correct one in all cases; using spl_boot_device() instead of the
boot_device parameter will lead to inconsistency issues, for example,
when a board_boot_order() is defined. In fact, this is the reason the
parameter was
Hi Jagan,
upstream uboot has the support for nanopi M4 board with 4GB LPDDR3 RAM.
I have a nanopi M4 board with 2GB DDR3 RAM and able to boot this board
by using ddr3 configuration.
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Jagan Teki
+ */
+
+#include "rk3399-nanopi4-u-boo
Hi Simon,
On Thu, Apr 9, 2020 at 2:58 AM Simon Glass wrote:
>
> This little series adds a few checks into the code to allow better
> operation when booting a build from a previous-state loader such as
> coreboot.
>
> At present we have a 'coreboot' target but this runs very different code
> from
Hi Simon,
On Thu, Apr 9, 2020 at 2:58 AM Simon Glass wrote:
>
> If U-Boot is running from coreboot we need to skip low-level init. Add
> an way to detect this and to set the gd flag.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Add new patch to detect running from coreboot
>
> Cha
Hi Simon,
On Thu, Apr 9, 2020 at 2:58 AM Simon Glass wrote:
>
> When U-Boot is run from another boot loader, much of the low-level init
> needs to be skipped.
>
> Add a flag for this and adjust ll_boot_init() to use it.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Add a new patch
On Wed, Apr 22, 2020 at 5:52 AM Atish Patra wrote:
>
> SMP support for S-mode U-Boot is enabled only if SBI_V01 is enabled.
> There is no point in supporting SMP related (IPI and fences) SBI calls
> when SBI_V02 is enabled.
>
> Modify all the SMP related SBI calls to be defined only for SBI_V01.
>
>-Original Message-
>From: Alison Wang
>Sent: Thursday, April 23, 2020 6:12 AM
>To: u-boot@lists.denx.de; Priyanka Jain ; Jagdish
>Gediya
>Cc: Shengzhou Liu
>Subject: [PATCH] configs: ls1021a: Append CMA configuration to bootargs
>
>According to commit , this patch appends CMA configurat
>-Original Message-
>From: Biwen Li
>Sent: Wednesday, April 22, 2020 3:37 PM
>To: Jagdish Gediya ; Priyanka Jain
>; Pramod Kumar
>Cc: Alison Wang ; u-boot@lists.denx.de; Jiafei Pan
>; Biwen Li
>Subject: [v3] include/configs: ls1012afrwy: support dhcp boot
>
>From: Biwen Li
>
>Add suppor
Hi Simon,
On Thu, Apr 23, 2020 at 5:46 PM Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Apr 22, 2020 at 5:37 AM Simon Glass wrote:
> >
> > Hi Andy,
> >
> > On Tue, 21 Apr 2020 at 11:43, Andy Shevchenko
> > wrote:
> > >
> > > On Sun, Apr 19, 2020 at 02:36:48PM -0600, Simon Glass wrote:
> > > > This
Hi Simon,
On Wed, Apr 22, 2020 at 5:37 AM Simon Glass wrote:
>
> Hi Andy,
>
> On Tue, 21 Apr 2020 at 11:43, Andy Shevchenko
> wrote:
> >
> > On Sun, Apr 19, 2020 at 02:36:48PM -0600, Simon Glass wrote:
> > > This is split from the original series in an attempt to get things applied
> > > in chun
Hi Simon, Wolfgang,
On Mon, Apr 20, 2020 at 4:37 AM Simon Glass wrote:
>
> We always write three basic tables to ACPI at the start. Move this into
> its own function, along with acpi_fill_header(), so we can write a test
> for this code.
>
> Signed-off-by: Simon Glass
I see Wolfgang gave a RB t
On Thu, Apr 23, 2020 at 5:19 PM Bin Meng wrote:
>
> On Mon, Apr 6, 2020 at 7:22 AM Simon Glass wrote:
> >
> > The intention here is add a forward declaration, not actually declare a
> > variable. Fix it.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > include/cbfs.h | 2 +-
> > 1 file change
Hi Simon,
On Mon, Apr 6, 2020 at 7:22 AM Simon Glass wrote:
>
> Add a build for running 64-bit U-Boot from coreboot (which is 32-bit).
> This uses binman to create an image with a 32-bit SPL and a 64-bit U-Boot.
>
> Coreboot boots into SPL and then SPL boots into U-Boot.
>
> This allows running 6
Hi,
On Tue, Apr 21, 2020 at 1:35 AM Peter Geis wrote:
>
> On Thu, Apr 16, 2020 at 5:53 AM Loic Devulder wrote:
> >
> > Hi Chen,
> >
> > I tested your patches and all work pretty well. I just had issues with
> > USB2 that doesn't recognize any of my USB keys (it's OK on USB3).
> >
> > I also had
On Mon, Apr 6, 2020 at 7:22 AM Simon Glass wrote:
>
> The intention here is add a forward declaration, not actually declare a
> variable. Fix it.
>
> Signed-off-by: Simon Glass
> ---
>
> include/cbfs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Bin Meng
Hi Simon,
On Mon, Apr 6, 2020 at 7:22 AM Simon Glass wrote:
>
> At present this function copies U-Boot from the last 1MB of ROM. This is
> not the right way to do it. Instead, the binman symbol should provide the
> location.
>
> But in any case the code should live in the caller,
> spl_board_load
Hi Simon,
On Mon, Apr 6, 2020 at 7:22 AM Simon Glass wrote:
>
> Coreboot runs in 32-bit mode and cannot run a 64-bit U-Boot. To get around
> this we can build a combined image with 32-bit SPL and 64-bit U-Boot. Add
> a build rule and binman definition for this.
>
> Signed-off-by: Simon Glass
> -
On 17.04.20 17:42, Joel Johnson wrote:
> Two nearly concurrent commits (d4d65e112 and bcee8d676) added a
> SPL_DM_GPIO symbol. Resolve the duplication in favor of the version
> in drivers/gpio/Kconfig.
>
> Signed-off-by: Joel Johnson
Reviewed-by: Frieder Schrempf
>
> ---
>
> common/spl/Kco
Hi Michal,
I've had to take a break because, as it turned out, my ZCU102 was
defective. Now that I have a working one, I can go on with my
frustrating quest for a bootable image.
So now that the patches to u-boot for the ZCU102 Rev. 1.1 are in git
master, I started again from scratch, build
Hi Sean
>
> Hi Sean
>
> > On 4/22/20 9:51 PM, Rick Chen wrote:
> > > Hi Sean
> > >
> > >> Hi Sean
> > >>
> > >>> This patch series adds support for Sipeed Maix boards and the Kendryte
> > >>> K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
> > >>> models are similar.
> > >>
Hi Tom,
Please pull some riscv updates:
- Adds few DT related fixes required for Linux EFI stub to work on RISC-V.
- Makes SBI v0.2 the default SBI version to work with OpenSBI v0.7.
- Revert "riscv: qemu: clear kernel-start/-end in device tree as workaround for
BBL"
- Remove unnecessary CONFIG_
Hi Simon,
On Mon, Apr 6, 2020 at 7:22 AM Simon Glass wrote:
>
> This series creates a new 64-bit 'coreboot64' build which can be launched
> from coreboot. It uses SPL to effect the jump to 64-bit mode.
Adding 64-bit U-Boot as a coreboot payload is nice.
>
> This was done in an attempt to get th
Hi,
> From: Lokesh Vutla
> Sent: mercredi 22 avril 2020 19:26
>
> commit 719cab6d2e2bf ("dm: pinctrl: convert pinctrl-single to livetree")
> converted
> pinctrl driver to livetree. In this conversion, the call to read
> pinctrl-single,pins/bits
> property is provided with pinctrl device pointe
On 23.04.20 02:15, AKASHI Takahiro wrote:
> Heinrich,
>
> On Wed, Apr 22, 2020 at 05:52:55PM +0200, Heinrich Schuchardt wrote:
>> If udisksctl is present
>> test/py/tests/test_efi_secboot/conftest.py
>> fails because the disk image is never mounted.
>>
>> Normal users can only mount fuse file syste
Dear Marek,
> From: Marek Vasut
> Sent: mercredi 22 avril 2020 17:19
>
> On 4/22/20 5:04 PM, Patrick DELAUNAY wrote:
> > Hi Marek,
>
> Hi,
>
> >> From: Marek Vasut
> >> Sent: mercredi 22 avril 2020 13:18
> >>
> >> The AV96 board does exist in multiple variants. To cater for all of
> >> them,
Copy the .its source file selected by CONFIG_SPL_FIT_SOURCE
in builddir and in a file named "u-boot.its".
This patch avoid compilation issue when CONFIG_SPL_FIT_SOURCE is used
and KBUILD_OUTPUT is defined, in buildman for example.
Signed-off-by: Patrick Delaunay
---
Hi,
Problem detected with pa
Hi Simon,
On Tue, Mar 24, 2020 at 9:45 PM Simon Glass wrote:
>
> At present we query the memory map on boards which don't support it. Fix
> this by only doing it on Apollo Lake.
>
> This fixes booting on chromebook_link.
>
> Signed-off-by: Simon Glass
> Fixes: 92842147c31 ("spi: ich: Add support
On 23.04.20 02:28, AKASHI Takahiro wrote:
> Heinrich,
>
> On Tue, Apr 21, 2020 at 12:23:13PM +0200, Heinrich Schuchardt wrote:
>> On 4/21/20 2:37 AM, AKASHI Takahiro wrote:
>>> By adding extra symbols, we can now avoid including x509_parser and
>>> pkcs7_parser.h files multiple times.
>>>
>>> Signe
On Tuesday 21 April 2020 19:24:57 Tom Rini wrote:
> On Tue, Apr 21, 2020 at 11:34:02PM +0200, Pali Rohár wrote:
> > Ok, so is something needed to do with this patch?
>
> Yes, re-order where the .travis.yml hunk is and add a similar part to
> .gitlab-ci.yml and .azure-ci.yml.
Hello Tom! I have loo
On 23.04.20 02:31, AKASHI Takahiro wrote:
> Heinrich,
>
> On Tue, Apr 21, 2020 at 12:26:08PM +0200, Heinrich Schuchardt wrote:
>> On 4/21/20 2:38 AM, AKASHI Takahiro wrote:
>>> Pkcs7_parse.h and x509_parser.h are used in UEFI subsystem, in particular,
>>> secure boot. So move them to include/crypto
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