Hi Tom,
this is the second pull request because I found a lot of stuff missing
in mainline.
I have also included one minor dtbo clean up because I have started to
use it to support different modules. And also very important fix for
manual relocation for repeatable commands which was broken for qui
On Fri, Oct 25, 2019 at 08:37:11AM +0200, Heinrich Schuchardt wrote:
> On 10/25/19 6:34 AM, AKASHI Takahiro wrote:
> >On Thu, Oct 24, 2019 at 08:49:00PM +, Heinrich Schuchardt wrote:
> >>Copy the block size from the block IO protocol to the U-Boot block device
> >>descriptor. This information i
On 10/25/19 6:34 AM, AKASHI Takahiro wrote:
On Thu, Oct 24, 2019 at 08:49:00PM +, Heinrich Schuchardt wrote:
Copy the block size from the block IO protocol to the U-Boot block device
descriptor. This information is used by the ext4 file system driver.
Signed-off-by: Heinrich Schuchardt
---
From: Rick Chen
For RV64, it will use sd instruction to clear t0
register, and the increament will be 8 bytes. So
if the difference between__bss_strat and __bss_end
was not 8 bytes aligned, the clear bss loop will
overflow and acks like system hang.
Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan
From: Rick Chen
Add CPU2 and CPU3 informations in cpus node
to support four cores SMP booting.
Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao
---
arch/riscv/dts/ae350_32.dts | 51 ++---
arch/riscv/dts/ae350_64.dts | 51 +++
From: Rick Chen
The mcache_ctl csr only can be manipulated in M mode.
Add SPL_RISCV_MMODE for U-Boot SPL to control cache
operation.
Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao
---
arch/riscv/cpu/ax25/cache.c | 60 ++---
1 file changed, 46 inserti
From: Rick Chen
When ax25-ae350 try to enable v5l2 cache
driver in SPL configuration, it need this
option for cache support in SPL.
Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao
---
common/spl/Kconfig | 7 +++
drivers/Makefile | 1 +
2 files changed, 8 insertions(+)
diff --git a/co
From: Rick Chen
To get memory size from device tree instead of
get_ram_size(). This can avoid memory access fault
in U-Boot proper after PMP configurations in OpenSbi.
Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao
---
board/AndesTech/ax25-ae350/ax25-ae350.c | 21 ++---
1 f
From: Rick Chen
It will work fine due to hart 0 always will be main
hart coincidentally. When develop SPL flow, I try to
force other harts to be main hart. And it will go
wrong in sending IPI flow. So fix it.
Having this fix, any hart can be main hart in U-Boot SPL
theoretically, but it still fa
From: Rick Chen
This patch provides four configurations
which can support U-Boot SPL to boot from
RAM or FLASH and then boot FIT image
including OpenSBI FW_DYNAMIC firmware
and U-Boot proper images from RAM or
MMC boot devices.
With ae350_rv[32|64]_spl_defconfigs:
U-Boot SPL will be loaded by g
From: Rick Chen
The U-Boot SPL will boot in M mode and load the
FIT image which include OpenSbi and U-Boot proper
images. After loading progress, it will jump to
OpenSbi first and then U-Boot proper which will
run in S mode.
Signed-off-by: Rick Chen
Cc: KC Lin
Cc: Alan Kao
---
arch/riscv/cpu
From: Rick Chen
This series add support for SPL to AX25-AE350.
U-Boot SPL can boots from RAM or ROM and jump to
OPenSbi(FW_DYNAMIC firmware) and U-Boot proper from
RAM or MMC devices.
Also fix some bugs for andes plic driver and improve cache
configurations for SPL.
Following are the booting m
út 8. 10. 2019 v 12:03 odesílatel Michal Simek napsal:
>
> From: Manjukumar Matha
>
> Currently dropbear does not run in background because devtmps and tmpfs
> is not enabled by default. Enable devtmps and tmpfs to fix this issue.
>
> Signed-off-by: Manjukumar Matha
> Signed-off-by: Michal Simek
Hi,
On 25. 10. 19 6:42, Vignesh Raghavendra wrote:
> Hi Michal,
>
> On 14/10/19 6:22 PM, Michal Simek wrote:
>> From: T Karthik Reddy
>>
>> To add usb-3.0 support to peripheral device add BOS & SS capability
>> descriptors to gadget composite framework.
>>
>
> How was this patch tested? With wh
Hi Tom,
On Thu, Oct 24, 2019 at 11:38 PM Tom Rini wrote:
>
> On Thu, Oct 24, 2019 at 11:31:30PM +0800, Bin Meng wrote:
> > On Thu, Oct 24, 2019 at 11:10 PM Bin Meng wrote:
> > >
> > > Hi Tom,
> > >
> > > On Thu, Oct 24, 2019 at 11:01 PM Tom Rini wrote:
> > > >
> > > > On Wed, Oct 23, 2019 at 08
Hi Andrew,
On 24/10/19 11:49 PM, Andrew F. Davis wrote:
> On 10/24/19 11:25 AM, Vignesh Raghavendra wrote:
>> Hi Sam,
>>
>> On 24-Oct-19 7:16 PM, Sam Protsenko wrote:
>>> Putting Vignesh to "To:".
>>>
>>> Hi Vignesh,
>>>
>>> Please address Tero's comments below (I've marked with ^^^). Thanks.
>>>
Hi Michal,
On 14/10/19 6:22 PM, Michal Simek wrote:
> From: T Karthik Reddy
>
> To add usb-3.0 support to peripheral device add BOS & SS capability
> descriptors to gadget composite framework.
>
How was this patch tested? With what gadget function driver was this tested?
I don't see *any* func
On Thu, Oct 24, 2019 at 08:49:00PM +, Heinrich Schuchardt wrote:
> Copy the block size from the block IO protocol to the U-Boot block device
> descriptor. This information is used by the ext4 file system driver.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> lib/efi_driver/efi_block_device.c
Hi,
On Wed, 4 Sep 2019 at 08:36, Simon Glass wrote:
>
> Hi Tom,
>
> Ah OK. I was worried about doing it in one step. It might be too late
> now but will take a look when I get time and we can see if it is safe.
Just to close this thread, I have now sent a v2 series which I think
covers this, as
On 2019/10/25 上午7:28, Heiko Stuebner wrote:
From: Heiko Stuebner
The px30 evb is an evaluation board for the px30 together with a dsi-
connected display. This adds board and config files for it.
Signed-off-by: Heiko Stuebner
Reviewed-by: Kever Yang
Thanks,
- Kever
---
board/rockchip/
Heiko,
On 2019/10/25 上午7:28, Heiko Stuebner wrote:
From: Kever Yang
Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Could you leave the sra
> -Original Message-
> From: Jagan Teki
> Sent: 2019年10月24日 3:40
> To: Xiaowei Bao
> Cc: Priyanka Jain ; Jagdish Gediya
> ; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH] configs: spi: Miss the SPI_FLASH_BAR for ESPI
>
> On Tue, Oct 22, 2019 at 3:21 PM Xiaowei Bao
> wrote:
> >
>
On 2019/10/25 上午7:28, Heiko Stuebner wrote:
From: Heiko Stuebner
Add px30 related devicetrees synced from the Linux kernel.
The kernel dts should have been on kernel mainline, could you provide
which commit
do you sync from?
Thanks,
- Kever
Signed-off-by: Heiko Stuebner
---
arch/
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
From: Heiko Stuebner
Newer Rockchip socs use a different ip block to handle one-time-
programmable memory, so depending on what got enabled get the cpuid
from either source.
Signed-off-by: Heiko Stuebner
Reviewed-by: Kever Yang
Thanks,
- Kever
-
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
From: Finley Xiao
Newer Rockchip socs like the px30 use a different ip block to handle
one-time-programmable memory, so add a misc driver for it as well.
Signed-off-by: Finley Xiao
Signed-off-by: Heiko Stuebner
Reviewed-by: Kever Yang
Thanks,
-
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
From: Kever Yang
Add the table entry for px30 socs.
The px30 has 10K of sram available.
Signed-off-by: Kever Yang
Signed-off-by: Heiko Stuebner
Reviewed-by: Kever Yang
Thanks,
- Kever
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertio
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
Add the glue code to allow the px30 variant of the Rockchip gmac
to provide network functionality.
Signed-off-by: Heiko Stuebner
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/net/gmac_rockchip.c | 69 +
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
From: David Wu
Add the necessary glue code to allow pinctrl setting on px30 socs.
Signed-off-by: David Wu
Signed-off-by: Heiko Stuebner
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/p
Heiko,
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
Add headers needed by the upcoming px30 support, including two
new dt-binding headers taken from the Linux kernel.
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/grf_px30.h | 144 ++
include/configs/px3
Heiko,
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
From: Heiko Stuebner
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all
cases, making the TPL bigger. There may be cases where the TPL is really
size constrained due to its underlying ram size.
Therefore introduce a new
> Subject: Re: [PATCH 2/3] imx8: add sc_misc_seco_build_info()
>
> Hi Peng,
>
> On Tue, 22 Oct 2019 02:47:28 +
> Peng Fan peng@nxp.com wrote:
> ...
> > > Subject: [PATCH 2/3] imx8: add sc_misc_seco_build_info()
> >
> > sc_seco_build_info already in Stefano's tree.
>
> sc_seco_build_info(
Hi Heiko,
Thanks very much for you patches.
Thanks,
- Kever
On 2019/10/25 上午7:27, Heiko Stuebner wrote:
From: Heiko Stuebner
This series adds support for the px30 soc and its evaluation board.
The most interesting aspect is the sram size which is only 10kb,
so the TPL doing the DDR init
Common PLL setup function, compatible with different SOC.
Mainly for the subsequent new SOC use.
Signed-off-by: Elaine Zhang
---
arch/arm/include/asm/arch-rockchip/clock.h | 76 +
drivers/clk/rockchip/Makefile | 1 +
drivers/clk/rockchip/clk_pll.c | 361 ++
> Subject: Re: [PATCH] clk: imx: imx8mm: Fix the first root clock in
> imx8mm_ahb_sels[]
>
> On Wed, Oct 23, 2019 at 10:11 PM Peng Fan wrote:
>
> > No, kernel is right. It is U-Boot CCF specific.
>
> Can we make U-Boot to handle the same clock name as in kernel?
Let's try. But this patch is bu
This sdram_pctl_px30.c is based on PX30 SoC, the functions are common
for controller, other SoCs with similar hardware could re-use it.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
.../asm/arch-rockchip/sdram_pctl_px30.h | 139
drivers/ram/ro
The functions for dram info print are part of common code.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
drivers/ram/rockchip/Makefile | 1 -
drivers/ram/rockchip/sdram_common.c | 144 +++
drivers/ram/rockchip/sdram_debug.c | 147
This sdram_phy_px30.c is based on PX30 SoC, the functions are common
for phy, other SoCs with similar hardware could re-use it.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
.../asm/arch-rockchip/sdram_phy_px30.h| 62 ++
.../arch-rockchip/sdram_phy_
From: YouMin Chen
RK3328 has a similar controller and phy with PX30, so we can use the
common driver for it and remove the duplicate codes.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
arch/arm/dts/rk3328-sdram-ddr3-666.dtsi | 4 +
arch/arm/dts/rk3328
There are some function like os_reg setting, capacity detect functions,
can be used as common code for different Rockchip SoCs, add a
sdram_common.c for all these functions.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
.../include/asm/arch-rockchip/sdram_common
From: YouMin Chen
There are some code different with rockchip vendor code which may lead
to different bugs, including:
1) Fix setting error about LPDDR3 dram size ODT.
2) Set phy io speed to 0x2.
3) Fix setting error about phy_pad_fdbk_drive.
4) Fix setting error about PI_WDQLVL_VREF_EN
Signed-o
The noc register bit definition may be the same for different SoC while
the offset of the register may be different, add the struction
definition as common code.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
.../include/asm/arch-rockchip/sdram_msch.h| 85 +++
We are using sys_reg2 and sys_reg3 as ddr cap info, sync the variable
name to what we real use to avoid confuse people.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
arch/arm/mach-rockchip/sdram.c | 32
1 file changed, 16 inserti
Update the calculation of the stride to support all the DRAM case.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
drivers/ram/rockchip/sdram_rk3399.c | 158 +---
1 file changed, 119 insertions(+), 39 deletions(-)
diff --git a/drivers/ram/
The io setting are updated after some bugfix in different rk3399 boards,
sync the code from vendor.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
drivers/ram/rockchip/sdram_rk3399.c | 44 +
1 file changed, 14 insertions(+), 30 deletio
From: YouMin Chen
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3.
The PX30 SoC support driver is suppose to follow up later.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
.../include/asm/arch-rockchip/sdram_px30.h| 212 ++
.../r
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
drivers/ram/rockchip/sdram-rk3399-lpddr4-400.inc | 12 ++--
drivers/ram/rockchip/sdram-rk3399-lpddr4-800.inc | 6 +++---
2 fil
Since we have new DRAM type and to support different DRAM size in different
CS, we need more bits, so introduce sys_reg3 to record the info.
Note that the info in sys_reg3 is extension to sys_reg2 and the info in
sys_reg2 is the same as before. We define the DRAM_INFO with sys_reg3 as
VERSION2.
All
From: YouMin Chen
RK3399's controller and phy are able to re-use the common code, migrate
to use the common driver and remove duplicated code.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 4 +
arch/arm/dts/rk3
The header file sdram.h is used for rk3288 and similar SoCs, rename it
to make it more understandable.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
arch/arm/include/asm/arch-rockchip/{sdram.h => sdram_rk3288.h} | 0
arch/arm/mach-rockchip/spl.c
rename sdram_common.c in arch/arm/mach-rockchip to sdram.c;
so that we can use the file name sdram_common.c in dram driver for
better understand the code;
clean the related file who has use the header file at the same time.
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2:
The sdram.h suppose to be helper file for sdram.c which including dram
size decode and some u-boot related dram init interface, and all
structure and function for dram driver move to sdram_common.h
Signed-off-by: YouMin Chen
Signed-off-by: Kever Yang
---
Changes in v2: None
arch/arm/include/a
The sdram drivers for Rockchip SoCs was all separate, some of the SoCs
has similar hardware controller and phy, so we have a change to share
the flow and some of the functions between different SoCs.
This patch set implement a first version common code based on PX30,
other SoCs has similar hardwar
Drop the now-unused Python 2 code to keep code coverage at 100%.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/fdt.py | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 6770be79fbe..1b7b730359a 1006
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Monday, October 21, 2019 2:54 AM
> > To: u-boot@lists.denx.de
> > Cc: Alistair Francis; Anup Patel; Bin Meng; Atish Patra; Lukas Auer;
> > Aurelien
> > Jarno; David Abdurachmanov; Rick Jian-Zhi Chen(陳建志)
> > Subject: [PATCH] ri
Update this test to use Python 3 to meet the 2020 deadline.
Also make it executable while we are here.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/dtoc.py | 2 +-
tools/dtoc/test_dtoc.py | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
mode change 100644 => 10075
This function should use a void * type, not char *. This causes an error:
TypeError: in method 'fdt_property_stub', argument 3 of type 'char const *'
Fix it.
Signed-off-by: Simon Glass
---
Changes in v2: None
scripts/dtc/pylibfdt/libfdt.i_shipped | 4 ++--
1 file changed, 2 insertions(+), 2
When preparing to possible expand or contract an entry we reset the size
to the original value from the binman device-tree definition, which is
often None.
This causes binman to forget the original size of the entry. Remember this
so that it can be used when needed.
Signed-off-by: Simon Glass
--
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/microcode-tool.py | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/tools/microcode-tool.py b/tools/microcode
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/rkmux.py | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tools/rkmux.py b/tools/rkmux.py
index 11c192a0737..1226ee201c3 1
Update this test to use Python 3 to meet the 2020 deadline.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/test_fdt.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py
index 028c8cbaa80..3316757e61e 100755
--- a/
Sync up the libfdt Python bindings with upstream, commit:
430419c (tests: fix some python warnings)
Signed-off-by: Simon Glass
---
Changes in v2: None
scripts/dtc/pylibfdt/libfdt.i_shipped | 45 ---
1 file changed, 33 insertions(+), 12 deletions(-)
diff --git a/script
Some tests have crept in with Python 2 strings and constructs. Convert
then.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/binman/ftest.py | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 88daaf20a
Build this swig module with Python 3.
Signed-off-by: Simon Glass
---
Changes in v2: None
scripts/dtc/pylibfdt/Makefile | 2 +-
scripts/dtc/pylibfdt/libfdt.i_shipped | 2 +-
scripts/dtc/pylibfdt/setup.py | 2 +-
tools/binman/entry.py | 16 ++--
too
Update this tool to use Python 3 to meet the 2020 deadline.
Unfortunately this introduces a test failure due to a problem in pylibfdt
on Python 3. I will investigate.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add a few more patches to correct remaining problems
tools/binman/binman.py |
Update this tool to use Python 3 to meet the 2020 deadline.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/patman/patman.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/patman/patman.py b/tools/patman/patman.py
index 9605a36eff2..fe82f24c673 100755
--- a/
Convert buildman to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/buildman/board.py | 7 +--
tools/buildman/bsettings.py | 20 +++
tools/buildman/builder.py | 45
tools/buildman/builder
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/moveconfig.py | 82 ++---
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/tools/moveconfig.py b/tools/
At present all the 'command' methods return bytes. Most of the time we
actually want strings, so change this. We still need to keep the internal
representation as bytes since otherwise unicode strings might break over
a read() boundary (e.g. 4KB), causing errors. But we can convert the end
result t
This converts some of the scripts that I've been involved in to use
Python 3.
There is still one problem in that fdt_property_stub() doesn't work
correctly in pylibfdt:
ftest.TestFunctional.testExtractAllEntries Traceback (most recent call last):
TypeError: in method 'fdt_property_stub', argument
From: Heiko Stuebner
Add px30 related devicetrees synced from the Linux kernel.
Signed-off-by: Heiko Stuebner
---
arch/arm/dts/Makefile |3 +
arch/arm/dts/px30-evb-u-boot.dtsi | 81 ++
arch/arm/dts/px30-evb.dts | 527
arch/arm/dts/px30.dtsi| 2068
From: Heiko Stuebner
The px30 evb is an evaluation board for the px30 together with a dsi-
connected display. This adds board and config files for it.
Signed-off-by: Heiko Stuebner
---
board/rockchip/evb_px30/Kconfig | 15
board/rockchip/evb_px30/MAINTAINERS | 6 ++
board/rockchip/
From: Kever Yang
Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Signed-off-by: Kever Yang
Signed-off-by: Heiko Stuebner
---
arch/arm/include
On Wed, Oct 02, 2019 at 02:47:49PM +0200, Jean-Jacques Hiblot wrote:
> Provide tests to check the behavior of the multiplexer framework.
> The test uses a mmio-based multiplexer.
>
> Signed-off-by: Jean-Jacques Hiblot
These tests don't pass (with all of the other series applied as well,
and som
From: Heiko Stuebner
Newer Rockchip socs use a different ip block to handle one-time-
programmable memory, so depending on what got enabled get the cpuid
from either source.
Signed-off-by: Heiko Stuebner
---
arch/arm/mach-rockchip/misc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion
From: Heiko Stuebner
sdram configuration happens outside of dm-infrastructure in special
tpl-code, so the sdram driver itself has just the function to read
back the sdram configuration and allow main uboot to handle dram sizes.
Signed-off-by: Heiko Stuebner
---
drivers/ram/rockchip/Makefile
Add headers needed by the upcoming px30 support, including two
new dt-binding headers taken from the Linux kernel.
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/grf_px30.h | 144 ++
include/configs/px30_common.h | 62
include/dt-bi
From: Kever Yang
The px30 contains 2 separate clock controllers, pmucru and cru.
Add drivers for them.
Signed-off-by: Kever Yang
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/cru_px30.h | 432 +
drivers/clk/rockchip/Makefile |1 +
drivers/clk/ro
From: Heiko Stuebner
This series adds support for the px30 soc and its evaluation board.
The most interesting aspect is the sram size which is only 10kb,
so the TPL doing the DDR init needs to be really tiny, while the
SPL then should use devicemanager and all other newer features.
I'm not yet s
From: Finley Xiao
Newer Rockchip socs like the px30 use a different ip block to handle
one-time-programmable memory, so add a misc driver for it as well.
Signed-off-by: Finley Xiao
Signed-off-by: Heiko Stuebner
---
drivers/misc/Kconfig| 9 ++
drivers/misc/Makefile | 1 +
dri
From: Kever Yang
Add the table entry for px30 socs.
The px30 has 10K of sram available.
Signed-off-by: Kever Yang
Signed-off-by: Heiko Stuebner
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 831c2ad820..83df82e4b0 100644
---
Add the glue code to allow the px30 variant of the Rockchip gmac
to provide network functionality.
Signed-off-by: Heiko Stuebner
---
drivers/net/gmac_rockchip.c | 69 +
1 file changed, 69 insertions(+)
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gm
From: David Wu
Add the necessary glue code to allow pinctrl setting on px30 socs.
Signed-off-by: David Wu
Signed-off-by: Heiko Stuebner
---
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-px30.c | 368
2 files changed, 369 insertions(
From: Heiko Stuebner
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all
cases, making the TPL bigger. There may be cases where the TPL is really
size constrained due to its underlying ram size.
Therefore introduce a new TPL_FRAMEWORK option and make the relevant
conditionals
Hi,
On Tue, 22 Oct 2019 at 23:23, AKASHI Takahiro
wrote:
>
> On Mon, Oct 21, 2019 at 06:17:03PM -0600, Simon Glass wrote:
> > Hi Takahiro,
> >
> > On Tue, 8 Oct 2019 at 23:27, AKASHI Takahiro
> > wrote:
> > >
> > > In the current implementation of FIT_SIGNATURE, five parameters for
> > > a RSA
Copy the block size from the block IO protocol to the U-Boot block device
descriptor. This information is used by the ext4 file system driver.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_driver/efi_block_device.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/efi_driver/efi_blo
On 10/24/19 4:05 PM, Patrice CHOTARD wrote:
Hi Heinrich, all
On 10/7/19 7:34 PM, Heinrich Schuchardt wrote:
On 10/7/19 3:29 PM, Yannick Fertré wrote:
If the size of the bitmap is bigger than the size of
the panel then errors appear when calculating axis alignment
and the copy of bitmap is done
On Thu, Oct 24, 2019 at 09:55:35AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following cfi-flash related patches:
>
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Oct 15, 2019 at 06:24:39PM +0530, Faiz Abbas wrote:
> Add TI UFS glue layer and Cadence UFS Host controller DT nodes.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Oct 15, 2019 at 06:24:42PM +0530, Faiz Abbas wrote:
> Enable SCSI and UFS related configs.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
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On Tue, Oct 15, 2019 at 06:24:36PM +0530, Faiz Abbas wrote:
> Add Support for UFS Host Controller Interface (UFSHCI) for communicating
> with Universal Flash Storage (UFS) devices. The steps to initialize the
> host controller interface are the following:
>
> - Initiate the Host Controller Initia
On Tue, Oct 15, 2019 at 06:24:40PM +0530, Faiz Abbas wrote:
> Add Support for commands to initialize and configure UFS devices.
>
> TODO: Add Support for commands to resize and reconfigure LUNs
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Oct 15, 2019 at 06:24:38PM +0530, Faiz Abbas wrote:
> Add glue layer driver for the controller present on TI's J721E devices.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Oct 15, 2019 at 06:24:37PM +0530, Faiz Abbas wrote:
> Add Support for the platform driver for the Cadence device present on
> TI's J721e device.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Oct 15, 2019 at 06:24:41PM +0530, Faiz Abbas wrote:
> Add environment variables to boot kernel from a filesystem contained in
> the 2nd UFS LUN. The user can boot from a ufs filesystem just by
> entering the following commands.
>
> => setenv boot ufs
> => boot
>
> Signed-off-by: Faiz Abb
On Tue, Oct 15, 2019 at 06:24:35PM +0530, Faiz Abbas wrote:
> Some SCSI devices like UFS use DMA for executing scsi commands and hence
> need to know the direction of transfer of the dma. Add a dma_dir element
> to the command structure to facilitate this.
>
> Signed-off-by: Faiz Abbas
Applied
On Tue, Oct 15, 2019 at 06:24:34PM +0530, Faiz Abbas wrote:
> The UFS SCSI device LUNs are observed to return failure the first time a
> unit ready inquiry is sent and pass on the second try. Send this
> inquiry 3 times to make sure device is ready.
>
> Signed-off-by: Faiz Abbas
Applied to u-bo
On Tue, Oct 15, 2019 at 06:24:33PM +0530, Faiz Abbas wrote:
> Add max_bytes_per_req to scsi_platdata to enable the host driver to limit
> the number of bytes that can be read/written per request.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Oct 15, 2019 at 06:24:32PM +0530, Faiz Abbas wrote:
> With no non-DM driver using scsi_read()/_write() APIs, remove
> the legacy implementations.
>
> Signed-off-by: Faiz Abbas
Applied to u-boot/master, thanks!
--
Tom
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Am 24.10.2019 um 20:23 schrieb Simon Goldschmidt:
From: Simon Goldschmidt
Support loading clk speed via DM instead of requiring ad-hoc code.
Signed-off-by: Simon Goldschmidt
Signed-off-by: Simon Goldschmidt
That gmx adress somehow slipped in after cloning u-boot-spi. Can you
remove it whe
From: Simon Goldschmidt
Support loading clk speed via DM instead of requiring ad-hoc code.
Signed-off-by: Simon Goldschmidt
Signed-off-by: Simon Goldschmidt
---
Changes in v2:
- check return value of clk_get_rate for error
drivers/spi/cadence_qspi.c | 22 --
1 file chang
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