The conversion to DM_SPI managed to break accessing the environment on
dreamplug. This is because the environment code relies on being to able
to select the SPI device based on the sequence number. Add an alias so
that the spi0 bus gets sequence number 0.
Reported-by: Leigh Brown
Signed-off-by: C
Hi Leigh,
On Thu, Feb 28, 2019 at 7:24 AM Leigh Brown wrote:
>
> Hello,
>
> Vagrant Cascadian asked for people to test the version of u-boot
> packaged
> for Debian Buster. I tested u-boot on my Dreamplug and found it was not
> working correctly. I raised a bug for Debian[1] but I have also tes
CONFIG_SYS_HELP_CMD_WIDTH is used to format the output of help without any
arguments.
CONFIG_SYS_HELP_CMD_WIDTH = 8 is too narrow to fit all our commands.
Signed-off-by: Heinrich Schuchardt
---
Tested on Travis CI
https://travis-ci.org/xypron2/u-boot/builds/498902822
---
include/command.h | 2 +
On 2/28/19 6:06 AM, AKASHI Takahiro wrote:
> On Thu, Feb 28, 2019 at 05:53:17AM +0100, Heinrich Schuchardt wrote:
>> On 2/28/19 5:45 AM, AKASHI Takahiro wrote:
>>> On Wed, Feb 27, 2019 at 08:10:36AM +0100, Heinrich Schuchardt wrote:
On 2/27/19 7:37 AM, AKASHI Takahiro wrote:
> On Wed, Feb
On Thu, Feb 28, 2019 at 05:53:17AM +0100, Heinrich Schuchardt wrote:
> On 2/28/19 5:45 AM, AKASHI Takahiro wrote:
> > On Wed, Feb 27, 2019 at 08:10:36AM +0100, Heinrich Schuchardt wrote:
> >> On 2/27/19 7:37 AM, AKASHI Takahiro wrote:
> >>> On Wed, Feb 27, 2019 at 07:25:52AM +0100, Heinrich Schucha
On 2/28/19 5:45 AM, AKASHI Takahiro wrote:
> On Wed, Feb 27, 2019 at 08:10:36AM +0100, Heinrich Schuchardt wrote:
>> On 2/27/19 7:37 AM, AKASHI Takahiro wrote:
>>> On Wed, Feb 27, 2019 at 07:25:52AM +0100, Heinrich Schuchardt wrote:
On 2/27/19 7:12 AM, AKASHI Takahiro wrote:
> On Tue, Feb
On 2/28/19 5:28 AM, AKASHI Takahiro wrote:
> On Wed, Feb 27, 2019 at 08:33:17PM +0100, Heinrich Schuchardt wrote:
>> On 2/27/19 7:47 AM, AKASHI Takahiro wrote:
>>> On Wed, Feb 27, 2019 at 07:31:06AM +0100, Heinrich Schuchardt wrote:
On 2/27/19 6:58 AM, AKASHI Takahiro wrote:
> On Tue, Feb
On Wed, Feb 27, 2019 at 08:10:36AM +0100, Heinrich Schuchardt wrote:
> On 2/27/19 7:37 AM, AKASHI Takahiro wrote:
> > On Wed, Feb 27, 2019 at 07:25:52AM +0100, Heinrich Schuchardt wrote:
> >> On 2/27/19 7:12 AM, AKASHI Takahiro wrote:
> >>> On Tue, Feb 26, 2019 at 08:20:10PM +0100, Heinrich Schucha
On Wed, Feb 27, 2019 at 08:33:17PM +0100, Heinrich Schuchardt wrote:
> On 2/27/19 7:47 AM, AKASHI Takahiro wrote:
> > On Wed, Feb 27, 2019 at 07:31:06AM +0100, Heinrich Schuchardt wrote:
> >> On 2/27/19 6:58 AM, AKASHI Takahiro wrote:
> >>> On Tue, Feb 26, 2019 at 08:30:50PM +0100, Heinrich Schucha
Hi Fabio, Stefano,
On Thu, Feb 28 2019, Fabio Estevam wrote:
> On Sun, Feb 24, 2019 at 3:21 PM Baruch Siach wrote:
>> Signed-off-by: Baruch Siach
>> ---
>> board/freescale/imx8mq_evk/README | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/board/freescale/imx8mq_evk/README
>> b/board
Hi Fabio,
On Thu, Feb 28 2019, Fabio Estevam wrote:
> On Wed, Jan 2, 2019 at 4:59 AM Baruch Siach wrote:
>>
>> Use a single '=' to test string equality for compatibility with non-bash
>> shells. Otherwise, if /bin/sh is dash, build fails:
>>
>> ./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin
On Wed, 2019-02-27 at 10:13 +0100, Michal Simek wrote:
> On 27. 02. 19 7:37, Chee, Tien Fong wrote:
> >
> > On Tue, 2019-02-26 at 07:58 -0800, Dalon L Westergreen wrote:
> > >
> > > On Tue, 2019-02-26 at 16:42 +0100, Michal Simek wrote:
> > > >
> > > >
> > > > On 26. 02. 19 15:28, Chee, Tien Fo
On Wed, Feb 27, 2019 at 01:39:44PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> SiFive FU540 Support
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/499037971
>
> Thanks
> Rick
>
>
> The following changes since commit b3820ba997f004a376efc54466
On Tue, Feb 26, 2019 at 7:43 PM Andy Shevchenko
wrote:
>
> Intel Tangier SoC has a general purpose DMA which can serve to speed up
> communications on SPI and I2C serial buses.
>
> Provide DMA descriptors to utilize this capability in the future.
>
> Note, I2C6, which is available to user, has no
On Tue, Feb 26, 2019 at 7:43 PM Andy Shevchenko
wrote:
>
> Intel Tangier SoC has a general purpose DMA which can serve to speed up
> communications on SPI and I2C serial buses.
>
> Provide DMA descriptors to utilize this capability in the future.
>
> Signed-off-by: Andy Shevchenko
> ---
> arch/x
Hi Andy,
On Tue, Feb 26, 2019 at 7:21 PM Andy Shevchenko
wrote:
>
> Intel Edison has three UART ports, i.e.
> port 0 - Bluetooth
> port 1 - auxiliary, available for general purpose use
> port 2 - debugging, usually console output is here
>
> Enable all of them for future use.
>
> Signed-off-by
On Tue, Feb 26, 2019 at 7:21 PM Andy Shevchenko
wrote:
>
> The console is actually serial #2. When we would like to enable other ports,
> this would be not okay to mess up with the ordering.
>
> Thus, fix the number of default console interface to be 2.
>
> Signed-off-by: Andy Shevchenko
> ---
>
Christian, I got some time to look at this old patch, and I see my
last question remained unanswered.
+Andy,
Hi Andy,
On Thu, May 24, 2018 at 12:00 PM Bin Meng wrote:
>
> Hi Christian,
>
> On Thu, Apr 12, 2018 at 4:07 PM, Christian Gmeiner
> wrote:
> > Fixes performance related issue when runn
Hi Baruch and Stefano,
On Wed, Jan 2, 2019 at 4:59 AM Baruch Siach wrote:
>
> Use a single '=' to test string equality for compatibility with non-bash
> shells. Otherwise, if /bin/sh is dash, build fails:
>
> ./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator
> ./tools/imx8
Hi Baruch,
On Sun, Feb 24, 2019 at 3:21 PM Baruch Siach wrote:
>
> Signed-off-by: Baruch Siach
> ---
> board/freescale/imx8mq_evk/README | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/board/freescale/imx8mq_evk/README
> b/board/freescale/imx8mq_evk/README
> index e1335293a08f..2529f7
On Sun, Feb 24, 2019 at 3:22 PM Baruch Siach wrote:
>
> Remove a redundant directory level.
>
> Reported-by: Ofer Heifetz
> Signed-off-by: Baruch Siach
Tested-by: Fabio Estevam
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listin
Hi, Marek
sorry for possible format issue.
ср, 27 февр. 2019 г., 23:02 Marek Vasut :
> On 2/26/19 8:37 PM, Oleksandr wrote:
> >
> > Hi, Marek
>
> Hi,
>
> +}
> +
> +/*
> + * Reset vector for secondary CPUs.
> + * This will be mapped at address 0 by SB
On 2/26/19 7:37 PM, Oleksandr wrote:
>
> Hi, Marek
Hi,
>>>
2. It should be new pm-r8a7791.c file which will don't have any CA7
related stuff (CPU cores, SCU, etc).
>>> I'd like to have a generic pm-gen2.c file , which parses the DT and
>>> figures the configuration out that way. We are
On 2/26/19 8:37 PM, Oleksandr wrote:
>
> Hi, Marek
Hi,
+}
+
+/*
+ * Reset vector for secondary CPUs.
+ * This will be mapped at address 0 by SBAR register.
+ * We need _long_ jump to the physical address.
+ */
+asm(" .arm
On 2/27/19 7:47 AM, AKASHI Takahiro wrote:
> On Wed, Feb 27, 2019 at 07:31:06AM +0100, Heinrich Schuchardt wrote:
>> On 2/27/19 6:58 AM, AKASHI Takahiro wrote:
>>> On Tue, Feb 26, 2019 at 08:30:50PM +0100, Heinrich Schuchardt wrote:
On 1/15/19 3:54 AM, AKASHI Takahiro wrote:
> With this pa
On 2/27/19 10:55 AM, Matthias Brugger wrote:
>
>
> On 26/02/2019 17:58, Heinrich Schuchardt wrote:
>> On 2/26/19 12:46 PM, matthias@kernel.org wrote:
>>> From: Matthias Brugger
>>>
>>> Function term_read_reply tries to read from the serial console until
>>> the end_char was read. This can ha
The SPL for the Tinker Board has to fit into 32 KiB. Currently this limit
is exceeded.
CONFIG_SPL_I2C_SUPPORT is not needed to move to main U-Boot. So let's
disable it.
Suggested-by: David Wu
Signed-off-by: Heinrich Schuchardt
---
This solves only one of the problems with the boards in v2019.04
Add sample dm clk test for clk_get_by_index and
clk_get_by_index_nodev functionality code.
Cc: Stephen Warren
Signed-off-by: Jagan Teki
Reviewed-by: Simon Glass
---
test/dm/clk.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 898c
Since Ethernet clock and reset is now handling via
CLK and RESET frameworks via driver API's remove
explicit ccm writes.
Signed-off-by: Jagan Teki
---
board/sunxi/gmac.c | 8
1 file changed, 8 deletions(-)
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index 826650c89b..d8fdf7728
Unlike other Allwinner SoC's R40 GMAC clock control register
is locate in CCU, but rest located via syscon itself. Since
the phandle property for current code look for 'syscon' and
it will grab the respective ccu or syscon base address based
on DT property defined in respective SoC dtsi.
So, use t
Add EPHY CLK and RESET support for sun8i_emac driver to
enable EPHY TX clock and EPHY reset pins via CLK and RESET
framework.
Cc: Joe Hershberger
Cc: Lothar Felten
Signed-off-by: Jagan Teki
---
drivers/net/sun8i_emac.c | 74 +++-
1 file changed, 57 insertion
EPHY CLK and RESET is available in Allwinner H3 EMAC
via mdio-mux node of internal PHY. Add the respetive
clock and reset reg and bits.
Cc: Joe Hershberger
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/clk_h3.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/sunxi/clk_h3.c
- Implement EMAC, GMAC clocks via ccu_clk_gate for
all supported Allwinner SoCs.
- Implement EMAC, GMAC resets via ccu_reset for all
supported Allwinner SoCs.
Cc: Joe Hershberger
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/clk_a31.c | 2 ++
drivers/clk/sunxi/clk_a64.c | 2 ++
drivers/
Add CLK and RESET support for sun8i_emac driver to
enable TX clock and reset pins via CLK and RESET
framework.
Cc: Joe Hershberger
Cc: Lothar Felten
Signed-off-by: Jagan Teki
---
drivers/net/sun8i_emac.c | 57 +---
1 file changed, 42 insertions(+), 15 deleti
Getting a RESET by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process RESET operation for child
without udevice but with ofnode.
So add reset_get_by
Add sample dm reset test for reset_get_by_index and
reset_get_by_index_nodev functionality code.
Cc: Stephen Warren
Signed-off-by: Jagan Teki
Reviewed-by: Simon Glass
---
test/dm/reset.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/test/dm/reset.c b/test/dm/rese
clk_get_by_index_tail() now handle common clk get by index
code so use it from clk_get_by_indexed_prop().
Cc: Stephen Warren
Cc: Simon Glass
Signed-off-by: Jagan Teki
---
Changes for v3:
- use clk_get_by_index_tail() from clk_get_by_indexed_prop()
drivers/clk/clk-uclass.c | 24 ++-
Getting a CLK by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process CLK operation for child
without udevice but with ofnode.
So add clk_get_by_index
Add CLk support for sunxi_emac to enable AHB_EMAC clock
via CLK framework.
Cc: Joe Hershberger
Signed-off-by: Jagan Teki
---
drivers/net/sunxi_emac.c | 28 ++--
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_em
Implement EMAC clocks via ccu_clk_gate for Allwinner A10 SoC.
Which would eventually used in sunxi_emac.c driver.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/clk_a10.c | 1 +
drivers/clk/sunxi/clk_a10s.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/clk/sunxi/clk_a10.c b/dr
This is v2 version for Allwinner EMAC CLK, RESET support, which
was initially be a part of previous series[1].
Changes for v3:
- rebase on master
- collecet review tags from Simon
- fixed the comment by Simon, keep clk_get_by_indexed_prop()
and call clk_get_by_index_tail
Changes for v2:
- rebase
On Tue, Feb 26, 2019 at 10:45:44PM +0530, Faiz Abbas wrote:
> With U-boot supporting environment in multiple places, enable only
> ENV_IS_IN_EMMC
>
> Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
On Wed, Feb 27, 2019 at 11:15:23AM +0100, Simon Goldschmidt wrote:
> Tom,
>
> On Thu, Feb 14, 2019 at 10:20 AM Simon Goldschmidt
> wrote:
> >
> > On Thu, Feb 14, 2019 at 7:26 AM Heinrich Schuchardt
> > wrote:
> > >
> > > The SPL image for the Tinker Board has to fit into 32 KiB. This includes
>
On Wed, Feb 27, 2019 at 01:29:38PM +0530, Faiz Abbas wrote:
> Now that NAND is supported on DRA71x include various NAND environment
> settings
>
> Signed-off-by: Faiz Abbas
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
___
Hello,
Vagrant Cascadian asked for people to test the version of u-boot
packaged
for Debian Buster. I tested u-boot on my Dreamplug and found it was not
working correctly. I raised a bug for Debian[1] but I have also tested
with the mainline version of u-boot and found the same issues.
This
On 2/26/19 7:36 PM, Masahiro Yamada wrote:
On Wed, Feb 27, 2019 at 11:17 AM Masahiro Yamada
wrote:
On Wed, Feb 27, 2019 at 4:21 AM Stephen Warren wrote:
From: Stephen Warren
Without this, the arch-dtbs target only gets evaluated when building
U-Boot the first time, not when re-building (i
Current relocation code is limited to 21bit PC-relative addressing
which might not be enough for bigger code sizes. The following patch
increases the addressing to 32bit PC-relative. This feature is
specially interesting if U-Boot is build without optimiation (-O0) as
the text section is increased
SPL need to set GPIOZ_SECCFGR = 0 to enable access to GPIOZ bank
(open security).
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 5d79bde..f39941e 100644
-
Clearly separate bootcmd for stm32mp1 board
(bootcmd_stm32mp) and preboot management.
That solve issue for fastboot continue command.
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c| 1 +
configs/stm32mp15_basic_defconfig | 1 +
configs/stm32mp15_trusted_defconfig |
Always use upper case for serial number.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 305ea6d..5d79bde 100644
--- a/arch/arm/mach-stm32mp/cpu.c
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/bsec.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 8c5a299..9ed8d8c 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/ma
Update bsec driver to use the device tree provided by Kernel.
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp157-u-boot.dtsi| 4
arch/arm/dts/stm32mp157c.dtsi | 7 +++
arch/arm/mach-stm32mp/bsec.c | 12 +---
arch/arm/mach-stm32mp/in
Replace STM32_BSEC_OTP() by STM32_BSEC_SHADOW() to
increase read performance.
Signed-off-by: Patrice Chotard
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm3
Add configuration useful for test
- FIT support
- MEMTEST
- DFU
- CACHE
- TIME
- TIMER
Signed-off-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 6 ++
configs/stm32mp15_trusted_defconfig | 6 ++
include/configs/stm32mp1.h | 4
3 files changed, 16 insertions
The boot mode can be forced by key press
or by TAMP register, requested in kernel by syscon-reboot-mode
tamp: tamp@5c00a000 {
compatible = "simple-bus", "syscon", "simple-mfd";
reg = <0x5c00a000 0x400>;
reboot-mode {
compatible = "syscon-reboot-mode";
Update the memory layout to be aligned with other platform and avoid
overlap with 32MB Linux kernel (multiv7 image).
+ Kernel => 32MiB offset = 0xC200
and increase the bootm size to 32MiB
+ FDT => 64MiB offset = 0xc400
+ SCRIPT => 65Mib offset = 0xc410
+ PXESCRIPT => 66Mib o
Initialize the system configuration for basic boot
- update interconnect setting
- disable pull-down for boot pin
- enable High Speed Low Voltage Pad mode for SPI, SDMMC, ETH, QSPI
- activate I/O compensation
Done by SSBL = TF-A for trusted boot
Signed-off-by: Patrick Delaunay
---
board/st/stm
activate Fastboot for eMMC on EV1 board (mmc1)
$> sudo apt-get install android-tools-adb android-tools-fastboot
$> fastboot -i 0x0483 getvar bootloader-version
Signed-off-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 7 ++-
configs/stm32mp15_trusted_defconfig | 7 ++-
Add explaination for the return value of psci_migrate_info_type:
2 = Trusted OS.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/psci.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c
index 6ed248
Add SYSCON driver for syscfg and etpzc and reorder in alphabetics order
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp157c.dtsi | 2 +-
arch/arm/mach-stm32mp/include/mach/stm32.h | 4 +++-
arch/arm/mach-stm32mp/syscon.c | 9 +
3 files changed, 9 insert
SPL displays the board model from device tree.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/Kconfig | 1 +
arch/arm/mach-stm32mp/spl.c | 17 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 3101
When DDR initialization failed, print error message
and stop the SPL execution.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/spl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c
index 501e077..a3b0d6
Cosmetic cleanup in mach-stm32mp Kconfig
- remove duplicated SPL_DRIVERS_MISC_SUPPORT
- update help for TARGET_STM32MP1
- set value for NR_DRAM_BANKS
- remove one comment as DEBUG_UART is deactivated by default
- include board Kconfig at the end of the file
Signed-off-by: Patrick Delaunay
---
a
Need to be apply after the previous serie:
stm32mp1: add trusted boot with TF-A
http://patchwork.ozlabs.org/project/uboot/list/?series=91422
It is a first alignment on the delivery v2018.11-stm32mp-r2
available on GITHUB https://github.com/STMicroelectronics/u-boot
Patrick Delaunay (19):
Display CPU part number and package information.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c| 102 +++--
arch/arm/mach-stm32mp/include/mach/sys_proto.h | 10 ++-
2 files changed, 104 insertions(+), 8 deletions(-)
diff --git a/arch/ar
- export the function get_bootmode() and reused it in spl code
- manage uart instance by alias (prepare v4.19 binding)
- solve issue on nand instance
- restore console for uart boot
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c| 57 +
Set board name with the first dts compatible found in DT
code under CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
The result with DEVICE_TREE=stm32mp157c-ev1 is:
STM32MP> env print
board=stm32mp1
board_name=stm32mp157c-ev1
Signed-off-by: Patrick Delaunay
---
arch/arm/Kconfig
On Wed, Feb 27, 2019 at 8:52 AM Leigh Brown wrote:
>
> Hi Adam,
>
> Thanks very much for your response.
>
> On 2019-02-27 12:50, Adam Ford wrote:
> > On Wed, Feb 27, 2019 at 5:32 AM Leigh Brown
> > wrote:
> >>
> >> Hello,
> >>
> >> Vagrant Cascadian asked for people to test the version of u-boot
Hi Jagan,
> From: Patrick DELAUNAY
> Sent: mardi 19 février 2019 13:28
> Subject: RE: [PATCH v3] dm: spi: Read default speed and mode values from DT
>
> Hi Jagan,
>
> > From: Jagan Teki
> > Sent: jeudi 14 février 2019 18:05
> >
> > On Tue, Feb 12, 2019 at 7:14 PM Patrick DELAUNAY
> >
> > wrot
Hi Adam,
Thanks very much for your response.
On 2019-02-27 12:50, Adam Ford wrote:
On Wed, Feb 27, 2019 at 5:32 AM Leigh Brown
wrote:
Hello,
Vagrant Cascadian asked for people to test the version of u-boot
packaged
for Debian Buster. I tested u-boot on my Dreamplug and found it was
not
wo
[reducing the CC list as gmail won't let me send otherwise]
On 27.02.2019 15:20, Patrick Delaunay wrote:
This converts the following to Kconfig:
CONFIG_SF_DEFAULT_BUS
CONFIG_SF_DEFAULT_CS
CONFIG_SF_DEFAULT_MODE
CONFIG_SF_DEFAULT_SPEED
I use moveconfig script and then manual check on
This patch update the behavior introduced by
commit 96907c0fe50a ("dm: spi: Read default speed and mode values from DT")
In case of DT boot, don't read default speed and mode for SPI from
CONFIG_* but instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can
This patch-set finish the previous serie:
http://patchwork.ozlabs.org/project/uboot/list/?series=76834
and also replace the serie:
"Remove defines for SPI default speed and mode "
http://patchwork.ozlabs.org/project/uboot/list/?series=80769&state=*
This new version is a complete rework after sev
This converts the following to Kconfig:
CONFIG_ENV_SPI_BUS
CONFIG_ENV_SPI_CS
CONFIG_ENV_SPI_MAX_HZ
CONFIG_ENV_SPI_MODE
Most of time these value are not needed, CONFIG_SF_DEFAULT
with same value is used, so I introduced CONFIG_USE_ENV_SPI_*
to force the associated value for the environment.
Currently switch is unable to boot pass Nintendo logo, will revert a nand
backup to the first uboot error which includes and the files created from
Uboot. The rest of the error after that are (after running different files
like kip files are results of me trying to retrieve inital setup.
Is it be
This serie is a proposal to convert all SPI configuration settings
in Kconfig :
+ parameters for SF command
- CONFIG_SF_DEFAULT_BUS
- CONFIG_SF_DEFAULT_CS
- CONFIG_SF_DEFAULT_MODE
- CONFIG_SF_DEFAULT_SPEED
+ parameters for SSPI command
- CONFIG_DEFAULT_SPI_BUS
- CONFIG_DEFAULT_SPI_MODE
- drop unused macros.
- use base instead of base_addr, for better code readability
- move .probe and .ofdata_to_platdata functions in required
places to add platdata support in future.
- use sentinel sun4i_spi_ids.
Signed-off-by: Jagan Teki
---
drivers/spi/sun4i_spi.c | 190 +--
Now the same SPI controller driver is reusable in all Allwinner
SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c
which eventually look like a common sunxi driver.
Also update the function, variable, structure names in driver from
sun4i into sunxi.
Signed-off-by: Jagan Teki
---
Add CLK support to enable AHB and MOD SPI clocks on sun4i_spi driver.
Clock disablement could be done while releasing the bus transfer, but
the existing code doesn't disable the clocks it only taken care of clock
enablement globally in probe.
So to make a proper clock handling, the clocks should
Update the existing register writes using setbits_le32 and
clrbits_le32 in required places.
Signed-off-by: Jagan Teki
---
drivers/spi/sun4i_spi.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c
index f5f
The usual SPI transmission protocol in Allwinner A10 and A31
controllers share similar context with minimal changes in register
offsets along with few additional register bits on A31.
So, add A31 spi controller support in existing sun4i_spi with A31
specific register offsets and bits.
Signed-off-
Support fifo_depth via drvdata instead of macro definition, this would
eventually reduce another macro definition for new SPI controller fifo
depth support addition.
Signed-off-by: Jagan Teki
Reviewed-by: Andre Przywara
---
drivers/spi/sun4i_spi.c | 6 +++---
1 file changed, 3 insertions(+), 3
Allwinner support two different SPI controllers one for A10 and
another for A31 with minimal changes in register offsets and
respective register bits, but the logic for accessing the SPI
master via SPI slave remains nearly similar.
Add enum offsets for register set and register bits, so-that
it ca
- Implement SPI AHB, MOD clocks via ccu_clk_gate for all
supported Allwinner SoCs
- Implement SPI resets via ccu_reset for all supported
Allwinner SoCs.
Signed-off-by: Jagan Teki
Reviewed-by: Andre Przywara
---
drivers/clk/sunxi/clk_a10.c | 10 ++
drivers/clk/sunxi/clk_a10s.c | 7
To drain rx fifo the fifo need to poll for how much data has
been filled up in rx fifo.
To achieve this, the current code is using wait_for_bit logic
on control register with exchange burst mode mask, which is not
a proper way of waiting for fifo filled up.
So, add code for polling rxfifo to be f
This series add support for Allwinner A31 SPI controller driver.
Fixed and improved conde when compared to previous series[1]
Changes for v3:
- update commit message for "poll rxfifo" patch
- change SPI_CS argument as SPI_CS(priv, cs)
- keep 'unsigned long' for register set, since using u16 encou
This converts the following to Kconfig:
CONFIG_DEFAULT_SPI_BUS
CONFIG_DEFAULT_SPI_MODE
Signed-off-by: Patrick Delaunay
---
cmd/Kconfig | 12 +++-
cmd/spi.c| 7 ---
configs/bg0900_defconfig
Move some configurations in defconfig file
- CONFIG_DM_SPI (removed by syncing defconfigs )
- CONFIG_CMD_SF
- CONFIG_CMD_SPI
- CONFIG_CMD_SF_TEST
This allow correct dependency handling in Kconfig.
Signed-off-by: Patrick Delaunay
---
configs/bcm7445_defconfig | 3 +++
include/configs/bcm7445.h
Move some configurations in defconfig file
- CONFIG_CMD_I2C
- CONFIG_CMD_SPI
This allow correct dependency handling in Kconfig.
Signed-off-by: Patrick Delaunay
---
configs/controlcenterdc_defconfig | 2 ++
include/configs/controlcenterdc.h | 6 --
2 files changed, 2 insertions(+), 6 deleti
Replace CONFIG_ENV_SPI_BASE by the better CONFIG_SYS_SPI_BASE
(it is not the location for environment but the location for U-Boot)
and, as it is the only platform with use this define, remove
it from whitelist.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-exynos/spl_boot.c | 2 +-
incl
Define the function board_spi_cs_gpio only when needed,
only called in drivers/spi/mxc_spi.c.
That avoid compilation issue for tqma6s_wru4_mmc_defconfig
when CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS are not
defined (CMD_SF not defined) after migration in KConfig.
Signed-off-by: Patrick Delau
On Wed, Feb 27, 2019 at 5:32 AM Leigh Brown wrote:
>
> Hello,
>
> Vagrant Cascadian asked for people to test the version of u-boot
> packaged
> for Debian Buster. I tested u-boot on my Dreamplug and found it was not
> working correctly. I raised a bug for Debian[1] but I have also tested
> with
Hello,
Vagrant Cascadian asked for people to test the version of u-boot
packaged
for Debian Buster. I tested u-boot on my Dreamplug and found it was not
working correctly. I raised a bug for Debian[1] but I have also tested
with the mainline version of u-boot and found the same issues.
The f
A FAT12/FAT16 root directory location is specified by a sector offset and
it might not start at a cluster boundary. It also resides before the
data area (before cluster 2).
However, the current code assumes that the root directory is located at
a beginning of a cluster, causing no files to be foun
We are trying to setup the Arria10 SOCDK (DK-SOC-10AS066S-A) to boot form
SDCARD in RAW mode. We are under the impression this
has never been used before.
Kconfig sets SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x200 for ARCH_SOCFPGA, which
is correct for the Cyclone-V, but not anymore for Arria-10
Tom,
On Thu, Feb 14, 2019 at 10:20 AM Simon Goldschmidt
wrote:
>
> On Thu, Feb 14, 2019 at 7:26 AM Heinrich Schuchardt
> wrote:
> >
> > The SPL image for the Tinker Board has to fit into 32 KiB. This includes
> > up to 2 KiB for the file header.
> >
> > A new configuration variable CONFIG_SPL_W
On 26/02/2019 17:58, Heinrich Schuchardt wrote:
> On 2/26/19 12:46 PM, matthias@kernel.org wrote:
>> From: Matthias Brugger
>>
>> Function term_read_reply tries to read from the serial console until
>> the end_char was read. This can hang forever if we are, for some reason,
>> not be able to
On 27. 02. 19 7:37, Chee, Tien Fong wrote:
> On Tue, 2019-02-26 at 07:58 -0800, Dalon L Westergreen wrote:
>> On Tue, 2019-02-26 at 16:42 +0100, Michal Simek wrote:
>>>
>>> On 26. 02. 19 15:28, Chee, Tien Fong wrote:
On Tue, 2019-02-26 at 15:06 +0100, Michal Simek wrote:
>
> On 19
On 27. 02. 19 7:10, Chee, Tien Fong wrote:
> On Tue, 2019-02-26 at 16:43 +0100, Michal Simek wrote:
>> On 26. 02. 19 15:30, Chee, Tien Fong wrote:
>>>
>>> On Tue, 2019-02-26 at 15:07 +0100, Michal Simek wrote:
On 19. 02. 19 4:47, tien.fong.c...@intel.com wrote:
>
>
> From: Tie
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