The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the e
Hi Lukasz,
> -Original Message-
> From: Lukasz Majewski
> Sent: Tuesday, February 19, 2019 2:39 PM
> To: Y.b. Lu
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] [v2, 1/3] mmc: fsl_esdhc: add esdhc_imx flag
>
> Hi "Y.b. Lu",
>
> > Hi Lukasz,
> >
> > > -Original Message-
> > >
Moved CONFIG_FSL_ESDHC from header files to defconfig files.
Signed-off-by: Yangbo Lu
---
configs/imx8mq_evk_defconfig | 1 +
configs/imx8qxp_mek_defconfig | 1 +
configs/kp_imx53_defconfig | 1 +
configs/kp_imx6q_tpc_defconfig
Hi Tom,
On 20. 02. 19 2:58, Tom Rini wrote:
> On Mon, Feb 11, 2019 at 02:56:19PM +0800, tien.fong.c...@intel.com wrote:
>
>> From: Tien Fong Chee
>>
>> Drop the statically allocated get_contents_vfatname_block and
>> dynamically allocate a buffer only if required. This saves
>> 64KiB of memory.
Do not enable WDT by default on this target because distributions are
not enabling watchdog driver to service it.
Feature has been enabled by:
"arm64: zynqmp: Enable cadence WDT for zcu100"
(sha1: 767afebbcda59f3ccb04f6c94de8cab2fb7905b6)
And WDT is still enabled in rebranded Avnet Ultra 96 board
*.dtbo are dt overlays files which should be also ignored as *.dtb.
Signed-off-by: Michal Simek
---
.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git a/.gitignore b/.gitignore
index 8d18d6f49bcb..3df3139d236e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -10,6 +10,7 @@
*.bin
*.cfgout
"memmap" command prints uefi-specific memory map information.
=> efi memmap
Type StartEnd Attributes
==
CONVENTIONAL 4000-7de27000 WB
RUNTIME DATA 7de27000-7de
"images" command prints loaded images-related information.
Signed-off-by: AKASHI Takahiro
Reviewed-by: Heinrich Schuchardt
---
cmd/efidebug.c | 26 +-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 0bbca7376be9..e68db6
Currently, there is no easy way to add or modify UEFI variables.
In particular, bootmgr supports BootOrder/Boot variables, it is
quite hard to define them as u-boot variables because they are represented
in a complicated and encoded format.
The new command, efidebug, helps address these issues
"dh" command prints all the uefi handles used in the system.
=> efi dh
7ef3bfa0: Device Path, Device Path To Text, Device Path Utilities,
Unicode Collation 2
7ef31d30: Driver Binding
7ef31da0: Simple Text Output
7ef31e10: Simple Text Input, Simple
"devices" command prints all the uefi variables on the system.
=> efi devices
Scanning disk ahci_scsi.id0lun0...
Scanning disk ahci_scsi.id1lun0...
Found 4 disks
Device Device Path
7ef07ea0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
000
"env [print|set] -e" allows for handling uefi variables without
knowing details about mapping to corresponding u-boot variables.
Signed-off-by: AKASHI Takahiro
---
MAINTAINERS | 1 +
cmd/Kconfig | 10 ++
cmd/Makefile | 1 +
cmd/nvedit.c | 28 +++-
cmd/nvedit_efi.c |
"drivers" command prints all the uefi drivers on the system.
=> efi drivers
Driver Name Image Path
7ef003d0
Signed-off-by: AKASHI Takahiro
---
cmd/efidebug.c | 95 +++
This patch set is a collection of patches to enhance efi user interfaces
/commands. It will help improve user experience on efi boot and make it
more usable *without* edk2's shell utility.
Let's see how it works:
=> efidebug boot add 1 SHELL scsi 1:1 /Shell.efi ""
=> efidebug boot add 2 HELLO scsi
Am Do., 21. Feb. 2019, 03:48 hat Simon Glass geschrieben:
> Hi Simon,
>
> On Mon, 11 Feb 2019 at 14:00, Simon Goldschmidt
> wrote:
> >
> > Am 09.11.2018 um 19:43 schrieb Tom Rini:
> > > On Tue, Oct 02, 2018 at 05:22:41AM -0600, Simon Glass wrote:
> > >
> > >> There is a strange feature to set gl
From: Atish Patra
It is possible that input clock is not available because clk
device was not available and 'clock-frequency' DT property is
also not available.
In this case, instead of failing we should just skip baudrate
config by returning zero.
Signed-off-by: Atish Patra
Signed-off-by: Anu
This patch enables CONFIG_SYS_BOOT_RAMDISK_HIGH for RISC-V
because bootm will update initrd location in DTB only if
CONFIG_SYS_BOOT_RAMDISK_HIGH is enabled. If we don't enable
this option then bootm assumes DTB already has initrd details
which is not the case most of the time.
Signed-off-by: Atish
From: Atish Patra
Currently, timer driver is bound only for hart0.
There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.
The timer driver should be bound for boot hart.
Signed-off-by: Atish Pat
This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.
Signed-off-by: Atish Patra
Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.
Based on code written by Wesley Terpstra
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
https://g
This patch adds fixed-factor clock driver which derives clock
rate by dividing (div) and multiplying (mult) fixed factors
to a parent clock.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Simon Glass
---
arch/sandbox/dts/test.dts | 8 +++
.../clock/fixed
Don't fail in macb_enable_clk() if clk_enable() returns
-ENOSYS because we get -ENOSYS for fixed-rate clocks.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
---
drivers/net/macb.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/net/macb.c b/drivers/net/macb
From: Atish Patra
Compute the baud rate multipler with more precision.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
drivers/serial/serial_sifive.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions
From: Atish Patra
The readme guide describes the procedure to build, flash and boot Linux
using U-Boot on HiFive Unleashed. It also explains the current state of
U-boot support and future action items.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Lukas Auer
---
doc/READM
On 64bit systems, the DRAM top can be easily beyond 4GB and U-Boot
DMA mapping APIs will generate DMA addresses beyond 4GB. This
breaks DMA programming in 32bit DMA capable devices (such as
Cadence MACB ethernet). For example, If DRAM is more then 2GB
on QEMU sifive_u machine then Cadence MACB ethe
From: Atish Patra
Fix MID bit field check to correctly identify all GEM hardwares.
The check is updated as per macb driver in Linux location:
/drivers/net/ethernet/cadence/macb_main.c:259
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
Some of the drivers (such as Cadence MACB ethernet driver) expect
asm/arch/clk.h to be provided by arch support so we add place-holder
asm/arch-generic/clk.h for RISC-V generic CPU.
Signed-off-by: Anup Patel
Reviewed-by: Lukas Auer
---
arch/riscv/include/asm/arch-generic/clk.h | 14
This patch adds asm/dma-mapping.h for Linux-like DMA mappings
APIs required by some of the drivers (such as, Cadance MACB
Ethernet driver).
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Reviewed-by: Alexander Graf
Reviewed-by: Lukas Auer
---
arch/riscv/include/asm/dma-mapping.h | 38 +++
We select CREATE_ARCH_SYMLINK for RISC-V so that we can have
include/asm/arch linked to include/asm/arch-xyz.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/Kconfig b/arch/Kconfig
index 35e2712fce..4ebc66227e 100644
---
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.
This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errat
This patchset adds SiFive Freedom Unleashed (FU540) support
to RISC-V U-Boot.
The patches are based upon latest U-Boot source tree
(git://git.denx.de/u-boot.git) at v2019.04-rc2 commit id
f14de0014c56093feecf42ca38b8ae5b3878f176
All drivers namely: SiFive PRCI, SiFive Serial, and Cadance
MACB Eth
On Thu, Feb 21, 2019 at 8:25 AM Simon Glass wrote:
>
> Hi,
>
> On Tue, 19 Feb 2019 at 22:47, Anup Patel wrote:
> >
> > This patch adds fixed-factor clock driver which derives clock
> > rate by dividing (div) and multiplying (mult) fixed factors
> > to a parent clock.
> >
> > Signed-off-by: Atish
On Wed, Feb 20, 2019 at 8:33 PM Keerthy wrote:
>
> Currently stop is being called unconditionally without even
> checking if start is called. In case of multiple instances eth
> being present many devices might just be initialized without
> a start call in such cases stop might lead unpredictable
Hi Simon,
On Mon, 11 Feb 2019 at 14:00, Simon Goldschmidt
wrote:
>
> Am 09.11.2018 um 19:43 schrieb Tom Rini:
> > On Tue, Oct 02, 2018 at 05:22:41AM -0600, Simon Glass wrote:
> >
> >> There is a strange feature to set global_data to a data-section variable
> >> early in SPL. This only works if SP
Hi,
On Tue, 19 Feb 2019 at 22:47, Anup Patel wrote:
>
> This patch adds fixed-factor clock driver which derives clock
> rate by dividing (div) and multiplying (mult) fixed factors
> to a parent clock.
>
> Signed-off-by: Atish Patra
> Signed-off-by: Anup Patel
> ---
> arch/sandbox/dts/test.dts
On Mon, 18 Feb 2019 at 05:35, Michal Simek wrote:
>
> Images are created
> mkimage -f fit.its -E download-fit-external.ub
>
> and test expects these entries.
>
> env__fpga_under_test = {
> ...
> "mkimage_fit_external": download-fit-external.ub",
> "mkimage_fit_external_size": x,
>
Hi Jordan,
On Tue, 19 Feb 2019 at 16:40, Jordan Hand wrote:
>
> Signed-off-by: Jordan Hand
> ---
> FIT header verification in mkimage was treating a return code as a boolean,
> which meant that failures in validating the fit were seen as successes.
>
> Additionally, mkimage was checking all form
On Wed, 20 Feb 2019 at 05:32, Keerthy wrote:
>
> Currently stop is being called unconditionally without even
> checking if start is called. In case of multiple instances eth
> being present many devices might just be initialized without
> a start call in such cases stop might lead unpredictable be
On Wed, 20 Feb 2019 at 03:36, Neil Armstrong wrote:
>
> When booting on a 64-bit system, the boot_addr_start buffer is not
> large enough to contain a 64-bit number, thus leading to a crash
> even if fastboot_buf_addr is valid, only the high part of the address
> will be printed to boot_addr_start
On Wed, 20 Feb 2019 at 05:47, Keerthy wrote:
>
> Push the Starting kernel print to the end just before the
> dm_remove_devices call.
>
> Signed-off-by: Keerthy
> ---
> arch/arm/lib/bootm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass
Hi Christian,
On Wed, 20 Feb 2019 at 02:29, Christian Gmeiner
wrote:
>
> Hi Bin,
>
> Am Mi., 20. Feb. 2019 um 10:10 Uhr schrieb Bin Meng :
> >
> > Hi Christian,
> >
> > On Mon, Feb 18, 2019 at 8:06 PM Christian Gmeiner
> > wrote:
> > >
> > > Change-Id: I7a2e320f2296bc20e1ac2f10cc2297697c50e097
>
On Sun, 10 Feb 2019 at 23:00, Jagan Teki wrote:
>
> Add sample dm reset test for reset_get_by_index and
> reset_get_by_index_nodev functionality code.
>
> Cc: Stephen Warren
> Cc: Simon Glass
> Signed-off-by: Jagan Teki
> ---
> test/dm/reset.c | 22 ++
> 1 file changed, 22
On Mon, 11 Feb 2019 at 00:43, Stefan Roese wrote:
>
> This patch adds a comment to the header with the PCI_foo macros related
> to DEVFN to explain the difference in U-Boot vs Linux.
>
> Signed-off-by: Stefan Roese
> Cc: Simon Glass
> Cc: Bin Meng
> ---
> include/pci.h | 11 +++
> 1 fi
Hi Jagan,
On Sun, 10 Feb 2019 at 23:05, Jagan Teki wrote:
>
> clk_get_by_index_tail() now handle common clk get by index
> code so use it in relevant places.
>
> Cc: Stephen Warren
> Signed-off-by: Jagan Teki
> Reviewed-by: Simon Glass
> ---
> drivers/clk/clk-uclass.c | 77 +--
On Tue, 19 Feb 2019 at 21:07, Adam Ford wrote:
>
> Kconfig allows boards to configured with DM_SERIAL and still
> have SPL_DM_SERIAL disabled. This patch changes the ifdef's
> to CONFIG_IS_ENABLED to allow the modes to differ between
> SPL and U-Boot.
>
> Signed-off-by: Adam Ford
Reviewed-by: S
Hi,
On Wed, 13 Feb 2019 at 10:50, wrote:
>
> From: Ondrej Jirman
>
> Length may be unitialized when fdt_getprop fails. Return ENOENT when
> the property can't be found.
It should always be the error code. What situation are you seeing here?
Regards,
Simon
>
> Signed-off-by: Ondřej Jirman
>
On Sun, 10 Feb 2019 at 23:00, Jagan Teki wrote:
>
> Add sample dm clk test for clk_get_by_index and
> clk_get_by_index_nodev functionality code.
>
> Cc: Stephen Warren
> Cc: Simon Glass
> Signed-off-by: Jagan Teki
> ---
> test/dm/clk.c | 21 +
> 1 file changed, 21 insertion
On Sun, 10 Feb 2019 at 23:00, Jagan Teki wrote:
>
> Getting a RESET by index with device is not straight forward
> for some use-cases like handling clock operations for child
> node in parent driver. So we need to process the child node
> in parent probe via ofnode and process RESET operation for
On Wed, 13 Feb 2019 at 16:11, Andre Przywara wrote:
>
> It seems like the Allwinner SATA driver is already quite capable of
> using the driver model, so we can force this on all boards and can
> remove support for a non-DM_SCSI build.
> This removes the warning about boards with SATA ports not bei
On Sun, 10 Feb 2019 at 23:00, Jagan Teki wrote:
>
> Getting a CLK by index with device is not straight forward
> for some use-cases like handling clock operations for child
> node in parent driver. So we need to process the child node
> in parent probe via ofnode and process CLK operation for chil
T1040RDB has been upgraded to support new DDR ie. MTA9ADF1G72AZ-3G2, 8GB.
So adding support of new DDR part by updating board_specific_parameters
udimm0.
Signed-off-by: Peng Ma
---
change for V2:
- update comments and subject
board/freescale/t104xrdb/ddr.h |1 +
1 files changed, 1
The ARMv8 capable Allwinner A64 SoC comes out of reset in AArch32 mode.
To run AArch64 code, we have to trigger a warm reset via the RMR register,
which proceeds with code execution at the address stored in the RVBAR
register.
If the bootable payload in the FIT image is using a different
architectu
To be able to use FEL booting (Allwinner's USB-OTG protocol), we need a
32 bit SPL, to easily return into the 32 bit BootROM.
Add a generic defconfig for that purpose, that should work on all boards.
The resulting spl/sunxi-spl.bin can be used with the sunxi-fel tool to
initialise the DRAM via FEL.
To be able to use FEL booting (Allwinner's USB-OTG protocol), we need a
32 bit SPL, to easily return into the 32 bit BootROM.
Add a generic defconfig for that purpose, that should work on all boards.
The resulting spl/sunxi-spl.bin can be used with the sunxi-fel tool to
initialise the DRAM via FEL.
Even though we introduced FIT image support for the SPL to cover the
64-bit SoCs, there is no technical limitation to those parts.
Change the Makefile stanza to always create a FIT image if the
particular config either provided a script or an .its file.
Signed-off-by: Andre Przywara
---
Makefil
To be able to use FEL booting (Allwinner's USB-OTG protocol), we need a
32 bit SPL, to easily return into the 32 bit BootROM.
Add two generic defconfigs for that purpose, one for boards with DDR3
DRAM, the other for those with LPDDR3 DRAM chips.
The resulting spl/sunxi-spl.bin can be used with the
At the moment we use the arch/arm directory for arm64 boards as well,
so the Makefile will pick up the "arm" name for the architecture to use
for tagging binaries in U-Boot image files.
Differentiate between the two by looking at the CPU variable being defined
to "armv8", and use the arm64 architec
At the moment we build the SPL and U-Boot proper for the 64-bit AArch64
instruction set. But since the cores provide an AArch32 compatibility mode
and in fact the BootROM runs in 32-bit mode, it can be useful to have at
least the SPL run in AArch32 as well. This has two advantages:
- As AArch32 fea
Read the specified "arch" value from a legacy or FIT U-Boot image and
store it in our SPL data structure.
This allows loaders to take the target architecture in account for
custom loading procedures.
Having the complete string -> arch mapping for FIT based images in the
SPL would be too big, so we
From: Alexander Graf
Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a
typo in it which effectively disabled exception handling in SPL code always.
Since nobody complained, I guess we may as well disable exception handling
in SPL always by default.
So fix the bug to make t
At the moment we can't use the USB-OTG based Allwinner FEL booting method
with mainline U-Boot on ARMv8 Allwinner SoCs. As we run the SPL in AArch64
with the MMU enabled, returning to the BootROM in AArch32 with the MMU off
and matching the BootROM's expectation is not trivial.
To workaround the p
> -Original Message-
> From: Peng Ma
> Sent: Wednesday, January 30, 2019 4:32 PM
> To: albert.u.b...@aribaud.net; York Sun
> Cc: Bhaskar Upadhaya ; VINITHA V PILLAI
> ; Prabhakar Kushwaha
> ; Rajesh Bhagat
> ; feng.l...@nxp.com; Alison Wang
> ; sumit.g...@nxp.com; Mingkai Hu
> ; Ruchika G
On 20/02/2019 17:14, Alexander Graf wrote:
> Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a
> typo in it which effectively disabled exception handling in SPL code always.
>
> Since nobody complained, I guess we may as well disable exception handling
> in SPL always by de
Hi Tim,
On Tue, Feb 19, 2019 at 4:11 PM Tim Harvey wrote:
> Fabio / Stefano,
>
> Thanks for your quick response. Yes, I've been looking at the
> mx6sabreauto conversion series and trying to plot a course for my
> boards that won't completely thrash users - we need backwards
> compatibility.
>
>
On 1/30/19 12:58 PM, Stephen Warren wrote:
From: Stephen Warren
When a file contains extents, U-Boot currently reads extent-related data
for each block in the file, even if that data is located in the same
block each time. This significantly slows down loading of files that use
extents. Impleme
On Wed, 20 Feb 2019 10:03:39 +0530, Vignesh R wrote:
> Hi,
>
> Have you tested Quad mode on this device? I see gd25q256 uses
> macronix_quad_enable() and kernel handles this by .quad_enable()
> callback which isnt supported in U-Boot yet. Could you explain how Quad
> mode would work in U-Boot wit
On 20/02/2019 16:14, Alexander Graf wrote:
> Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a
> typo in it which effectively disabled exception handling in SPL code always.
Thanks for uncovering this embarrassing bug!
> Since nobody complained, I guess we may as well disabl
On 2/20/19 6:48 PM, Tom Warren wrote:
> -Original Message-
> From: Peter Robinson
> Sent: Wednesday, February 20, 2019 10:23 AM
> To: Marek Vasut
> Cc: Tom Warren ; u-boot@lists.denx.de; Stephen Warren
> ; Marcel Ziswiler ;
> peter.ch...@data61.csiro.au; Lucas Stach ; Stefan Agner
> ;
On 2/20/19 6:15 PM, Stephen Warren wrote:
On 2/20/19 10:04 AM, Alexander Graf wrote:
On 02/20/2019 05:59 PM, Stephen Warren wrote:
On 2/20/19 5:09 AM, Anton Gerasimov wrote:
Raspberry Pi bootloader adds this node to fdt, but if u-boot script
doesn't reuse the tree provided by it, this informat
On 2/18/19 1:52 AM, AKASHI Takahiro wrote:
> Heinrich,
>
> On Sat, Feb 16, 2019 at 08:50:43PM +0100, Heinrich Schuchardt wrote:
>> All code and data sections of PE images are already in the correct relative
>> location when loaded into memory. There is not need to copy them once
>> again.
>
> Whi
-Original Message-
From: Peter Robinson
Sent: Wednesday, February 20, 2019 10:23 AM
To: Marek Vasut
Cc: Tom Warren ; u-boot@lists.denx.de; Stephen Warren
; Marcel Ziswiler ;
peter.ch...@data61.csiro.au; Lucas Stach ; Stefan Agner
; Alban Bedel ; Allen
Martin
Subject: Re: [PATCH 2/4]
On Wed, Feb 20, 2019 at 10:09 AM Lokesh Vutla wrote:
>
>
>
> On 2/20/2019 8:46 PM, Adam Ford wrote:
> > On Wed, Feb 20, 2019 at 7:49 AM Lokesh Vutla wrote:
> >>
> >> Hi Adam,
> >>
> >> On 20/02/19 7:01 PM, Adam Ford wrote:
> >>> I am trying to remove the manual pinmuxing code from the board file.
On Wed, Feb 20, 2019 at 5:17 PM Marek Vasut wrote:
>
> On 2/20/19 1:17 PM, Peter Robinson wrote:
> > Migrate USB_EHCI_TEGRA from headers to Kconfig
> >
> > Signed-off-by: Peter Robinson
> > Cc: Tom Warren
> > Cc: Stephen Warren
> > Cc: Marek Vasut
> > Cc: Marcel Ziswiler
> > Cc: peter.ch...@d
On 2/20/19 1:17 PM, Peter Robinson wrote:
> Migrate USB_EHCI_TEGRA from headers to Kconfig
>
> Signed-off-by: Peter Robinson
> Cc: Tom Warren
> Cc: Stephen Warren
> Cc: Marek Vasut
> Cc: Marcel Ziswiler
> Cc: peter.ch...@data61.csiro.au
> Cc: Lucas Stach
> Cc: Stefan Agner
> Cc: Alban Bedel
On 2/20/19 10:04 AM, Alexander Graf wrote:
On 02/20/2019 05:59 PM, Stephen Warren wrote:
On 2/20/19 5:09 AM, Anton Gerasimov wrote:
Raspberry Pi bootloader adds this node to fdt, but if u-boot script
doesn't reuse the tree provided by it, this information is lost.
Revision and serial are displ
On 02/20/2019 05:59 PM, Stephen Warren wrote:
On 2/20/19 5:09 AM, Anton Gerasimov wrote:
Raspberry Pi bootloader adds this node to fdt, but if u-boot script
doesn't reuse the tree provided by it, this information is lost.
Revision and serial are displayed in /proc/cpuinfo after boot.
Are thes
On 2/20/19 5:09 AM, Anton Gerasimov wrote:
Raspberry Pi bootloader adds this node to fdt, but if u-boot script
doesn't reuse the tree provided by it, this information is lost.
Revision and serial are displayed in /proc/cpuinfo after boot.
Are these properties documented in the upstream Linux k
Tom,
Please pull u-boot-tegra/master into U-Boot/master. Thanks!
All Tegra builds are OK, and Stephen's automated test system reports that
all tests pass.
NOTE: This PR should supersede the previous one, sent yesterday. Thanks.
The following changes since commit 97f9830849c64d60d0cf2fd69e87dfe
On Sun, Feb 17, 2019 at 5:13 PM Lukasz Majewski wrote:
>
> On Fri, 15 Feb 2019 09:00:14 +0100
> Hannes Schmelzer wrote:
>
> > Add this spba-bus@0200 sub-bus to the aips-bus@0200, because
> > below there are essential boot-devices (ecspi1-4) which are needed in
> > SPL for booting from SPI
On 2/20/19 3:53 PM, Adam Ford wrote:
spba-bus has a few nodes under it including the UART1 and
some ESPI buses. In order to use them in SPL, the
u-boot,dm-spl flag needs to be added to the spba-bus@200
container.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi b/arc
The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.
This patch adds the polling mode, a basic mode that do not need
any DMA channels.
Only NAND_ECC_HW mode is actually supported.
The driver supports a maximum 8k page size.
The following ECC strength
This patch adds the documentation of the device tree bindings for the STM32
FMC2 NAND controller.
Signed-off-by: Christophe Kerello
---
doc/device-tree-bindings/mtd/stm32-fmc2-nand.txt | 59
1 file changed, 59 insertions(+)
create mode 100644 doc/device-tree-bindings/m
This patchset adds the support for the STMicroelectronics FMC2 NAND flash
controller found on STM32MP SOCs.
This patchset supports:
- the polling mode feature
- a maximum 8k page size
- following ECC strength and step size
- nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8)
Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a
typo in it which effectively disabled exception handling in SPL code always.
Since nobody complained, I guess we may as well disable exception handling
in SPL always by default.
So fix the bug to make the config option effect
On 02/20/2019 04:24 PM, Matthias Brugger wrote:
On 20/02/2019 15:19, Alexander Graf wrote:
Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a
typo in it which effectively disabled exception handling in SPL code always.
Since nobody complained, I guess we may as well disabl
On 2/20/2019 8:46 PM, Adam Ford wrote:
> On Wed, Feb 20, 2019 at 7:49 AM Lokesh Vutla wrote:
>>
>> Hi Adam,
>>
>> On 20/02/19 7:01 PM, Adam Ford wrote:
>>> I am trying to remove the manual pinmuxing code from the board file.
>>> In an effort to accomplish this, I am trying to get SPL_OF_CONTROL
On 20/02/2019 15:19, Alexander Graf wrote:
> Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a
> typo in it which effectively disabled exception handling in SPL code always.
>
> Since nobody complained, I guess we may as well disable exception handling
> in SPL always by de
On 2/20/19 4:13 PM, Julien Béraud wrote:
>
> On 07/01/2019 10:27, Julien Beraud wrote:
>>
>> On 07/01/2019 10:26, Marek Vasut wrote:
>>
>>> btw. you should keep a changelog with each new Vx of a patch.
>>> Here it's fine, just add one next time you submit patches.
>> Sure, I'll do it next time. Th
On Wed, Feb 20, 2019 at 7:49 AM Lokesh Vutla wrote:
>
> Hi Adam,
>
> On 20/02/19 7:01 PM, Adam Ford wrote:
> > I am trying to remove the manual pinmuxing code from the board file.
> > In an effort to accomplish this, I am trying to get SPL_OF_CONTROL and
> > SPL_PINCTRL to let me use the device tr
On 07/01/2019 10:27, Julien Beraud wrote:
>
> On 07/01/2019 10:26, Marek Vasut wrote:
>
>> btw. you should keep a changelog with each new Vx of a patch.
>> Here it's fine, just add one next time you submit patches.
> Sure, I'll do it next time. Thanks.
>
> Julien
Hi Marek,
I can see on https:
On 02/20/2019 03:29 PM, Andre Przywara wrote:
On Wed, 20 Feb 2019 14:52:32 +0100
Alexander Graf wrote:
Hi Alex,
thanks for having a look!
On 02/20/2019 01:36 PM, Alexander Graf wrote:
On 02/20/2019 12:19 PM, Andre Przywara wrote:
Hi,
I was looking for a solution to some linker problem and
spba-bus has a few nodes under it including the UART1 and
some ESPI buses. In order to use them in SPL, the
u-boot,dm-spl flag needs to be added to the spba-bus@200
container.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi b/arch/arm/dts/imx6qdl-u-boot.dtsi
index 45a
On Wed, 20 Feb 2019 14:52:32 +0100
Alexander Graf wrote:
Hi Alex,
thanks for having a look!
> On 02/20/2019 01:36 PM, Alexander Graf wrote:
> > On 02/20/2019 12:19 PM, Andre Przywara wrote:
> >> Hi,
> >>
> >> I was looking for a solution to some linker problem and was hoping that
> >> some li
Commit 1416e2d2253 ("armv8: make SPL exception vectors optional") had a
typo in it which effectively disabled exception handling in SPL code always.
Since nobody complained, I guess we may as well disable exception handling
in SPL always by default.
So fix the bug to make the config option effect
Am 18.02.19 um 10:46 schrieb Stefan Roese:
> The new mtd is very useful so let's enable it on the LinkIt Smart
> 7688 as well.
>
> Signed-off-by: Stefan Roese
> Cc: Jiri Kastner
> Cc: Daniel Schwierzeck
> ---
> configs/linkit-smart-7688-ram_defconfig | 1 +
> configs/linkit-smart-7688_defcon
On Mon, 2019-02-18 at 21:38 +0100, Marek Vasut wrote:
> On 2/18/19 3:51 PM, Ang, Chee Hong wrote:
> >
> > On Mon, 2019-02-18 at 12:57 +0100, Marek Vasut wrote:
> > >
> > > On 2/18/19 5:16 AM, chee.hong@intel.com wrote:
> > > >
> > > >
> > > > From: "Ang, Chee Hong"
> > > >
> > > > 'SET_BL
On 02/20/2019 01:36 PM, Alexander Graf wrote:
On 02/20/2019 12:19 PM, Andre Przywara wrote:
Hi,
I was looking for a solution to some linker problem and was hoping that
some linker cracks here on the list have some idea:
The generic ARMv8 ("arm64") code provides an exception vector table,
which
Hi Adam,
On 20/02/19 7:01 PM, Adam Ford wrote:
> I am trying to remove the manual pinmuxing code from the board file.
> In an effort to accomplish this, I am trying to get SPL_OF_CONTROL and
> SPL_PINCTRL to let me use the device tree(s) to initialize pin muxing.
>
> I have the following defined:
I am trying to remove the manual pinmuxing code from the board file.
In an effort to accomplish this, I am trying to get SPL_OF_CONTROL and
SPL_PINCTRL to let me use the device tree(s) to initialize pin muxing.
I have the following defined:
CONFIG_SPL_PINCTRL=y
CONFIG_SPL_PINCTRL_FULL=y
CONFIG_SP
On 20. 02. 19 13:03, Chee, Tien Fong wrote:
> On Mon, 2019-02-18 at 13:27 +0100, Michal Simek wrote:
>> On 15. 02. 19 8:57, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Ensure the string for filename is always constant, otherwise it can
>>> be
>>> corrupted by the writing.
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