Am 2018-11-05 10:58, schrieb Jagan Teki:
On Mon, May 7, 2018 at 2:40 PM Jagan Teki
wrote:
kirkwood now support dt along with platform data,
respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki
---
Changes for v3:
- rebased master
- Move kconfig option if DM_SPI
On Wed, 2018-11-14 at 12:52 +0100, Marek Vasut wrote:
> On 11/14/2018 08:09 AM, Ang, Chee Hong wrote:
> >
> > On Thu, 2018-10-11 at 10:03 +, Marek Vasut wrote:
> > >
> > > On 10/11/2018 08:21 AM, Ang, Chee Hong wrote:
> > > >
> > > >
> > > > On Wed, 2018-10-10 at 12:27 +0200, Marek Vasut wr
*snip*
> --- /dev/null
> +++ b/board/freescale/imx8mq_evk/lpddr4_timing.c
> @@ -0,0 +1,2104 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2018 NXP
> + */
> +
> +#include
> +#include
> +#include
> +
> +#define LPDDR4_HDT_CTL_2D 0xC8 /* stage completion */
> +#define LPDD
Hi Simon,
On Wed, 14 Nov 2018 at 03:52, Simon Glass wrote:
>
> Hi Akahsi,
>
> On 5 November 2018 at 20:15, AKASHI Takahiro
> wrote:
> > Hello Simon,
> >
> > You said, in efi/lib_loader/efi_disk.c,
> >
> > ===8<===
> > * TODO(s...@chromium.org): Actually with CONFIG_BLK, U-Boot does have this.
Based on the MCU R5 efuse settings, R5F cores in MCU domain
either work in split mode or in lock step mode.
If efuse settings are in lockstep mode: ROM release R5 cores
and SPL continues to run on the R5 core is lockstep mode.
If efuse settings are in split mode: ROM releases both the R5
cores si
On Sun, Sep 23, 2018 at 02:33:47PM +0200, Heinrich Schuchardt wrote:
> Since GRUB patch d0c070179d4d ("arm/efi: Switch to arm64 linux loader",
> 2018-07-09) we do not need a workaround for GRUB on 32bit ARM anymore.
>
> So let's eliminate function efi_exit_caches().
>
> This will require Linux di
store fdt header member with name in U-Boot
Environment variable with name .
for example to get the total length of the fdt and store
it in filesize, call:
fdt header get filesize totalsize
For membernames look into fdt header definition at
scripts/dtc/libfdt/libfdt.h
Signed-off-by: Heiko Scho
Logically, details on u-boot block device used to implement efi file
protocol are mostly unnecessary, as well as being duplicated, in
efi_file structure.
Moreover, a newly introduced flag, _EFI_DISK_FLAG_INVALID, should be
honored in any file operations via efi file protocol.
These observation sugg
Currently, efi_init_obj_list() scan disk devices only once, and never
change a list of efi disk devices. This will possibly result in failing
to find a removable storage which may be added later on. See [1].
In this patch, called is efi_disk_update() which is responsible for
re-scanning UCLASS_BLK
This function will be used later to implement efi_disk_update().
Signed-off-by: AKASHI Takahiro
---
include/efi_loader.h | 4
lib/efi_loader/efi_boottime.c | 7 +++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index
Under the current implementation, any removable device which is
attached to the platform will not be recognized after any efi-related
command, in particular bootefi, is once executed.
This patch set resolves this problem by re-scanning and recreating
a disk device list for efi operations.
# I did
This adds a general board file based on MT7629 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
Signed-off-by: Ryder Lee
Signed-off-by: Weijie Gao
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4:
-Add
Add a few notes on how to try out the MediaTek support so far.
Signed-off-by: Ryder Lee
Tested-by: Frank Wunderlich
---
Changes since v5:
-Fix Whitespace-Error.
Changes since v4:
-Add instructions on how to prepare SD card and write to SNOR flash.
-Fix typo.
---
doc/README.mediatek | 221 ++
This patch adds a driver for MT7623 clock blocks.
Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4: None
---
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt7623.c | 870 +
This adds a power domain driver for the Mediatek SCPSYS unit.
The System Control Processor System (SCPSYS) has several power
management related tasks in the system. The tasks include thermal
measurement, dynamic voltage frequency scaling (DVFS), interrupt
filter and lowlevel sleep control. The Sys
This patch adds an entry for MediaTek.
Signed-off-by: Ryder Lee
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4: None
---
MAINTAINERS | 20
1 file changed, 20 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index abdb6dc..214629e 100644
--- a/MAIN
Many SoCs from MediaTek have a high-speed uart. This UART is compatible
with the ns16550 in legacy mode. It has extra registers for high-speed
mode which can reach a maximum baudrate at 921600.
However this UART will no longer be compatible if it's in high-speed mode.
Some BootROM of MediaTek's So
Hello,
This is the new round to add U-Boot support for MediaTek SoCs - MT7623n &
MT7629,
and the most of the drivers are based on mainline Linux, such as clock, timer,
mmc,
pinctrl, UART, watchdog, power domain and device tree.
Ryder
Ryder Lee (16):
tools: MediaTek: add MTK boot header gener
From: Weijie Gao
This patch adds MT7623 host controller driver for accessing SD/MMC.
Cc: Jaehoon Chung
Signed-off-by: Weijie Gao
Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4: None
---
drivers/mmc/Kconfig | 11 +
This patch adds a DDR3 driver for MT7629 SoC.
Signed-off-by: Wu Zou
Signed-off-by: Ryder Lee
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4: None
---
drivers/ram/Makefile | 1 +
drivers/ram/mediatek/Makefile | 7 +
drivers/ram/mediatek/ddr3-mt7629.c
This patch adds pinctrl support for MT7623 SoC. And most of the
structures are used to hold the hardware configuration for each
pin.
Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4:
-Add a comment to the exported function
This patch adds clock source and clock event for the timer found
on the Mediatek SoCs.
Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4: None
---
drivers/timer/Kconfig | 7
drivers/timer/Makefile| 1 +
driv
This adds power domain (scpsys) support for MT7623 SoC.
Signed-off-by: Ryder Lee
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4: None
---
drivers/power/domain/mtk-power-domain.c | 80 +
1 file changed, 80 insertions(+)
diff --git a/drivers/
This patch adds pinctrl support for MT7629 SoC. The IO core found on
the SoC has the registers for pinctrl, pinconf and gpio mixed up in
the same register range. Hence the driver also implements the gpio
functionality through UCLASS_GPIO.
This also creates a common file as there might be other ch
This patch adds a common driver for the Mediatek SoC integrated
watchdog.
Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
Reviewed-by: Simon Glass
---
Changes since v5: None
Changes since v4: None
---
drivers/watchdog/Kconfig | 8 +++
drivers/watchdog/Makefile | 1 +
drivers/watchd
This patch adds support for MTK boot image generation.
Signed-off-by: Weijie Gao
Signed-off-by: Ryder Lee
Reviewed-by: Simon Glass
---
Changes since v5: Fix typo
Changes since v4: None
---
Makefile | 20 ++
common/image.c | 1 +
include/image.h | 1 +
scripts/Makefi
This patch adds clock modules for MediaTek SoCs:
- Shared part: a common driver which contains the general operations
for plls, muxes, dividers and gates so that we can reuse it in future.
- Specific SoC part: the group of structures used to hold the hardware
configuration for each SoC.
We take M
This adds device tree for MT7623 development board - Bananapi R2
Detailed hardware information for BPI-R2 which could be found on
http://wiki.banana-pi.org/Banana_Pi_BPI-R2.
Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
Reviewed-by: Simon Glass
---
Changes since v5: Use new compatible 'm
From: Weijie Gao
This adds a general board file based on MT7623 SoCs from MediaTek.
As this u-boot is loaded by MTK proprietary preloader, there is no
low level initializtion codes.
Signed-off-by: Weijie Gao
Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
---
Changes since v5: None
Chan
This patch adds MT7629 device tree and the includes it needs.
Signed-off-by: Ryder Lee
Reviewed-by: Simon Glass
---
Changes since v5: Use new compatible 'mediatek,hsuart' for MTK UART
Changes since v4: None
---
arch/arm/dts/Makefile| 3 +
arch/arm/dts/mt7629-rfb-u-boot.dts
Hi Martyn,
> Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer.
> Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). This port provides
> both SPL and DCD based boot options (hence the two defconfigs).
>
> CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz)
> CPU: Industr
> Taken from coreboot's src/soc/rockchip/rk3288/sdram.c
>
> Without this change, my u-boot build for the asus c201 chromebook (4GiB)
> is incorrectly detected as 0 Bytes of ram.
>
> Signed-off-by: Marty E. Plummer
> ---
> arch/arm/mach-rockchip/sdram_common.c | 2 ++
> 1 file changed, 2 inserti
> This adds support for the ASUS C201, a RK3288-based clamshell
> device. The device tree comes from linus's linux tree at
> 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters
> are for 4GB Samsung LPDDR3, decoded from coreboot's
> src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-sams
Hi Simon,
On Wed, Nov 14, 2018 at 1:07 PM Simon Goldschmidt
wrote:
>
> On 14.11.2018 16:51, Simon Goldschmidt wrote:
> > On 14.11.2018 16:35, Daniele Bianco wrote:
> >> On Wed, Nov 14, 2018 at 04:26:17PM +0100, Andrea Barisani wrote:
> >>> On Wed, Nov 14, 2018 at 04:13:00PM +0100, Simon Goldschmid
> Rockchip socs can route the debug uart pins through the d+ and d- pins
> of one specific usbphy per soc. Add a config option and implement the
> setting on the rk3188.
>
> Signed-off-by: Heiko Stuebner
> Reviewed-by: Philipp Tomsich
> ---
> .../include/asm/arch-rockchip/grf_rk3188.h| 42 +
> There was a copy and paste error where the data
> enable setting was written to the version register.
>
> Signed-off-by: Richard Röjfors
> ---
> drivers/video/rockchip/rk_mipi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Applied to u-boot-rockchip, thanks!
___
> Commit 7a6d7d3e1279 ("rockchip: pinctrl: rk3188: Move the iomux definitions
> into pinctrl-driver") moved the iomux settings out of the grf header
> to prevent conflicts with the iomux definitions of other rockchip socs.
>
> This also breaks the early uart setup, as the iomux for uart2 are neede
> There was an incorrect check when looping and finding the first
> fast enough frequency in the freq_rang table. The code did
> actually return the first that was either exactly correct or
> too slow.
>
> Signed-off-by: Richard Röjfors
> Reviewed-by: Philipp Tomsich
> ---
> drivers/video/rock
Hi Alex,
On 14 November 2018 at 02:18, Alexander Graf wrote:
>
> On 11/14/2018 07:50 AM, Simon Glass wrote:
>>
>> At present this code casts addresses to pointers so cannot be used with
>> sandbox. Update it to use mapmem instead.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> Changes in v13:
>>
The functions in bootefi are very long because they mix high-level code
and control with the low-level implementation. To help with this, create
functions which handle preparing for running the test and cleaning up
afterwards.
Also shorten the awfully long variable names here.
Signed-off-by: Simo
Hi Alex,
On 14 November 2018 at 02:22, Alexander Graf wrote:
> On 11/14/2018 07:50 AM, Simon Glass wrote:
>>
>> This function can be used from do_bootefi_exec() so that we use mostly the
>> same code for a normal EFI application and an EFI test.
>>
>> Rename the function and use it in both places
This function can be used from do_bootefi_exec() so that we use mostly the
same code for a normal EFI application and an EFI test.
Rename the function and use it in both places.
Signed-off-by: Simon Glass
---
Changes in v14:
- Go back to the horrible long variable names
- Hopefully correct erro
At present this code casts addresses to pointers so cannot be used with
sandbox. Update it to use mapmem instead.
Signed-off-by: Simon Glass
---
Changes in v14:
- Fix condition for invalid pointer
Changes in v13:
- Update code to deal with the struct_table_address member
Changes in v12: None
C
This collects the patches previously sent to break up the very large
functions in efi_loader into smaller pieces. Now that the other sandbox
stuff is applied, perhaps it is time to apply these patches.
This also adds a few new patches to fix more recent breakages.
Unfortunately we still cannot ena
There is still duplicated code in efi_loader for tests and normal
operation.
Add a new bootefi_run_prepare() function which holds common code used to
set up U-Boot to run EFI code. Make use of this from the existing
bootefi_test_prepare() function, as well as do_bootefi_exec().
Also shorten a few
On 11/14/2018 10:04 PM, Simon Goldschmidt wrote:
> On 14.11.2018 21:51, Marek Vasut wrote:
>> On 11/14/2018 09:30 PM, Simon Goldschmidt wrote:
>>> Hi,
>> Hi,
>>
>>> [This whole description is not qspi specific but qspi happens to be my
>>> boot source. It should be the same when booting from mmc or
Hi Bin,
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> Allow U-Boot to run on hart 0 only, and suspend other harts.
>
> With this change, '-smp n' works on QEMU RISC-V board.
>
> Signed-off-by: Bin Meng
>
> ---
>
> arch/riscv/cpu/start.S | 4
> 1 file changed, 4 insertions(+)
>
Hi Bin,
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> Use a variable 'code' to store the exception code to simplify the
> codes in handle_trap().
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/lib/interrupts.c | 16 ++--
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
I see this got superseded by fd3d1212a2cb ("bootm: Add board specific
OS preboot hook") which does the exact same thing. Thanks!
On Mon, 2018-08-13 at 09:30 +0200, Gerard Salvatella wrote:
> Some boards require specific configuration prior to booting the
> kernel.
> For instance, our boards requir
Hi Bin,
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> The most significant bit in mcause register should be masked to
> form the exception code for _exit_trap().
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/lib/interrupts.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
On Fri, 2018-10-26 at 14:29 +0200, Philippe Schenker wrote:
> From: Gerard Salvatella
>
> U-Boot typically tears down the display controller before handing
> control over to Linux. On LCD displays disabling pixel clock leads to
> a
> fading out effect with vertical/horizontal lines. Make sure to
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> With this change, we can avoid a forward declaration.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/lib/interrupts.c | 62 ++-
> --
> 1 file changed, 30 insertions(+), 32 deletions(-)
>
Reviewed-by
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> At present the trap handler returns to M-mode only. Change to
> returning to previous privilege level instead.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/mtrap.S | 3 ---
> 1 file changed, 3 deletions(-)
>
Reviewed-by: Lukas Auer
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> sp cannot be loaded before restoring other registers.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/mtrap.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Lukas Auer
Good catch!
> diff --git a/arch/riscv/cp
On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote:
> Currently the M-mode trap handler codes are in start.S. For future
> extension, move them to a separate file mtrap.S.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/Makefile | 2 +-
> arch/riscv/cpu/mtrap.S | 106
> ++
Hi Bin,
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> The standard RISC-V ISA sets aside a 12-bit encoding space for up
> to 4096 CSRs. This adds all known CSR numbers as defined in the
> RISC-V Privileged Architecture Version 1.10.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/inclu
Hi Bin,
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> This calls cpu_probe_all() to probe all available cpus.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/qemu/Kconfig | 1 +
> arch/riscv/cpu/qemu/cpu.c | 14 ++
> 2 files changed, 15 insertions(+)
>
Reviewed-by:
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> Increase the heap size for the pre-relocation stage, so that CPU
> driver can be loaded.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/Kconfig | 3 +++
> 1 file changed, 3 insertions(+)
>
Reviewed-by: Lukas Auer
Hi Bin,
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> At present there are just two levels of Kconfig option hierarchy in
> RISC-V. This adds a new level for platform to specify additional
> options. It is organized in a way that platform-specific options
> followed by board-specific ones,
Hi Bin,
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> This adds a driver for RISC-V CPU. Note the driver will bind
> a RISC-V timer driver if "timebase-frequency" property is
> present in the device tree.
>
> Signed-off-by: Bin Meng
> ---
>
Since we have the CPU driver, we could also en
Hi Bin,
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> To enumerate devices on the /soc/ node, create a "simple-bus"
> driver to match "riscv-virtio-soc".
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/qemu/cpu.c | 13 +
> 1 file changed, 13 insertions(+)
>
Reviewed-b
Hi Bin,
On Tue, 2018-11-13 at 00:21 -0800, Bin Meng wrote:
> This adds a timebase_freq member to the 'struct cpu_platdata', to
> hold the "timebase-frequency" value in the cpu or /cpus node.
>
> Signed-off-by: Bin Meng
> ---
>
> include/cpu.h | 3 +++
> 1 file changed, 3 insertions(+)
>
Revi
On 14.11.2018 21:51, Marek Vasut wrote:
On 11/14/2018 09:30 PM, Simon Goldschmidt wrote:
Hi,
Hi,
[This whole description is not qspi specific but qspi happens to be my
boot source. It should be the same when booting from mmc or nand.]
On my socfgpa gen5 board, I was a little surprised that a
On 11/14/2018 09:30 PM, Simon Goldschmidt wrote:
> Hi,
Hi,
> [This whole description is not qspi specific but qspi happens to be my
> boot source. It should be the same when booting from mmc or nand.]
>
> On my socfgpa gen5 board, I was a little surprised that a soft reboot
> did not start the S
> Commit 7a6d7d3e1279 ("rockchip: pinctrl: rk3188: Move the iomux definitions
> into pinctrl-driver") moved the iomux settings out of the grf header
> to prevent conflicts with the iomux definitions of other rockchip socs.
>
> This also breaks the early uart setup, as the iomux for uart2 are neede
> Rockchip socs can route the debug uart pins through the d+ and d- pins
> of one specific usbphy per soc. Add a config option and implement the
> setting on the rk3188.
>
> Signed-off-by: Heiko Stuebner
> ---
> .../include/asm/arch-rockchip/grf_rk3188.h| 42 +++
> arch/arm/m
> There was a copy and paste error where the data
> enable setting was written to the version register.
>
> Signed-off-by: Richard Röjfors
> ---
> drivers/video/rockchip/rk_mipi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Philipp Tomsich
_
Hi,
[This whole description is not qspi specific but qspi happens to be my
boot source. It should be the same when booting from mmc or nand.]
On my socfgpa gen5 board, I was a little surprised that a soft reboot
did not start the SPL from qspi after updating it from a running Linux
(via swup
On 11/14/2018 09:05 PM, Simon Goldschmidt wrote:
> There are two config structs left in wrap_sdram_config.c that can
> be made const.
>
> Signed-off-by: Simon Goldschmidt
> ---
>
> arch/arm/mach-socfpga/wrap_sdram_config.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --
There are two config structs left in wrap_sdram_config.c that can
be made const.
Signed-off-by: Simon Goldschmidt
---
arch/arm/mach-socfpga/wrap_sdram_config.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c
b/arch/arm/mach-socf
On 14.11.2018 16:51, Simon Goldschmidt wrote:
On 14.11.2018 16:35, Daniele Bianco wrote:
On Wed, Nov 14, 2018 at 04:26:17PM +0100, Andrea Barisani wrote:
On Wed, Nov 14, 2018 at 04:13:00PM +0100, Simon Goldschmidt wrote:
On 14.11.2018 15:45, Andrea Barisani wrote:
On Wed, Nov 14, 2018 at 01:0
On 07.10.2018 02:49, Tom Rini wrote:
On Sun, Sep 30, 2018 at 02:31:53PM +0200, Simon Goldschmidt wrote:
Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig with
help from moveconfig.py (only had to prepare socfpga,
stm32f746 and am33x/43x manually)
Signed-off-by: Simon Goldschmidt
---
This patc
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on
the PHYTEC phyCORE-i.MX6UL SOM (PCL063). This port provides both SPL and
DCD based boot options (hence the two defconfigs).
CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-
Hi Ryder,
On Tue, Nov 6, 2018 at 9:50 AM Ryder Lee wrote:
>
> This patch adds support for MTK boot image generation.
>
> Signed-off-by: Weijie Gao
> Signed-off-by: Ryder Lee
> Reviewed-by: Simon Glass
> ---
> Changes since v4: None
> ---
> Makefile | 20 ++
> common/image.c
Using ulong is wrong as its size depends on the Host CPU architecture
(32-bit vs. 64-bit) although the Cortex-M4 is always 32-bit.
Without this patch, the stack and PC are obviously wrong and it
generates an abort when used on 64-bit processors such as the i.MX8MQ.
Signed-off-by: Gary Bisson
---
Hi,
This series fixes loading a M4 firmware into memory and start that M4
core using bootaux on i.MX8MQ platforms.
There were two issues:
1- the memory where the firmware is loaded (TCM) wasn't mapped
2- the bootaux code relied on ulong instead of u32 (M4 core is 32-bit)
This was tested on Nitro
Otherwise can't boot the M4 core as it is impossible to load its
firmware into the TCM memory.
Signed-off-by: Gary Bisson
---
arch/arm/mach-imx/mx8m/soc.c | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/mach-imx/mx8m/soc.c b/arch/arm/mach-imx/mx8m/soc.c
index 46873
Hey all,
It's a few days past the scheduled release day, but we're here now and
I'm happy enough with the last minute SPI changes that we're releasing
now. The release is live on git (I hope) and FTP and ACD (along with
the PGP sig file).
As I've been asking for, and receiving now more PRs with
On Wed, Nov 14, 2018 at 10:58:24AM -0500, Tom Rini wrote:
> Now that CMD_UBI does not select CMD_MTDPARTS we need to make platforms
> that had been enabling it turn it on by hand. This exposed that we had
> not yet migrated CMD_MTDPARTS fully, so do so now.
>
> Fixes: 86dfa556d927 ("cmd: ubi: Re
On Thu, Oct 18, 2018 at 04:15:39PM +0200, Anatolij Gustschin wrote:
> Commit fb01e07a95 accidentally broke initialisation of GPIO
> descriptor flags from device tree: currently the active low
> flag from gpio-specifier is always ignored. Fix it.
>
> Signed-off-by: Anatolij Gustschin
> Cc: Mario
On 11/14/18 7:46 AM, Jagan Teki wrote:
> + Simon
>
> On Wed, Nov 14, 2018 at 9:00 PM York Sun wrote:
>>
>> On 11/14/18 6:57 AM, Jagan Teki wrote:
>>> Dropped
>>> - fsl_espi driver
>>> - SPI, SPI flash CONFIG-items
>>> - CMD_SF..etc
>>>
>>> Dropped becuase
>>> - No proper changes related to since
Hi Simon,
thanks for fast answer
i hope mediatek release ethernet soon (i know it's a more complex driver for r2
than the other 18 patches ), than i can drop the old uboot ;)
for list tftp, it seems to be a protocol limitation.
here
https://unix.stackexchange.com/questions/76400/download-direct
On 14.11.2018 16:35, Daniele Bianco wrote:
On Wed, Nov 14, 2018 at 04:26:17PM +0100, Andrea Barisani wrote:
On Wed, Nov 14, 2018 at 04:13:00PM +0100, Simon Goldschmidt wrote:
On 14.11.2018 15:45, Andrea Barisani wrote:
On Wed, Nov 14, 2018 at 01:03:12PM +0100, Simon Goldschmidt wrote:
On 14.1
+ Simon
On Wed, Nov 14, 2018 at 9:00 PM York Sun wrote:
>
> On 11/14/18 6:57 AM, Jagan Teki wrote:
> > Dropped
> > - fsl_espi driver
> > - SPI, SPI flash CONFIG-items
> > - CMD_SF..etc
> >
> > Dropped becuase
> > - No proper changes related to since from 2015
> > - no dm conversion.
> >
> > Cc: T
On Wed, Nov 14, 2018 at 04:26:17PM +0100, Andrea Barisani wrote:
> On Wed, Nov 14, 2018 at 04:13:00PM +0100, Simon Goldschmidt wrote:
> > On 14.11.2018 15:45, Andrea Barisani wrote:
> > > On Wed, Nov 14, 2018 at 01:03:12PM +0100, Simon Goldschmidt wrote:
> > > > On 14.11.2018 12:52, Andrea Barisani
On Wed, 2018-11-14 at 07:18 +, eugen.hris...@microchip.com wrote:
>
> On 13.11.2018 17:04, Radu Pirea wrote:
> > U-boot must have dtb built in because at91bootstrap can not load
> > it.
>
> Hello,v
>
> The DTB is already appended in the image with the current defconfigs.
> This has been in p
On 14.11.2018 16:24, Frank Wunderlich wrote:
Hi,
is it possible to list files on tftp so i can write a script to let user select
kernel-image to load?
Unless I'm mistaken, the tftp protocol does not support file listing.
have anybody tried to load a kernelimage larger than 20MB?
We are su
On 11/14/18 6:57 AM, Jagan Teki wrote:
> Dropped
> - fsl_espi driver
> - SPI, SPI flash CONFIG-items
> - CMD_SF..etc
>
> Dropped becuase
> - No proper changes related to since from 2015
> - no dm conversion.
>
> Cc: Tom Rini
> Cc: York Sun
> Signed-off-by: Jagan Teki
> ---
> Note:
> - This ce
On Wed, Nov 14, 2018 at 04:13:00PM +0100, Simon Goldschmidt wrote:
> On 14.11.2018 15:45, Andrea Barisani wrote:
> > On Wed, Nov 14, 2018 at 01:03:12PM +0100, Simon Goldschmidt wrote:
> > > On 14.11.2018 12:52, Andrea Barisani wrote:
> > > > On Tue, Nov 13, 2018 at 09:57:23PM +0100, Simon Goldschmi
Hi,
is it possible to list files on tftp so i can write a script to let user select
kernel-image to load?
have anybody tried to load a kernelimage larger than 20MB?
i use dnsmasq as tftp and uboot 2014-version (because 2018-11 für mt7623
currently has no ethernetdriver).
If kernelimage is lar
On 11/14/2018 04:17 PM, Heiko Schocher wrote:
> store fdt header member with name in U-Boot
> Environment variable with name .
>
> for example to get the total length of the fdt and store
> it in filesize, call:
>
> fdt header get filesize totalsize
>
> For membernames look into fdt header defi
store fdt header member with name in U-Boot
Environment variable with name .
for example to get the total length of the fdt and store
it in filesize, call:
fdt header get filesize totalsize
For membernames look into fdt header definition at
scripts/dtc/libfdt/libfdt.h
Signed-off-by: Heiko Sch
On 14.11.2018 15:45, Andrea Barisani wrote:
On Wed, Nov 14, 2018 at 01:03:12PM +0100, Simon Goldschmidt wrote:
On 14.11.2018 12:52, Andrea Barisani wrote:
On Tue, Nov 13, 2018 at 09:57:23PM +0100, Simon Goldschmidt wrote:
On 06.11.2018 15:51, Andrea Barisani wrote:
[..]
The issue can be explo
On 11/14/2018 08:09 AM, Ang, Chee Hong wrote:
> On Thu, 2018-10-11 at 10:03 +, Marek Vasut wrote:
>> On 10/11/2018 08:21 AM, Ang, Chee Hong wrote:
>>>
>>> On Wed, 2018-10-10 at 12:27 +0200, Marek Vasut wrote:
On 10/10/2018 07:30 AM, Ang, Chee Hong wrote:
>
>
> On Tue, 2018
On Wed, Nov 14, 2018 at 01:03:12PM +0100, Simon Goldschmidt wrote:
> On 14.11.2018 12:52, Andrea Barisani wrote:
> > On Tue, Nov 13, 2018 at 09:57:23PM +0100, Simon Goldschmidt wrote:
> > > On 06.11.2018 15:51, Andrea Barisani wrote:
> > > > [..]
> > > > The issue can be exploited by several means:
On 11/08/2018 10:05 AM, Jun Nie wrote:
Alexander Graf 于2018年11月8日周四 下午4:59写道：
On 11/08/2018 09:36 AM, Jun Nie wrote:
Do not use dtb loaded by firmware if fit image signature is enabled.
So that u-boot.dtb can be used. The u-boot.dtb contains the pulibc key
that is to verify Linux kernel FIT im
On Wed, 2018-11-14 at 14:34 +0530, Jagan Teki wrote:
> On Fri, Oct 12, 2018 at 12:46 PM Ryder Lee wrote:
> >
> > From: Guochun Mao
> >
> > This patch adds MT7629 qspi driver for accessing SPI NOR flash.
> >
> > Cc: Jagan Teki
> > Signed-off-by: Guochun Mao
> > ---
> > change since v2:
> > - Dro
Hi Alexander Graf,
On 11/14/2018 1:17 AM, Alexander Graf wrote:
On 03.11.18 12:28, Akash Gajjar wrote:
Rockpro64 is rk3399 based board from pine64.org. add initial board support for
Rockpro64. complete board support will be added later in upcoming patchsets.
Signed-off-by: Akash Gajjar
---
U-boot must have dtb built in because at91bootstrap can not load it.
Signed-off-by: Radu Pirea
---
configs/at91rm9200ek_defconfig | 1 +
configs/at91rm9200ek_ram_defconfig | 1 +
configs/at91sam9260ek_dataflash_cs0_defconfig | 1 +
configs/at91sam9260ek_dataflash_cs1
Hi all,
I am trying to cross-compile the U-boot on my Ubuntu pc cloned from
git clone git://git.denx.de/u-boot.git
with gcc-linaro-6.2.1-2016.11-x86_64_arm-linux-gnueabi compiler. But while
compiling I am getting following error:
./arch/arm/include/asm/global_data.h:110:58: error: invalid regi
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