On Tue, 2018-11-13 at 00:22 -0800, Bin Meng wrote: > sp cannot be loaded before restoring other registers. > > Signed-off-by: Bin Meng <bmeng...@gmail.com> > --- > > arch/riscv/cpu/mtrap.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >
Reviewed-by: Lukas Auer <lukas.a...@aisec.fraunhofer.de> Good catch! > diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S > index ba6462f..6c0eac6 100644 > --- a/arch/riscv/cpu/mtrap.S > +++ b/arch/riscv/cpu/mtrap.S > @@ -72,7 +72,6 @@ trap_entry: > li t0, MSTATUS_MPP > csrs mstatus, t0 > LREG x1, 1 * REGBYTES(sp) > - LREG x2, 2 * REGBYTES(sp) > LREG x3, 3 * REGBYTES(sp) > LREG x4, 4 * REGBYTES(sp) > LREG x5, 5 * REGBYTES(sp) > @@ -102,5 +101,6 @@ trap_entry: > LREG x29, 29 * REGBYTES(sp) > LREG x30, 30 * REGBYTES(sp) > LREG x31, 31 * REGBYTES(sp) > + LREG x2, 2 * REGBYTES(sp) > addi sp, sp, 32 * REGBYTES > mret _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
