> > > Start.S uses both tabs and spaces after instructions. Fix this by only
> >
> > nits: start.S
> >
> > > using tabs after instructions.
> > >
> > > Signed-off-by: Lukas Auer
> > > ---
> > >
> > > arch/riscv/cpu/start.S | 322
> > > -
> > > 1 file change
On 22.10.2018 19:31, Martin Fuzzey wrote:
> Data abort was occurring when using "w1 bus" with a DS24B33 present.
>
> The abort occurred in the ds24xxx_probe() because the struct w1_device
> pointer was NULL. This is because that structure is allocated by
> the parent device uclass (by .per_chil
Hi Simon
On 10/19/18 5:28 AM, Simon Glass wrote:
> Hi Patrice,
>
> On 9 October 2018 at 07:31, Patrice Chotard wrote:
>> Add get_pin_muxing() which allows to display the muxing
>> of a given pin belonging to a pin-controller.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> Changes in v3:
>>
Hi Simon
On 10/19/18 5:25 AM, Simon Glass wrote:
> Hi Patrice,
>
> On 9 October 2018 at 07:31, Patrice Chotard wrote:
>> Add get_pin_muxing() ops to obtain the pin muxing description
>> a given pin index.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> Changes in v3: None
>> Changes in v2: No
Hi Simon
On 10/19/18 5:25 AM, Simon Glass wrote:
> On 9 October 2018 at 07:31, Patrice Chotard wrote:
>> Add get_pin_mux ops support to display the pin muxing
>> description of the sandbox_pins[]
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> Changes in v3:
>> - Fix typo
>>
>> Changes in v2:
Like it is done for other Rockchip SoCs, introduce a board_usb_init()
function so that USB OTG can be functional on rv1108 too.
Signed-off-by: Otavio Salvador
---
arch/arm/dts/rv1108.dtsi | 45 ++-
arch/arm/mach-rockchip/Makefile | 1 +
arch/arm/mach-rockchip/rv1
In order to be able to build the Rockchip eMMC driver
on rv1108, the CONFIG_BOUNCE_BUFFER option needs to be
selected.
Select it like it is done on the other Rockchip SoC common files.
This also adds the pinctrl handles to enable the use of eMMC on custom
boards (as minievk) and makes it easier f
Make adjustments to the rv1108 clock driver in order to align it
with the internal Rockchip version.
Signed-off-by: Otavio Salvador
---
.../include/asm/arch-rockchip/cru_rv1108.h| 143 +-
drivers/clk/rockchip/clk_rv1108.c | 457 +-
include/dt-bindings/clock/r
From: Fabio Berton
Signed-off-by: Fabio Berton
Signed-off-by: Otavio Salvador
---
configs/rpi_3_32b_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index d3d4596ba0..33c476bb4f 100644
--- a/configs/rpi_3_32b_defconfig
+++
This allow for convenient use of QEMU machine to test loading of UBI
filesystem.
Signed-off-by: Otavio Salvador
---
configs/vexpress_ca9x4_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig
index d3c23dee17..9ca542b0
> > > Implement the functions invalidate_icache_range() and
> > > invalidate_icache_all().
> > >
> > > RISC-V does not have instructions for explicit cache-control. The
> > > functions in this patch are implemented with the memory ordering
> > > instruction for synchronizing the instruction and dat
> > > Hang on unhandled exceptions to prevent execution in a faulty state.
> > >
> > > Signed-off-by: Lukas Auer
> > > ---
> > >
> > > arch/riscv/lib/interrupts.c | 2 ++
> > > 1 file changed, 2 insertions(+)
> > >
> >
> > Reviewed-by: Bin Meng
Reviewed-by: Rick Chen
__
> > > Undefined exception codes currently lead to an out-of-bounds array
> > > access. Prevent this by treating undefined exception codes as
> > > "reserved".
> > >
> > > Signed-off-by: Lukas Auer
> > > ---
> > >
> > > arch/riscv/lib/interrupts.c | 8 ++--
> > > 1 file changed, 6 insertions(+
> > > Only the first four exception codes are defined. Add the missing
> > > exception codes from the definition in RISC-V Privileged Architecture
> > > Version 1.10.
> > >
> > > Signed-off-by: Lukas Auer
> > > ---
> > >
> > > arch/riscv/lib/interrupts.c | 13 -
> > > 1 file changed,
> > Hi Lukas,
> >
> > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer
> > wrote:
> > >
> > > RISC-V u-boot reimplements the generic io functions from
> >
> > nits: U-Boot
> >
> > > asm-generic/io.h. Remove the redundant implementation and include the
> > > generic io.h instead.
> > >
> > > Signed-off-b
> > Hi Lukas,
> >
> > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer
> > wrote:
> > >
> > > Replace the barrier functions in arch/riscv/include/asm/io.h with
> > > those defined in barrier.h, which is imported from Linux. This version
> > > is modified to remove the include statement of asm-generic/ba
> > -static void _exit_trap(int code, uint epc, struct pt_regs *regs)
> > +static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs)
> > {
> > static const char * const exception_code[] = {
> > "Instruction address misaligned",
> > @@ -70,6 +70,6 @@ static void _e
Hi Stefan
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Monday, October 22, 2018 12:45 PM
> To: Rajat Srivastava ; ja...@openedev.com;
> simon.k.r.goldschm...@gmail.com
> Cc: Ashish Kumar ; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH v3] sf: Add auto detec
On Mon, Oct 22, 2018 at 8:08 PM Stefan Roese wrote:
>
> To enable the root device selection (kernel cmd-line) via PARTUUID, this
> patch enables CMD_PART on all missing theadorable-x86 boards and
> changes the default environment to generate the root=PARTUUID string
> automatically.
>
> This fixes
On Mon, Oct 22, 2018 at 8:08 PM Stefan Roese wrote:
>
> This is needed for the PCIe hotplug to work correctly on some boards
> with the newer Linux kernel versions.
>
> Signed-off-by: Stefan Roese
> Cc: Bin Meng
> ---
> include/configs/theadorable-x86-common.h | 3 +--
> 1 file changed, 1 inser
On Mon, Oct 22, 2018 at 8:09 PM Stefan Roese wrote:
>
> The build breaks because its not fitting the U-Boot binary into the ROM
> image. So lets move VGA BIOS a bit to make room for the grown U-Boot
> binary.
>
> Signed-off-by: Stefan Roese
> ---
> configs/theadorable-x86-conga-qa3-e3845-pcie-x4
On Mon, Oct 22, 2018 at 8:08 PM Stefan Roese wrote:
>
> To allow bigger 64 bit prefetchable PCI regions in Linux, this patch
> changes the base address and range of the ACPI area passed to Linux.
> BayTrail can only physically access 36 bit of PCI address space. So
> just chaning the range without
Hi Hannes,
On Tue, Oct 23, 2018 at 5:12 AM Hannes Schmelzer wrote:
>
> This commit creates the freedom for boards to do nothing with the whole
> IRQ stuff on x86 during u-boot.
>
> This is especially important on older systems which have many legacy irq
> and no ACPI support within BIOS, they get
On Mon, Oct 22, 2018 at 07:58:29AM +0100, Alexander Graf wrote:
>
>
> On 22.10.18 06:37, AKASHI Takahiro wrote:
> > On Thu, Oct 18, 2018 at 10:46:36AM +0200, Alexander Graf wrote:
> >>
> >>
> >> On 18.10.18 07:48, AKASHI Takahiro wrote:
> >>> On Wed, Oct 17, 2018 at 10:43:22AM +0200, Alexander Gr
> > Subject: Re: [PATCH 09/30] riscv: move target selection into separate file
> >
> > Hi Lukas,
> >
> > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer
> > wrote:
> > >
> > > Move the target selection into a separate file (Kconfig.board) to
> > > avoid clutter once we support more boards.
> > >
> > >
> > On Sat, Oct 20, 2018 at 6:10 AM Lukas Auer
> > wrote:
> > >
> > > Enable the -fdata-sections compiler option for RISC-V. Buildman
> > > reports the binary size decrease from this as 8365.3 bytes.
> > >
> > > Signed-off-by: Lukas Auer
> > > ---
> > >
> > > arch/riscv/config.mk | 3 ++-
> > >
On Mon, Oct 22, 2018 at 08:42:32AM +0100, Alexander Graf wrote:
>
>
> On 22.10.18 08:22, AKASHI Takahiro wrote:
> > On Mon, Oct 22, 2018 at 01:40:05PM +0900, AKASHI Takahiro wrote:
> >> The current scenario for default UEFI booting, scan_dev_for_efi, has
> >> several issues:
> >> * load dtb dynam
On Tue, Oct 23, 2018 at 09:26:29AM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Tue, Oct 23, 2018 at 1:47 AM Tom Rini wrote:
> >
> > On Mon, Oct 22, 2018 at 10:17:18PM +0800, Bin Meng wrote:
> >
> > > Hi Tom,
> > >
> > > This fixed the QEMU x86_64 support which has been broken here and
> > > here, e.g
> > On Sat, Oct 20, 2018 at 6:09 AM Lukas Auer
> > wrote:
> > >
> > > CONFIG_PHYS_64BIT should be enabled on RV64I systems. Select it.
> > >
> > > Signed-off-by: Lukas Auer
> > > ---
> > >
> > > arch/riscv/Kconfig | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> >
> > Reviewed-by: Bin Meng
> > Hi Lukas,
> >
> > On Sat, Oct 20, 2018 at 6:09 AM Lukas Auer
> > wrote:
> > >
> > > RISC-V defines the base integer instruction sets as RV32I and RV64I.
> > > Rename CPU_RISCV_32 and CPU_RISCV_64 to ARCH_RV32I and ARCH_64I to
> > > match
> >
> > ARCH_RV64I
> >
> > > this convention.
> > >
> >
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, October 22, 2018 2:16 PM
> To: Lukas Auer
> Cc: U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [PATCH 02/30] riscv: ignore device tree binaries
>
> Hi Lukas,
>
> On Sat, Oct 20, 2018 at 6:08 AM Lukas Auer
> wrote:
> >
> > I
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Lukas Auer
> Sent: Saturday, October 20, 2018 6:07 AM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH 03/30] dts: riscv: update makefile to also clean the
> RISC-V dts directory
>
> Signed-off-by: Lukas Auer
> ---
>
> dts/Ma
Hi Tom,
On Tue, Oct 23, 2018 at 1:47 AM Tom Rini wrote:
>
> On Mon, Oct 22, 2018 at 10:17:18PM +0800, Bin Meng wrote:
>
> > Hi Tom,
> >
> > This fixed the QEMU x86_64 support which has been broken here and
> > here, e.g.: built with newer version GCC compiler, EFI loader
> > relocation, TSC as ea
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Lukas Auer
> Sent: Saturday, October 20, 2018 6:07 AM
> To: u-boot@lists.denx.de
> Cc: Heinrich Schuchardt; Alexander Graf
> Subject: [U-Boot] [PATCH 01/30] tools: .gitignore: add prelink-riscv
>
> Ignore tools/prelink-riscv.
>
> Sig
On Tue, 23 Oct 2018, 10:33 AM Balanga Bar, wrote:
> I'm trying to build kwboot on FreeBSD but the latest source I found is not
> posix compliant, containing various Linuxisms... I did find an old version
> here
> https://github.com/LeMaker/u-boot/raw/master/tools/kwboot.c
>
> that I was able to
On Sun, Sep 23, 2018 at 8:48 AM Bin Meng wrote:
>
> From: Tuomas Tynkkynen
>
> This adds virtio net device driver support.
>
> Signed-off-by: Tuomas Tynkkynen
> Signed-off-by: Bin Meng
> ---
>
> drivers/virtio/Kconfig | 7 ++
> drivers/virtio/Makefile | 1 +
> drivers/virtio/virti
On Tue, Sep 18, 2018 at 4:53 PM Jeremy Gebben wrote:
>
> If the phy reports a valid firmware version and doesn't indicate
> a fault, skip loading the firmware. This allows the same image
> to be used on boards that have firmware storage and those that do not.
>
> Signed-off-by: Jeremy Gebben
Ac
On Tue, Sep 18, 2018 at 4:52 PM Jeremy Gebben wrote:
>
> Aquantia phys have firmware that can be loaded automatically
> from storage directly attached to the phy or via MDIO commands.
> Add support for loading firmware from either a file or a
> raw location on an MMC device.
>
> Signed-off-by: Jer
On Tue, Sep 18, 2018 at 4:52 PM Jeremy Gebben wrote:
>
> The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G.
>
> Signed-off-by: Jeremy Gebben
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.den
On Mon, 2018-10-22 at 22:48 +0200, Simon Goldschmidt wrote:
> On 18.10.2018 23:04, Marek Vasut wrote:
>
> On 10/18/2018 10:20 PM, Simon Goldschmidt wrote:
>
>
> Marek Vasut mailto:marek.va...@gmail.com>>
> schrieb am Do., 18. Okt. 2018, 22:15:
>
> On 10/18/2018 09:28 PM, Simon Goldschmidt
On Mon, Oct 22, 2018 at 5:08 PM Fabio Estevam wrote:
>
> Hi Joe,
>
> On Mon, Oct 22, 2018 at 6:07 PM Joe Hershberger
> wrote:
> >
> > On Thu, Oct 18, 2018 at 9:15 AM Anatolij Gustschin wrote:
> > >
> > > Add compatible property and enable the FEC ipg clock when probing
> > > on i.MX8X. Add spec
On Fri, Sep 14, 2018 at 7:51 AM Quentin Schulz
wrote:
>
> The VSC8574 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
> 1000BASE-X and triple-speed copper SFP capable, can communicate with
> the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and
> can set the blinking p
On Fri, Sep 14, 2018 at 7:50 AM Quentin Schulz
wrote:
>
> Part of the config is common between the VSC8584 and the VSC8574, so to
> prepare for the upcoming support of VSC8574, use the phy_device.priv
> pointer that will keep the function that holds code that is PHY-specific
> and that should be c
Hi Joe,
On Mon, Oct 22, 2018 at 6:07 PM Joe Hershberger wrote:
>
> On Thu, Oct 18, 2018 at 9:15 AM Anatolij Gustschin wrote:
> >
> > Add compatible property and enable the FEC ipg clock when probing
> > on i.MX8X. Add specific function for reading FEC clock rate via
> > clock driver when configu
On Fri, Sep 14, 2018 at 7:50 AM Quentin Schulz
wrote:
>
> The VSC8584 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
> 1000BASE-X and triple-speed copper SFP capable, can communicate with the
> MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set
> the blinking patter
I'm trying to build kwboot on FreeBSD but the latest source I found is not
posix compliant, containing various Linuxisms... I did find an old version
here
https://github.com/LeMaker/u-boot/raw/master/tools/kwboot.c
that I was able to compile. Is there anything newer?
Alternatively is anyone awar
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports (internal and one external) and provides Ethernet packet
communication for the device.
CPSW NUSS features: the Reduced Gigabit Media Independent Interface (RGMII),
Reduced Media Independent Interface
From: Álvaro Fernández Rojas
This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).
DMA channel API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_r
Add a sandbox DMA driver implementation (provider) and corresponding DM
test.
Signed-off-by: Grygorii Strashko
---
arch/sandbox/dts/test.dts | 8 ++
configs/sandbox_defconfig | 3 +
drivers/dma/Kconfig| 7 +
drivers/dma/Makefile | 1 +
drivers/dma/sandbox-
From: Vignesh R
Add support for K3 AM65x UDMA with only support pktmode MEM_TO_MEM
transfers and DEV_TO_MEM/MEM_TO_DEV through DMA channels.
Signed-off-by: Peter Ujfalusi
Signed-off-by: Vignesh R
Signed-off-by: Grygorii Strashko
---
drivers/dma/Kconfig |2 +
drivers/dma/Mak
Hi All,
This series is the next try to add DMA channels support for DMA controllers
which last version was posted by Álvaro Fernández Rojas [1].
i've kept version numbering.
Comparing to the original post I've added few changes:
- added possibility to pass DMA driver/channel's specific data per
From: Álvaro Fernández Rojas
Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.
Reviewed-by: Simon Glass
Signed-off-by: Álvaro Fernández Rojas
---
drivers/dma/dma-uclass.c | 2 +-
drivers/dma/ti-edma
The variable name setup_ok might suggest a boolean with true indicating
OK. Let's avoid the misleading name.
%s/setup_ok/setup_status/g
Suggested-by: Simon Glass
Signed-off-by: Heinrich Schuchardt
---
lib/efi_selftest/efi_selftest.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
On 10/22/2018 07:49 PM, Simon Glass wrote:
> Hi Heinrich,
>
> On 18 October 2018 at 23:51, Heinrich Schuchardt wrote:
>> Linker generated arrays may be stored in code sections of memory that are
>> not writable. So let's allocate setup_ok as an array at runtime.
>>
>> This avoids an illegal memor
This commit creates the freedom for boards to do nothing with the whole
IRQ stuff on x86 during u-boot.
This is especially important on older systems which have many legacy irq
and no ACPI support within BIOS, they get in trouble if, for example,
u-boot does mask all the interrupts on a PIC.
Sign
Hi Joe,
On Mon, 22 Oct 2018 21:02:22 +
Joe Hershberger joe.hershber...@ni.com wrote:
...
> This is already covered in https://patchwork.ozlabs.org/patch/979099/
> and https://patchwork.ozlabs.org/patch/979101/
Okay, thanks!
--
Anatolij
___
U-Boot m
On Thu, Oct 18, 2018 at 9:15 AM Anatolij Gustschin wrote:
>
> Add compatible property and enable the FEC ipg clock when probing
> on i.MX8X. Add specific function for reading FEC clock rate via
> clock driver when configuring MII speed register. Allow FEC_MXC
> selection for i.MX8.
>
> Signed-off-
Hi Anatolij,
On Thu, Oct 18, 2018 at 9:15 AM Anatolij Gustschin wrote:
>
> 'phy-reset-gpios' property is optional, don't return error when
> it is missing. Read 'phy-reset-duration' property only if
> 'phy-reset-gpios' exists. The binding defines the duration value
> in milliseconds, so use mdela
On Thu, Oct 4, 2018 at 1:03 PM Martin Fuzzey
wrote:
>
> The DT property "phy-mode" already provides the transceiver type.
> Use it so that we do not have to also set CONFIG_FEC_XCV_TYPE
>
> Signed-off-by: Martin Fuzzey
Acked-by: Joe Hershberger
___
U-
On Mon, Oct 01, 2018 at 12:22:31PM -0600, Simon Glass wrote:
> Unfortunately the test was not included in the original implementation.
> Add one.
>
> Signed-off-by: Simon Glass
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
__
On Thu, Oct 4, 2018 at 1:02 PM Martin Fuzzey
wrote:
>
> The DT binding says:
> - phy-reset-duration : Reset duration in milliseconds. Should present
> only if property "phy-reset-gpios" is available. Missing the property
> will have the duration be 1 millisecond. Numbers greater than 1000 a
On Mon, Oct 22, 2018 at 10:17:18PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This fixed the QEMU x86_64 support which has been broken here and
> here, e.g.: built with newer version GCC compiler, EFI loader
> relocation, TSC as early timer. Now all issues have been addressed and
> we can finally turn
On Thu, Oct 4, 2018 at 1:02 PM Martin Fuzzey
wrote:
>
> The DT binding says that phy-reset-duration is in ms, but the driver
> currently uses udelay().
>
> Switch to mdelay() to fix this.
>
> Signed-off-by: Martin Fuzzey
Acked-by: Joe Hershberger
___
On Thu, Oct 4, 2018 at 1:03 PM Martin Fuzzey
wrote:
>
> Configure the phy regulator if defined by the "phy-supply" DT phandle.
>
> Signed-off-by: Martin Fuzzey
Acked-by: Joe Hershberger
___
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U-Boot@lists.denx.de
https://lists.denx.d
On 18.10.2018 23:04, Marek Vasut wrote:
On 10/18/2018 10:20 PM, Simon Goldschmidt wrote:
Marek Vasut mailto:marek.va...@gmail.com>>
schrieb am Do., 18. Okt. 2018, 22:15:
On 10/18/2018 09:28 PM, Simon Goldschmidt wrote:
> Hi Marek,
Hi,
> I was playing with updating the dts
On Mon, Sep 17, 2018 at 11:45 PM Pankaj Bansal wrote:
>
> In upcoming freescale board LX2160AQDS, the MDIO bus is muxed.
> i.e. same MDIO bus can be routed to eight different slots depending
> on mux register settings.
>
> To support this mdio mux behavior, we add each MDIO bus mux as a
> separate
On Fri, Aug 17, 2018 at 6:11 AM Hector Palacios
wrote:
>
> All mii operations require a valid PHY address except the 'device'
> command, which expects the PHY name rather than the address.
>
> Signed-off-by: Hector Palacios
Acked-by: Joe Hershberger
_
On Wed, Oct 17, 2018 at 4:46 AM Ooi, Joyce wrote:
>
> This adds support for TSE PCS (Triple Speed Ethernet Physical Coding
> Sublayer) that uses SGMII adapter when the phy-mode in device tree is
> set to sgmii.
>
> Signed-off-by: Ooi, Joyce
> ---
> arch/arm/mach-socfpga/include/mach/misc.h | 1
On Tue, Oct 16, 2018 at 4:31 AM Cédric Le Goater wrote:
>
> The driver is based on the previous one and the code is only adapted
> to fit the driver model. The support for the Faraday ftgmac100
> controller is the same with MAC and MDIO bus support for RGMII/RMII
> modes.
>
> Configuration is upda
On Tue, Oct 16, 2018 at 4:35 AM Cédric Le Goater wrote:
>
> This is a large update of the AST2500 SoC DTS file bringing it to the
> level of commit 927c2fc2db19 :
>
> Author: Joel Stanley
> Date:Sat Jun 2 01:18:53 2018 -0700
>
> ARM: dts: aspeed: Fix hwrng register address
>
On Fri, 19 Oct 2018, 12:55 AM Baruch Siach, wrote:
> From: Rabeeh Khoury
>
> The SolidRun Clearfog GT-8K is based on Armada 8040.
>
> https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k
>
> Signed-off-by: Rabeeh Khoury
> Signed-off-by: Baruch Siach
> ---
> arch/arm/dts/Makefile
On 18.10.2018 23:04, Marek Vasut wrote:
On 10/18/2018 10:20 PM, Simon Goldschmidt wrote:
Marek Vasut mailto:marek.va...@gmail.com>>
schrieb am Do., 18. Okt. 2018, 22:15:
On 10/18/2018 09:28 PM, Simon Goldschmidt wrote:
> Hi Marek,
Hi,
> I was playing with updating the dts
Hi Cedric,
On Tue, Oct 16, 2018 at 4:32 AM Cédric Le Goater wrote:
>
> Signed-off-by: Cédric Le Goater
> Reviewed-by: Joel Stanley
> ---
>
> Changes since v3 :
>
> - introduced a ftgmac100_wait_for_txdone() function similar to the
>wait_for_bit_*() macros.
>
> drivers/net/ftgmac100.c | 4
On 22.10.2018 20:53, Joe Hershberger wrote:
Hi Christian,
On Mon, Oct 1, 2018 at 8:57 AM Christian Gmeiner
wrote:
Hi Wolfgang
In message <20181001094646.11539-1-christian.gmei...@gmail.com> you wrote:
From: Thomas RIENOESSL
Prep. work to support nfs v1.
Hm... as you are putting efforts i
On Mon, Oct 22, 2018 at 9:31 AM Stefan Roese wrote:
>
> Hi Joe,
>
> On 15.10.18 23:45, Joe Hershberger wrote:
> > On Mon, Oct 8, 2018 at 8:50 AM Stefan Roese wrote:
> >>
> >> This patch adds ethernet support for the Mediatek MT76xx SoC, including
> >> a minimum setup of the integrated switch. Thi
Hi Pankaj,
https://patchwork.ozlabs.org/patch/981670/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
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Hi Pankaj,
https://patchwork.ozlabs.org/patch/981671/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
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Hi Pankaj,
https://patchwork.ozlabs.org/patch/981669/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
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Hi Pankaj,
https://patchwork.ozlabs.org/patch/981672/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
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Hi Pankaj,
https://patchwork.ozlabs.org/patch/981668/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
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Hi Pankaj,
https://patchwork.ozlabs.org/patch/981665/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
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There are still systems running which do not have any LAPIC or even
IOAPIC, furthermore the MSRs for that aren't existing and the systems
are crashing on trying setup LAPIC.
So this commit makes the APIC stuff able to switch off for those boards
which dont' have a LAPIC / IOAPIC.
Signed-off-by: H
On 22.10.2018 19:49, Simon Glass wrote:
Hi Simon,
On 19 October 2018 at 00:33, Simon Goldschmidt
wrote:
On 19.10.2018 05:25, Simon Glass wrote:
Hi Simon,
On 17 October 2018 at 03:41, Simon Goldschmidt
wrote:
On Wed, Oct 17, 2018 at 8:54 AM Alexander Graf wrote:
On 16.10.18 21:33, Simon
Hi Christian,
On Mon, Oct 1, 2018 at 8:57 AM Christian Gmeiner
wrote:
>
> Hi Wolfgang
>
> >
> > In message <20181001094646.11539-1-christian.gmei...@gmail.com> you wrote:
> > > From: Thomas RIENOESSL
> > >
> > > Prep. work to support nfs v1.
> >
> > Hm... as you are putting efforts into NFS supp
Hi Jagan,
On Mon, 22 Oct 2018 23:56:14 +0530
Jagan Teki ja...@openedev.com wrote:
>On 21/10/18 1:50 AM, Anatolij Gustschin wrote:
>> On Sat, 20 Oct 2018 15:43:48 -0400
>> Tom Rini tr...@konsulko.com wrote:
>> ...
>>> These all look like things that should go via the sunxi tree, and Jagan
>>> is
On Mon, Oct 22, 2018 at 11:29 AM Jagan Teki wrote:
>
> On Wed, Oct 17, 2018 at 10:28 AM Vasily Khoruzhick wrote:
> >
> > Choose best prescaler to improve PWM resolution. Without this change
> > driver chooses first prescaler that gives us period value within
> > range, but it could be not the bes
> Am 22.10.2018 um 18:49 schrieb Simon Glass :
>
> Hi Alex,
>
>> On 19 October 2018 at 01:27, Alexander Graf wrote:
>>
>>
>>> On 19.10.18 05:25, Simon Glass wrote:
>>> Hi Alex,
>>>
On 16 October 2018 at 06:55, Alexander Graf wrote:
> On 15.10.18 16:17, Simon Glass wrot
On Wed, Oct 17, 2018 at 10:28 AM Vasily Khoruzhick wrote:
>
> Choose best prescaler to improve PWM resolution. Without this change
> driver chooses first prescaler that gives us period value within
> range, but it could be not the best one.
This commit need to elaborate about the real issue, ie g
On 21/10/18 1:50 AM, Anatolij Gustschin wrote:
On Sat, 20 Oct 2018 15:43:48 -0400
Tom Rini tr...@konsulko.com wrote:
...
These all look like things that should go via the sunxi tree, and Jagan
is fairly active. I'm curious, why did you pick these up presently?
I got this series on Tuesday and
On Thu, Oct 18, 2018 at 11:30 AM Vasily Khoruzhick wrote:
>
> Updates the device tree file from the the Linux tree as of v4.19-rc4,
> exactly Linux commit:
>
> commit 7876320f8880 (tag: v4.19-rc4)
> Author: Linus Torvalds
> Date: Sun Sep 16 11:52:37 2018 -0700
>
> Linux 4.19-rc4
>
> Signed-
Hi Simon,
> From: s...@google.com On Behalf Of Simon Glass
> Sent: vendredi 19 octobre 2018 05:25
>
> Hi Patrick,
>
> On 12 October 2018 at 09:26, Patrick Delaunay
> wrote:
> > Reset the list head after the reallocation because the list
> > syscon_list use allocated pointer and they are no mor
On Mon, Oct 22, 2018 at 11:49:36AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On 22 October 2018 at 11:47, Tom Rini wrote:
> >
> > On Mon, Oct 22, 2018 at 10:17:18PM +0800, Bin Meng wrote:
> >
> > > Hi Tom,
> > >
> > > This fixed the QEMU x86_64 support which has been broken here and
> > > here, e.g
Hi Heinrich,
On 18 October 2018 at 23:51, Heinrich Schuchardt wrote:
> Linker generated arrays may be stored in code sections of memory that are
> not writable. So let's allocate setup_ok as an array at runtime.
>
> This avoids an illegal memory access observed in the sandbox.
>
> Reported-by: Si
Hi Alex,
On 19 October 2018 at 01:27, Alexander Graf wrote:
>
>
> On 19.10.18 05:25, Simon Glass wrote:
>> Hi Alex,
>>
>> On 16 October 2018 at 06:55, Alexander Graf wrote:
>>>
>>>
>>> On 15.10.18 16:17, Simon Glass wrote:
At present this code casts addresses to pointers so cannot be used w
Hi Simon,
On 19 October 2018 at 00:33, Simon Goldschmidt
wrote:
> On 19.10.2018 05:25, Simon Glass wrote:
>>
>> Hi Simon,
>>
>> On 17 October 2018 at 03:41, Simon Goldschmidt
>> wrote:
>>>
>>> On Wed, Oct 17, 2018 at 8:54 AM Alexander Graf wrote:
On 16.10.18 21:33, Simon Gol
Hi Fabrice,
On 19 October 2018 at 01:40, Fabrice Gasnier wrote:
>
> On 10/19/2018 05:25 AM, Simon Glass wrote:
> > Hi Fabrice,
> >
> > On 11 October 2018 at 10:00, Fabrice Gasnier wrote:
> >> Enhance adc info command to report also the channel mask.
> >>
> >> Signed-off-by: Fabrice Gasnier
> >>
Hi Tom,
On 22 October 2018 at 11:47, Tom Rini wrote:
>
> On Mon, Oct 22, 2018 at 10:17:18PM +0800, Bin Meng wrote:
>
> > Hi Tom,
> >
> > This fixed the QEMU x86_64 support which has been broken here and
> > here, e.g.: built with newer version GCC compiler, EFI loader
> > relocation, TSC as early
On Mon, Oct 22, 2018 at 10:17:18PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This fixed the QEMU x86_64 support which has been broken here and
> here, e.g.: built with newer version GCC compiler, EFI loader
> relocation, TSC as early timer. Now all issues have been addressed and
> we can finally turn
On Mon, Oct 08, 2018 at 10:36:59AM +0300, Eugen Hristev wrote:
> Add the default kernel bootargs according to our NAND flash demo layout:
> http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d2PtcEKMainPage#NAND_Flash_demo_Memory_map
>
> Signed-off-by: Eugen Hristev
Applied to u-boot/master,
On Sat, Oct 13, 2018 at 12:54:01PM +, Meul, Dirk wrote:
> Instead of keeping a custom environment, use a more generic approach
> by switching to distro config.
>
> Signed-off-by: Dirk Meul
> Reviewed-by: Fabio Estevam
Applied to u-boot/master, thanks!
--
Tom
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